TI SN74LVCR32245AZKER

SCES428B − FEBRUARY 2003 − REVISED SEPTEMBER 2003
D Member of the Texas Instruments
D
D
D
D
D
D
D Ioff Supports Partial-Power-Down Mode
Widebus+ Family
Operates From 1.65 V to 3.6 V
Inputs Accept Voltages to 5.5 V
Max tpd of 4.8 ns at 3.3 V
Input and Output Ports Have Equivalent
26-Ω Series Resistors, So No External
Resistors Are Required
Typical VOLP (Output Ground Bounce)
<0.8 V at VCC = 3.3 V, TA = 25°C
Typical VOHV (Output VOH Undershoot)
>2 V at VCC = 3.3 V, TA = 25°C
D
D
D
D
Operation
Supports Mixed-Mode Signal Operation on
All Ports (5-V Input/Output Voltage With
3.3-V VCC)
Other Products to Consider:
SN74LVC32245, SN74LVCH32245A
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
ESD Protection Exceeds JESD 22
− 2000-V Human-Body Model (A114-A)
− 200-V Machine Model (A115-A)
− 1000-V Charged-Device Model (C101)
description/ordering information
This 32-bit (quad-octal) noninverting bus transceiver is designed for 1.65-V to 3.6-V VCC operation.
The SN74LVC32245A is designed for asynchronous communication between data buses. The control-function
implementation minimizes external timing requirements.
This device can be used as four 8-bit transceivers, two 16-bit transceivers, or one 32-bit transceiver. It allows
data transmission from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at
the direction-control (DIR) input. The output-enable (OE) input can be used to disable the device so that the
buses are effectively isolated.
Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators
in a mixed 3.3-V/5-V system environment.
The outputs, which are designed to sink up to 12 mA, include equivalent 26-Ω resistors to reduce overshoot
and undershoot.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
ORDERING INFORMATION
ORDERABLE
PART NUMBER
PACKAGE†
TA
LFBGA − GKE
−40°C to 85°C
TOP-SIDE
MARKING
SN74LVCR32245AGKER
LFBGA − ZKE (Pb-free)
Tape and reel
SN74LVCR32245AZKER
ND245A
† Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Widebus+ is a trademark of Texas Instruments.
Copyright  2003, Texas Instruments Incorporated
! "#$ ! %#&'" ($)
(#"! " !%$""! %$ *$ $! $+! !#$!
!(( ,-) (#" %"$!!. ($! $"$!!'- "'#($
$!. '' %$$!)
POST OFFICE BOX 655303
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1
SCES428B − FEBRUARY 2003 − REVISED SEPTEMBER 2003
GKE OR ZKE PACKAGE
(TOP VIEW)
1
2
3
4
5
6
terminal assignments
1
2
3
4
5
6
A
A
1B2
1B1
1DIR
1OE
1A1
1A2
B
B
1B4
1B3
GND
GND
1A3
1A4
C
C
1B6
1B5
1A6
D
1B8
1B7
VCC
GND
1A5
D
VCC
GND
1A7
1A8
E
2B2
2B1
GND
GND
2A1
2A2
E
F
G
H
J
K
L
M
F
2B4
2B3
2B5
VCC
GND
2A4
2B6
VCC
GND
2A3
G
2A5
2A6
H
2B7
2B8
2DIR
2OE
2A8
2A7
J
3B2
3B1
3DIR
3OE
3A1
3A2
K
3B4
3B3
GND
GND
3A3
3A4
L
3B6
3B5
3A6
3B8
3B7
VCC
GND
3A5
M
VCC
GND
3A7
3A8
N
4B2
4B1
GND
GND
4A1
4A2
N
P
4B4
4B3
4B6
4B5
VCC
GND
4A4
R
VCC
GND
4A3
P
4A5
4A6
R
T
4B7
4B8
4DIR
4OE
4A8
4A7
T
FUNCTION TABLE
(each 8-bit section)
INPUTS
OE
2
DIR
OPERATION
L
L
B data to A bus
L
H
A data to B bus
H
X
Isolation
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SCES428B − FEBRUARY 2003 − REVISED SEPTEMBER 2003
logic diagram (positive logic)
1DIR
A3
2DIR
A4
1A1
H4
1OE
A5
2A1
A2
H3
E5
E2
1B1
To Seven Other Channels
3DIR
2B1
To Seven Other Channels
J3
4DIR
J4
3A1
2OE
T4
3OE
J5
4A1
J2
T3
4OE
N5
N2
3B1
To Seven Other Channels
4B1
To Seven Other Channels
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 6.5 V
Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 6.5 V
Voltage range applied to any output in the high-impedance or power-off state, VO
(see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 6.5 V
Voltage range applied to any output in the high or low state, VO
(see Notes 1 and 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to VCC + 0.5 V
Input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −50 mA
Output clamp current, IOK (VO < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −50 mA
Continuous output current, IO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA
Continuous current through each VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±100 mA
Package thermal impedance, θJA (see Note 3): GKE/ZKE package . . . . . . . . . . . . . . . . . . . . . . . . . . . 40°C/W
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The value of VCC is provided in the recommended operating conditions table.
3. The package thermal impedance is calculated in accordance with JESD 51-7.
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3
SCES428B − FEBRUARY 2003 − REVISED SEPTEMBER 2003
recommended operating conditions (see Note 4)
Operating
VCC
VIH
Supply voltage
Data retention only
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
High-level input voltage
VCC = 2.7 V to 3.6 V
VCC = 1.65 V to 1.95 V
VIL
Input voltage
VO
Output voltage
IOH
High-level output current
IOL
Low-level output current
∆t/∆v
Input transition rise or fall rate
MAX
1.65
3.6
UNIT
V
1.5
0.65 × VCC
1.7
V
2
0.35 × VCC
VCC = 2.3 V to 2.7 V
VCC = 2.7 V to 3.6 V
Low-level input voltage
VI
MIN
0.7
V
0.8
0
5.5
V
High or low state
0
3-state
0
VCC
5.5
V
VCC = 1.65 V
VCC = 2.3 V
−2
VCC = 2.7 V
VCC = 3 V
−8
−4
mA
−12
VCC = 1.65 V
VCC = 2.3 V
2
VCC = 2.7 V
VCC = 3 V
8
4
mA
12
10
ns/V
TA
Operating free-air temperature
−40
85
°C
NOTE 4: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
4
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SCES428B − FEBRUARY 2003 − REVISED SEPTEMBER 2003
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
IOH = −100 µA
IOH = −2 mA
MIN
1.65 V to 3.6 V
1.65 V
VCC−0.2
1.2
2.3 V
1.7
2.7 V
2
3V
2.4
3V
2
IOH = −4 mA
VOH
IOH = −8 mA
IOH = −12 mA
IOL = 100 µA
VOL
II
Ioff
Control inputs
IOZ‡
ICC
∆ICC
Ci
Control inputs
Cio
A or B ports
TYP†
VCC
MAX
UNIT
V
1.65 V to 3.6 V
0.2
IOL = 2 mA
IOL = 4 mA
1.65 V
0.45
2.3 V
0.7
IOL = 8 mA
IOL = 12 mA
2.7 V
0.6
3V
0.8
VI = 0 to 5.5 V
VI or VO = 5.5 V
3.6 V
±5
µA
0
±10
µA
VO = 0 to 5.5 V
VI = VCC or GND
3.6 V ≤ VI ≤ 5.5 V§
3.6 V
±5
µA
20
IO = 0
One input at VCC − 0.6 V,
3.6 V
Other inputs at VCC or GND
20
2.7 V to 3.6 V
VI = VCC or GND
VO = VCC or GND
500
V
µA
A
µA
3.3 V
3
pF
3.3 V
12
pF
† All typical values are at VCC = 3.3 V, TA = 25°C.
‡ For I/O ports, the parameter IOZ includes the input leakage current.
§ This applies in the disabled state only.
switching characteristics over recommended operating free-air temperature range (unless
otherwise noted) (see Figure 1)
PARAMETER
tpd
FROM
(INPUT)
TO
(OUTPUT)
VCC = 1.8 V
± 0.15 V
VCC = 2.5 V
± 0.2 V
VCC = 2.7 V
VCC = 3.3 V
± 0.3 V
MIN
MAX
MIN
MAX
MIN
MAX
MIN
MAX
UNIT
A or B
B or A
1
7.8
1
5.8
1.5
5.7
1.5
4.8
ns
ten
OE
A or B
1.5
10
1
8
1.5
7.9
1.5
6.3
ns
tdis
OE
A or B
1.5
11.9
1
8.4
1.5
8.3
1.5
7.4
ns
operating characteristics, TA = 25°C
TEST
CONDITIONS
PARAMETER
VCC = 1.8 V
TYP
Outputs enabled
Cpd
Power dissipation capacitance
Outputs disabled
f = 10 MHz
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
VCC = 2.5 V
TYP
VCC = 3.3 V
TYP
35
38
43
3
3
4
UNIT
pF
5
SCES428B − FEBRUARY 2003 − REVISED SEPTEMBER 2003
PARAMETER MEASUREMENT INFORMATION
RL
From Output
Under Test
CL
(see Note A)
VLOAD
Open
S1
GND
RL
TEST
S1
tPLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
Open
VLOAD
GND
LOAD CIRCUIT
INPUTS
VCC
1.8 V ± 0.15 V
2.5 V ± 0.2 V
2.7 V
3.3 V ± 0.3 V
VI
tr/tf
VCC
VCC
2.7 V
2.7 V
≤2 ns
≤2 ns
≤2.5 ns
≤2.5 ns
VM
VLOAD
CL
RL
V∆
VCC/2
VCC/2
1.5 V
1.5 V
2 × VCC
2 × VCC
6V
6V
30 pF
30 pF
50 pF
50 pF
1 kΩ
500 Ω
500 Ω
500 Ω
0.15 V
0.15 V
0.3 V
0.3 V
VI
Timing Input
VM
0V
tw
tsu
VI
Input
VM
VM
th
VI
Data Input
VM
VM
0V
0V
VOLTAGE WAVEFORMS
PULSE DURATION
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
VI
VM
Input
VM
0V
tPLH
tPHL
VOH
VM
Output
VM
VOL
tPHL
Output
Waveform 1
S1 at VLOAD
(see Note B)
tPLH
VM
VM
VM
0V
tPLZ
tPZL
VLOAD/2
VM
VM
VOL
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
Output
Waveform 2
S1 at GND
(see Note B)
VOL + V∆
VOL
tPHZ
tPZH
VOH
Output
VI
Output
Control
VM
VOH − V∆
VOH
≈0 V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω.
D. The outputs are measured one at a time with one transition per measurement.
E. tPLZ and tPHZ are the same as tdis.
F. tPZL and tPZH are the same as ten.
G. tPLH and tPHL are the same as tpd.
H. All parameters and waveforms are not applicable to all devices.
Figure 1. Load Circuit and Voltage Waveforms
6
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PACKAGE OPTION ADDENDUM
www.ti.com
30-Mar-2005
PACKAGING INFORMATION
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
SN74LVCR32245AGKER
ACTIVE
LFBGA
GKE
96
1000
SN74LVCR32245AZKER
ACTIVE
LFBGA
ZKE
96
1000 Green (RoHS &
no Sb/Br)
TBD
Lead/Ball Finish
MSL Peak Temp (3)
SNPB
Level-3-220C-168 HR
SNAGCU
Level-3-250C-168 HR
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
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Addendum-Page 1
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