AM1420N Analog Power N-Channel 20V (D-S) MOSFET These miniature surface mount MOSFETs utilize a high cell density trench process to provide low rDS(on) and to ensure minimal power loss and heat dissipation. Typical applications are DC-DC converters and power management in portable and battery-powered products such as computers, printers, PCMCIA cards, cellular and cordless telephones. • • • • Low rDS(on) provides higher efficiency and extends battery life Low thermal impedance copper leadframe SC70-6 saves board space Fast switching speed High performance trench technology PRODUCT SUMMARY VDS (V) rDS(on) (Ω) 0.058 @ VGS = 4.5 V 20 0.082 @ VGS = 2.5V ID (A) 4.3 3.6 SC70-6 Top View D1 D 1 6 D D G 2 3 5 4 D S G1 S1 N-Channel MOSFET o ABSOLUTE MAXIMUM RATINGS (TA = 25 C UNLESS OTHERWISE NOTED) Symbol Maximum Units Parameter 20 Drain-Source Voltage VDS V VGS ±8 Gate-Source Voltage o TA=25 C a Continuous Drain Current o TA=70 C b Pulsed Drain Current a Continuous Source Current (Diode Conduction) TA=25 C a o ±20 IS 1.6 TA=70 C Operating Junction and Storage Temperature Range THERMAL RESISTANCE RATINGS Parameter a Maximum Junction-to-Ambient PD A 3.5 IDM o Power Dissipation 4.3 ID A 1.56 W 0.81 o C TJ, Tstg -55 to 150 Symbol Maximum Units t <= 5 sec Steady-State RTHJA 100 166 o C/W Notes a. Surface Mounted on 1” x 1” FR4 Board. b. Pulse width limited by maximum junction temperature 1 PRELIMINARY Publication Order Number: DS-AM1420_B AM1420N Analog Power SPECIFICATIONS (TA = 25oC UNLESS OTHERWISE NOTED) Parameter Symbol Test Conditions VGS(th) IGSS VDS = VGS, ID = 250 uA Min Limits Unit Typ Max Static Gate-Threshold Voltage Gate-Body Leakage Zero Gate Voltage Drain Current A On-State Drain Current IDSS ID(on) A Drain-Source On-Resistance rDS(on) Forward TranconductanceA gfs VSD Diode Forward Voltage 0.7 VDS = 0 V, VGS = ±8 V ±100 VDS = 16 V, VGS = 0 V 1 10 VDS = 16 V, VGS = 0 V, TJ = 55oC VDS = 5 V, VGS = 4.5 V VGS = 4.5 V, ID = 4.3 A VGS = 2.5 V, ID = 3.6 A VDS = 10 V, ID = 4.3 A IS = 1.6 A, VGS = 0 V 10 V nA uA A 58 82 11.3 0.75 mΩ S V Dynamicb Total Gate Charge Gate-Source Charge Gate-Drain Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall-Time Qg Qgs Qgd td(on) tr td(off) tf VDS = 10 V, VGS = 4.5 V, ID = 4.3 A VDD = 10 V, RL = 15 Ω, ID = 1 A, VGEN = 4.5 V 2.5 0.6 1.0 8 24 35 10 nC ns Notes a. Pulse test: PW <= 300us duty cycle <= 2%. b. Guaranteed by design, not subject to production testing. Analog Power (APL) reserves the right to make changes without further notice to any products herein. APL makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does APL assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in APL data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. APL does not convey any license under its patent rights nor the rights of others. APL products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the APL product could create a situation where personal injury or death may occur. Should Buyer purchase or use APL products for any such unintended or unauthorized application, Buyer shall indemnify and hold APL and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that APL was negligent regarding the design or manufacture of the part. APL is an Equal Opportunity/Affirmative Action Employer. 2 PRELIMINARY Publication Order Number: DS-AM1420_B AM1420N Analog Power Typical Electrical Characteristics (N-Channel) 40 30 5.0V 20 4.0V 10 3.0V 2 3 4 125oC 20 15 10 5 0 1 25oC 25 ID, DRAIN CURRENT (A) I D , D R A IN C U R R E N T ( A 6.0V 30 0 TA = -55oC VDS = 5V VGS = 10V 0 5 0.5 VDS, DRAIN-SOURCE VOLTAGE (V) 1.5 2.5 3.5 4.5 VGS, GATE TO SOURCE VOLTAGE (V) Figure 1. On-Region Characteristics Figure 2. Body Diode Forward Voltage Variation with Source Current and Temperature 700 VGS = 2.5 f = 1MHz VGS = 0 V 600 C A P A C IT A N C E ( p F R D S ( O N ) , N O R M A L IZ E D D R A IN - S O U R C E O N - R E S IS T A N C 3 2 4.5V 1.5 10V 1 CISS 500 400 300 200 COSS 100 CRSS 0 0.5 0 5 10 15 20 25 0 30 5 10 Figure 3. On Resistance Vs Vgs Voltage 1.6 ID = 5.3A 15V 25 30 VGS = 10V ID = 7A 1.4 Normalized RDS(on) Vgs Voltage ( V ) 20 Figure 4. Capacitance Characteristics 10 8 15 VDS, DRAIN TO SOURCE VOLTAGE (V) ID, DRAIN CURRENT (A) 6 4 2 1.2 1.0 0.8 0 0 1 2 3 4 0.6 5 -50 Qg, Gate Charge (nC) 0 25 50 75 100 125 150 TJ Juncation Temperature (ºC) Figure 5. Gate Charge Characteristics Figure 6. On-Resistance Variation with Temperature 3 PRELIMINARY -25 Publication Order Number: DS-AM1420_B AM1420N Analog Power Typical Electrical Characteristics (N-Channel) 0.1 ID = 5.3A VGS = 0V 10 0.08 RDS(ON), ON-RESISTANCE(OHM) IS, REVERSE DRAIN CURRENT (A) 100 o 1 TA = 125 C o 25 C 0.1 0.01 0.06 0.04 TA = 25oC 0.02 0.001 0.0001 0 0 0.2 0.4 0.6 0.8 1 1.2 2 1.4 4 6 8 10 V GS, GATE TO SOURCE VOLTAGE (V) VSD, BODY DIODE FORWARD VOLTAGE (V) Figure 7. Transfer Characteristics Figure 8. On-Resistance with Gate to Source Voltage 50 VDS = VGS ID = 250mA 2 P(pk), PEAK TRANSIENT POWER (W) -Vth, GATE-SOURCE THRESTHOLD VOLTAGE (V) 2.2 1.8 1.6 1.4 1.2 1 -50 -25 0 25 50 75 100 125 150 175 SINGLE PULSE RθJA = 125oC/W TA = 25oC 40 30 20 10 0 0.001 0.01 0.1 1 t1, TIME (SEC) 10 o TA, AMBIENT TEMPERATURE ( C) Figure 9. Vth Gate to Source Voltage Vs Temperature Figure 10. Single Pulse Maximum Power Dissipation Normalized Thermal Transient Junction to Ambient 1 D = 0.5 0.2 0.1 0.1 Rq J A (t) = r(t) + Rq J A Rq J A = 1 2 5 o C/W 0.0 P(p k) 0.02 0.01 t1 t2 0.01 TJ - TA = P * Rq J A(t ) Duty Cycle, D = t1 / t2 S INGLE P ULS E 0.001 0.0001 0.001 0.01 0.1 t1, TIM E (s e c ) 1 10 100 1000 Figure 11. Transient Thermal Response Curve 4 PRELIMINARY Publication Order Number: DS-AM1420_B 100