HS-3182 ARINC 429 Bus Interface Line Driver Circuit March 1997 Features Description • TTL and CMOS Compatible Inputs The HS-3182 is a monolithic dielectrically isolated bipolar differential line driver designed to meet the specifications of ARINC 429. This Device is intended to be used with a companion chip, HS-3282 CMOS ARINC Bus Interface Circuit, which provides the data formatting and processor interface function. • Adjustable Rise and Fall Times via Two External Capacitors • Programmable Output Differential Voltage via VREF Input • Operates at Data Rates Up to 100 Kilobits/Sec • Output Short Circuit Proof and Contains Over-Voltage Protection • Outputs are Inhibited (0 Volts) If DATA (A) and DATA (B) Inputs are Both in the “Logic One” State • DATA (A) and DATA (B) Signals are “AND’d” with Clock and Sync Signals • Full Military Temperature Range Ordering Information D16.3 5962-8687901EA D16.3 -55oC to +125oC HS4-3182-8 J28.A -55oC to +125oC 5962-86879013A J28.A 15 NC 14 CLK GND 8 28 27 26 25 CLK 6 24 NC 11 BOUT NC 7 23 DATA (B) 10 NC NC 8 22 CB 9 +V CA 9 21 NC NC 10 20 NC TRUTH TABLE NC 11 BOUT COMMENTS L X X 0V 0V Null L X X X 0V 0V Null H H L L 0V 0V Null H H L H -VREF +VREF Low H H H L High H H H H +VREF -VREF 0V 0V 19 NC 12 13 14 15 16 17 18 NC SYNC CLK DATA (A) DATA (B) AOUT X 1 NC -V 7 2 DATA (A) 12 CB AOUT 6 3 5 BOUT CA 5 4 NC 13 DATA (B) DATA (A) 4 +V SYNC 3 NC 16 V1 GND 2 V1 VREF 1 NC HS-3182 (CLCC) TOP VIEW VREF HS-3182 (SBDIP) TOP VIEW GND Pinouts NC SMD# HS1-3182-8 -55oC to +125oC GND CLCC D16.3 -V SMD# HS1-3182-9+ -55oC to +125oC AOUT SBDIP PART NUMBER The driver output impedance is 75Ω ± 20% at 25oC. Driver output rise and fall times are independently programmed through the use of two external capacitors connected to the CA and CB inputs. Typical capacitor values are CA = CB = 75pF for high-speed operation (100KBPS), and CA = CB = 300pF for low-speed operation (12 to 14.5KBPS). The outputs are protected against over-voltage and short circuit as shown in the Block Diagram. The HS-3182 is designed to operate with a case temperature range of -55oC to +125oC, or 0oC to +70oC. PKG. NO -40oC to +85oC Three power supplies are necessary to operate the HS-3182: +V = +15V ± 10%, -V = -15V ± 10%, and V1 = 5V ± 5%. VREF is used to program the differential output voltage swing such that VOUT (DIFF) = ± 2VREF . Typically, VREF = V1 = 5V ± 5%, but a separate power supply may be used for VREF which should not exceed 6V. SYNC PACKAGE TEMPERATURE RANGE All logic inputs are TTL and CMOS compatible. In addition to the DATA (A) and DATA (B) inputs, there are also inputs for CLOCK and SYNC signals which are AND’d with the DATA inputs. This feature enhances system performance and allows the HS-3182 to be used with devices other than the HS-3182. Null CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999 5-178 File Number 2963.1 HS-3182 Block Diagram (9) (5) +V CA (4) OUTPUT DRIVER (A) LEVEL SHIFTER AND SLOPE CONTROL (A) DATA (A) FA (6) AOUT ROUT/2 (14) CLOCK (8) (1) VREF GND CL RL (3) OUTPUT DRIVER ROUT/2 (B) SYNC LEVEL SHIFTER AND SLOPE CONTROL (B) (13) DATA (B) FB BOUT (11) (16) V1 (2) CURRENT REGULATOR -V (7) OVER-VOLTAGE PROTECTION CB (12) Typical Application (9) PIN NUMBERS INDICATED BY ( ) +15V +5V (16) (1) (14) (3) CA (5) V1 VREF CLOCK CA CB (12) CB +V SYNC AOUT BOUT HS-3182 ARINC DRIVER CIRCUIT 31 429D0 HS-3282 CMOS ARINC CIRCUIT 429D0 TO BUS (SEE NOTE) (4) DATA (A) 32 (13) DATA (B) 16 LEAD DIP GND GND (2) (8) -V (7) PIN NUMBER 10, 15 = NC -15V NOTE: The rise and fall time of the outputs are set to ARINC specified values by CA and CB. Typical CA = CB = 75pF for high speed and 300pF for low speed operation. The output HI and low levels are set to ARINC specifications by VREF. 5-179 HS-3182 Absolute Maximum Ratings Thermal Information Voltage Between +V and -V Terminals . . . . . . . . . . . . . . . . . . . . 40V V1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7V VREF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6V Logic Input Voltage . . . . . . . . . . . . . . . . . . . . GND -0.3V to V1 +0.3V ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 1 Output Short Circuit Duration . . . . . . . . . . . . . . . . . . . . . See Note 1 Output Over-Voltage Protection . . . . . . . . . . . . . . . . . . . See Note 2 Thermal Resistance (Typical) θJA θJC SBDIP Package . . . . . . . . . . . . . . . . . . 75oC/W 18oC/W CLCC Package . . . . . . . . . . . . . . . . . . 60oC/W 14oC/W Storage Temperature Range . . . . . . . . . . . . . . . . . .-65oC to +150oC Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . +175oC Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . +300oC Die Characteristics Recommended Operating Conditions Transistor Count . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 133 Operating Voltage +V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+15V ± 10% -V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -15V ± 10% V1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5V ± 5% VREF (For ARINC 429) . . . . . . . . . . . . . . . . . . . . . . . . . . .5V ± 5% Operating Temperature Range HS-3182-5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0oC to +70oC HS-3182-8. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -55oC to +125oC NOTES: 1. Heat sink may be required for 100K bits/s at +125oC and output short circuit at +125oC. 2. The fuses used for output over-voltage protection may be blown by a fault at each output of greater than ± 6.5V relative to GND. CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. DC Electrical Performance Specifications DC PARAMETER (NOTE 1) CONDITIONS SYMBOL MIN MAX UNITS Supply Current +V (Operating) ICCOP (+V) No Load (0-100K bits/s) - 16 mA Supply Current -V (Operating) ICCOP (-V) No Load (0-100K bits/s) -16 - mA Supply Current V1 (Operating) ICCOP (V1) No Load (0-100K bits/s) - 975 µA ICCOP (VREF) No Load (0-100K bits/s) -1.0 - mA Supply Current VREF (Operating) Logic “1” Input Voltage VIH 2.0 - V Logic “0” Input Voltage VIL - 0.5 V Output Voltage High (Output to GND) VOH No Load (0-100K bits/s) VREF (-250mV) VREF (+250mV) Output Voltage Low (Output to GND) VOL No Load (0-100K bits/s) -VREF (-250mV) -VREF (+250mV) VNULL No Load (0-100K bits/s) -250 +250 mV Output Voltage Null Input Current (Input Low) IIL -20 - µA Input Current (Input High) IIH - 10 µA Output Short Circuit Current (Output High) IOHSC Short to GND - -80 mA Output Short Circuit Current (Output Low) IOLSC Short to GND 80 - mA TA = +25oC 60 90 Ω Output Impedance ZO NOTE: 1. +V = +15V ± 10%, -V = -15V ± 10%, V1 = VREF = 5V ± 5%, unless otherwise specified TA = 0oC to +70oC for HS-3182-5 and TA = -55oC to +125oC for HS-3182-8. 5-180 HS-3182 AC Electrical Performance Specifications AC PARAMETER (NOTE 1) CONDITIONS SYMBOL Rise Time (AOUT, BOUT) tR MIN MAX UNITS 1 2 µS 0.9 2.4 µS CA = CB = 300pF, Note 2 3 9 µS CA = CB = 75pF, Note 3 1 2 µS 0.9 2.4 µS CA = CB = 300pF, Note 3 3 9 µS CA = CB = 75pF, Note 2 (at TA = -55oC Only) Fall Time (AOUT, BOUT) tF (at TA = -55oC Only) Propagation Delay Input to Output tPLH CA = CB = 75pF, No Load - 3.3 µS Propagation Delay Input to Output tPHL CA = CB = 75pF, No Load - 3.3 µS NOTES: 1. +V = +15V, -V = -15V, V1 = VREF = 5V, unless otherwise specified TA = 0oC to +70oC for HS-3182-5 and TA = -55oC to +125oC for HS-3182-8. 2. tR measured 50% to 90% times 2, no load. 3. tF measured 50% to 10% times 2, no load. Electrical Performance Specifications PARAMETER (NOTE 1) CONDITIONS SYMBOL Input Capacitance CIN MIN MAX UNITS TA = +25oC - 15 pF Supply Current +V (Short Circuit) ISC (+V) Short to GND, TA = +25oC - 150 mA Supply Current -V (Short Circuit) ISC (-V) Short to GND, TA = +25oC -150 - mA NOTE: 1. The parameters listed in Table 3 are controlled via design or process parameters and are not directly tested. These parameters are characterized upon initial design and after major process and/or design changes affecting these parameters. Power Specifications Nominal Power at +25oC, +V = +15V, -V = -15V, V1 = VREF = 5V, Notes 1, 3 +V V- V1 CHIP POWER POWER DISSIPATION IN LOAD No Load 11mA -10mA 600µA 325mW 0 12.5-14 Full Load, Note 2 24mW -24mW 600µA 660mW 60mW 100 Full Load, Note 2 46mW -46mW 600µA 1 Watt 325mW DATA RATE (K BITS/s) 0-100 LOAD NOTES: 1. Heat sink may be required for 100K bits/s at +125oC and output short circuit at +125oC. Thermal characteristics: T(CASE) = T(Junction) - θ(Junction - Case) P(Dissipation). Where: T(Junction Max) = +175oC θ(Junction - Case) = 10.9oC/W (6.1oC/W for LCC) θ(Junction - Ambient) = 73.5oC/W (54.0oC/W for LCC) 2. Full Load for ARINC 429: RL = 400Ω and CL = 30,000pF in parallel between AOUT and BOUT (see block diagram). 3. Output Over-Voltage Protection: The fuses used for output over-voltage protection may be blown by a fault at each output of greater than ±6.5V relative to GND. 5-181 HS-3182 Driver Waveforms DATA (A) 0V 5V 0V 50% 5V 0V 50% DATA (B) 0V ADJ. BY CB VREF +4.75V TO +5.25V AOUT 0V ADJ. BY CA tPHL BOUT 0V -VREF -4.75V TO -5.25V VREF +4.75V TO +5.25V 50% 50% tPLH tR DIFFERENTIAL OUTPUT -VREF -4.75V TO -5.25V 2VREF HIGH AOUT - BOUT +9.5V TO +10.5V NULL 0V -2VREF NOTE: OUTPUTS UNLOADED -9.5V TO -10.5V LOW tF NOTES: tR measured 50% to 90% times 2 When the Data (A) input is in the Logic One state and the Data (B) input is in the Logic Zero state, AOUT is equal to VREF and BOUT is equal to -VREF . This constitutes the Output High state. Data (A) and Data (B) both in the Logic Zero state causes both AOUT and BOUT to be equal to 0V which designates the output Null state. Data (A) in the Logic Zero state and Data (B) in the Logic One state causes AOUT to be equal to -VREF and BOUT to be equal to VREF which is the Output Low state. tF measured 50% to 10% times 2 VIH = 5V VOL = -4.75V to -5.25V VIL = 0V VOH = 4.75V to 5.25V Burn-In Schematic V1 DATA (B) +V VIH C3 A 16 15 1 2 14 13 12 11 HS-3182 3 4 5 6 10 9 7 8 R VIL C1 VIH C2 DATA (A) B -V VIL GND Ambient Temp. Max. = +125oC. NOTES: R = 400Ω ± 5% C1 = 0.03µF ± 20% Package = 16 Lead Side Brazed DIP. C2 = C3 = 500pF, NPO Pulse Conditions = A & B = 6.25kHz ± 10%. B is delayed one-half cycle and in sync with A. +V = +15.5V ± 0.5V -V = -15.5V ± 0.5V VIH = 2.0V Min. V1 = +5.5V ± 0.5V VIL = 0.5V Max. A 0.0µF decoupling capacitor is required on each of the three supply lines (+V, -V and V1) at every 3rd Burn-In socket. 5-182 HS-3182 All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification. Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. 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