Adjustable LITIXTM Linear TLE 4242 G Features • • • • • • • • • • Adjustable constant current up to 500 mA (±5%) Wide input voltage range up to 42 V Low drop voltage Open load detection Overtemperature protection Short circuit proof Reverse polarity proof Wide temperature range: -40 °C to 150 °C Green Product (RoHS compliant) AEC Qualified P-TO263-7-1 Functional Description The TLE 4242 G is an integrated adjustable constant current source driving loads up to 500 mA. The output current level can be adjusted via an external resistor. The IC is designed to supply high power LEDs (e.g. Osram Dragon LA W57B) under the severe conditions of automotive applications resulting in constant brightness and extended LED lifetime. It is provided in the surface mounted PG-TO263-7-1 package. Protection circuits prevent damage to the device in case of overload, short circuit, reverse polarity and overheat. The connected LEDs are protected against reverse polarity as well as excess voltages up to 45 V. The integrated PWM input of the TLE 4242 G permits LED brightness regulation by pulse width modulation. Due to the high input impedance of the PWM input the LITIXTM Linear can be operated as a protected high side switch. Type Package TLE 4242 G PG-TO263-7-1 Data Sheet 1 Rev. 1.1, 2007-03-20 TLE 4242 G Circuit Description I PWM 1 2 7 Q Bias Supply 5 Bandgap Reference REF Comparator 3 ST Status Delay 6 4 GND Figure 1 D AEB03500.VSD Block Diagram An external shunt resistor in the ground path of the connected LEDs is used to sense the LED current. A regulation loop helds the voltage drop at the shunt resistor on a constant level of typ. 177 mV. Selecting the shunt resistance permits to adjust the appropriate constant current level. The typ. output current calculates V REF I Q, typ = -----------R REF (1) where VREF is the reference voltage with a typical level of 177 mV (see Page 10). The equation applies in a range of 0.39 Ω ≤ RREF ≤ 1.8 Ω. The output current is shown as a function of the reference resistance on Page 10. With the PWM input the LED brightness can be regulated via duty cycle. Also PWM = L sets the TLE 4242 in sleep mode resulting in a very low current consumption of << 1 μA typ. Due to the high impedance of the PWM input (see “PWM Pin Input Current versus PWM Voltage” on Page 11) the PWM pin can thus also be used as an enable input. Data Sheet 2 Rev. 1.1, 2007-03-20 TLE 4242 G 1 7 Ι ST REF PWM GND Q D AEP01938_4242 Figure 2 Pin Configuration (top view) Table 1 Pin Definitions and Functions Pin No. Symbol Function 1 I Input; block to GND directly at the IC with a 100 nF ceramic capacitor. 2 PWM Pulse Width Modulation Input; if not needed connect to I 3 ST Status Output; open collector output, connect to external pull-up resistor (Rpull-up ≥ 4.7 kΩ). 4 GND Ground 5 REF Reference Input; connect to shunt resistor. 6 D Status Delay; connect to GND via an optional capacitor to set status reaction delay. Leave open if no ST delay is needed. 7 Q Output Data Sheet 3 Rev. 1.1, 2007-03-20 TLE 4242 G Application Information VBAT I RO TLE 4269 G µC SI Q RADJ GND D 100 nF 10 µF 10 kΩ ST PWM I Q TLE 4242 G LED Dragon REF GND D 47 nF 0.47 Ω 0.25 W RREF AEA03499.VSD Figure 3 Application Circuit Figure 3 shows a typical application with the TLE 4242 G LITIXTM Linear. The 3 LEDs are driven with an adequate supply current adjusted by the resistor RREF. Thus brightness variations due to forward voltage spread of the LEDs are prevented. The luminosity spread arising from the LED production process can be compensated via software by an appropriate duty cycle applied to the PWM pin. Hence selection of the LEDs to forward voltage as well as to luminosity classes can be spared. The minimum supply voltage calculates as the sum of the LED forward voltages, the TLE 4242 G drop voltage (max. 0.7 V at a LED current of 300 mA) and the max. voltage drop at the shunt resistor RREF of max. 185 mV. The status output of the LITIXTM Linear (ST) detects an open load condition enabling to supervise correct LED function. A LED failure is detected if the voltage drop at the shunt resistor RREF falls below typ. 25 mV. In this case the status output pin ST is set low after a delay time adjustable via an optional capacitor connected to the pin D. Data Sheet 4 Rev. 1.1, 2007-03-20 TLE 4242 G The functionality of the ST and PWM as well as their timings are shown in Figure 4. The Status delay can be adjusted via the capacitor connected to the timing Pin D. The delay time scales in linear way with the capacitance CD: CD - × 10 ms t STHL,typ = -------------47 nF CD t STLH,typ = -------------- × 10 μs (2) 47 nF VI Open Load t VPWM VPWM, H VPWM, L IQ tPWM, ON t tPWM, OFF mA 256 tSTHL VD t VUD VLD t VST VSTL t AET03505.VSD Figure 4 Data Sheet Function and Timing Diagram 5 Rev. 1.1, 2007-03-20 TLE 4242 G Table 2 Absolute Maximum Ratings -40 °C < Tj < 150 °C Parameter Symbol Limit Values Unit Remarks Min. Max. VI II -42 45 V – – – mA internally limited VQ IQ -1 40 V – – – mA internally limited VST IST -0.3 40 V – -5 5 mA – VD -0.3 7 V – VREF IREF -1 16 V – -2 2 mA – Input Voltage Current Output Voltage Current Status Output Voltage Current Status Delay Voltage Reference Input Voltage Current Pulse Width Modulation Input Voltage VPWM -40 40 V – Current – -1 1 mA – Tj Tstg -40 150 °C – -50 150 °C – Rthja – 78 K/W Footprint only1) – 52 K/W 300mm2 heat sink area – 39 K/W 600mm2 heat sink area – 3 K/W – Temperatures Junction temperature Storage temperature Thermal Resistances Junction ambient Junction case Rthjc 1) Worst case regarding peak temperature; mounted on PCB FR4, 80 × 80 × 1.5 mm3, 35 μm Cu. Note: Maximum ratings are absolute ratings; exceeding any one of these values may cause irreversible damage to the integrated circuit. Data Sheet 6 Rev. 1.1, 2007-03-20 TLE 4242 G Table 3 Operating Range Parameter Input voltage Status output voltage Status Delay capacitance PWM voltage Junction temperature Reference resistor Data Sheet Symbol Limit Values Unit Remarks 42 V – 16 V – 0 2.2 μF – 0 40 V – -40 150 °C – 0 1.8 Ω – Min. Max. VI VST CD 4.5 – VPWM Tj RREF 7 Rev. 1.1, 2007-03-20 TLE 4242 G Table 4 Electrical Characteristics VI = 13.5 V; RREF = 0.47 Ω; VPWM ≥ VPWM,H; -40 °C < Tj < 150 °C; all voltages with respect to ground; positive current defined flowing into pin; unless otherwise specified Parameter Symbol Limit Values Unit Test Condition Min. Typ. Max. Current consumption IqOFF off mode – 0.1 2 μA PWM = L, Tj < 85 °C Current consumption IqL – 12 22 mA VQ = 6.6 V 357 376 395 mA 168 177 185 mA 431 454 476 mA 357 376 395 mA IQmax Vdr – 600 – mA – 0.35 0.7 V VQ - VREF1) = 6.6 V VQ - VREF = 6.6 V; RREF = 1.0 Ω VQ - VREF = 6.6 V; RREF = 0.39 Ω 5.4 V ≤ VQ - VREF ≤ 7.8 V; 9 V ≤ VI ≤ 16 V RREF = 0 Ω IQ = 300 mA VPWM,H VPWM,L IPWM,H 2.6 – – V – – – 0.7 V – – 220 500 μA VPWM = 5.0 V PWM input current low level IPWM,L -1 – 1 μA VPWM = 0.0 V Turn on delay time tPWM,ON 0 15 40 μs 70% of IQnom, see Figure 4 Turn off delay time tPWM,OFF 0 15 40 μs 30% of IQnom, see Figure 4 Output Output current Output current limit Drop voltage IQ PWM Input PWM high level PWM low level PWM input current high level Data Sheet 8 Rev. 1.1, 2007-03-20 TLE 4242 G Table 4 Electrical Characteristics (cont’d) VI = 13.5 V; RREF = 0.47 Ω; VPWM ≥ VPWM,H; -40 °C < Tj < 150 °C; all voltages with respect to ground; positive current defined flowing into pin; unless otherwise specified Parameter Symbol Limit Values Unit Test Condition Min. Typ. Max. VREF IREF 168 177 185 mV 0.39 < RREF < 1.0 Ω -1 0.1 1 μA VREF = 180 mV Lower status switching threshold VIQL 15 25 – mV ST = L Upper status switching threshold VIQH – 30 40 mV ST = H Status low voltage VSTL ISTLK – – 0.4 V – – 5 μA IST = 1.5 mA VST = 5.0 V Status reaction delay tSTHL 6 10 14 ms Status release delay tSTLH – 10 20 μs Reference Reference Voltage Reference Input Current Status Output Leakage current Status Delay CD = 47 nF, ST H → L CD = 47 nF, ST L → H 1) VQ - VREF equals the forward voltage sum of the connected LEDs, see Figure 3. Data Sheet 9 Rev. 1.1, 2007-03-20 TLE 4242 G Typical Performance Characteristics Output Current versus External Resistor IQ 0.39 0.47 600 mA Reference Voltage versus Junction Temperature AED03503.VSD VQ = 6.6 V VREF 500 AED03506.VSD 185 mV 180 400 175 300 170 200 165 100 0 0.2 0.5 1.0 160 -40 Ω 2.0 0 40 80 °C 160 Tj RREF Output Current versus Supply Voltage IQ AED03504.VSD 600 mA VQ = 6.6 V RREF = 0.47 Ω 500 400 300 200 100 0 0 5 10 15 20 25 30 V 40 VI Data Sheet 10 Rev. 1.1, 2007-03-20 TLE 4242 G PWM Pin Input Current versus PWM Voltage IPWM PWM Pin Input Current versus PWM Voltage AED03502.VSD 2.0 mA IPWM 1.5 300 1.0 200 0.5 100 0 0 5 10 15 20 25 30 0 V 40 0 1 2 3 4 5 6 7 V8 VPWM VPWM Data Sheet AED03501.VSD 400 µA 11 Rev. 1.1, 2007-03-20 TLE 4242 G Package Outlines 10 ±0.2 4.4 9.8 ±0.15 1.27 ±0.1 B 0.1 0.05 2.4 2.7 ±0.3 4.7 ±0.5 8 1) 9.25 ±0.2 (15) 1±0.3 A 8.5 1) 0...0.15 7x0.6 ±0.1 0.5 ±0.1 6x1.27 8˚ max. 0.25 1) M A B 0.1 Typical All metal surfaces tin plated, except area of cut. GPT09114 Figure 5 PG-TO263-7-1 (Plastic Transistor Single Outline) Green Product (RoHS compliant) To meet the world-wide customer requirements for environmentally friendly products and to be compliant with government regulations the device is available as a green product. Green products are RoHS-Compliant (i.e Pb-free finish on leads and suitable for Pb-free soldering according to IPC/JEDEC J-STD-020). You can find all of our packages, sorts of packing and others in our Infineon Internet Page “Products”: http://www.infineon.com/products. Dimensions in mm SMD = Surface Mounted Device Data Sheet 12 Rev. 1.1, 2007-03-20 TLE 4242 G Revision History Version Date Rev. 1.0 2004-01-01 Initial version Rev. 1.1 2007-03-20 Initial version of RoHS-compliant derivate of TLE 4242 G Page 1: AEC certified statement added Page 1 and Page 12: RoHS compliance statement and Green product feature added Page 1 and Page 12: Package changed to RoHS compliant version Legal Disclaimer updated Data Sheet Changes 13 Rev. 1.1, 2007-03-20 Edition 2007-03-20 Published by Infineon Technologies AG 81726 Munich, Germany © 2007 Infineon Technologies AG All Rights Reserved. Legal Disclaimer The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics. 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