A pp li c at i o n N ot e, V 1. 1 , M ar c h 2 00 8 Inverse Operation Behavior o f t h e B T S 61 4 3 D a n d m e m be r s o f t h is p r o du c t f a m i l y A u to m o t i v e P o w e r Inverse Operation Behavior of the BTS6143 and its family members Abstract 1 Abstract Note: The following information is given as a hint for the implementation of the device only and shall not be regarded as a description or warranty of a certain functionality, condition or quality of the device. This Application Note provides information about the specific behavior of the BTS6143D and its family members for the special operation mode “inverse operation”. The application note describes first the specific characteristics of the BTS6143D and its family members. It describes the special operation mode “inverse operation”. It outlines the behavior of the BTS6143D diagnosis and power stage and provides background information for the special behavior. Finally this application note provides further information regarding the impact of inverse operation effects and provides hints for possible counter measures on device and system level. In the following all information is given and explained based on the product BTS6143D. However the outlined information is also valid for all family members which utilize the same features and therefore show the same behavior. 2 Introduction The BTS6143D is a member of a very scalable and flexible family of high current high side switches. It provides embedded protection functions and diagnosis. The embedded device functionality targets an optimum compromise between application requirements and device capabilities. 2.1 Specific characteristics of the BTS6143D and its family members The BTS6143D provides current sense functionality. A dedicated pin IS supports the monitoring of the load current whenever the device is commanded ON. The current sense capability of the BTS6143D and its family members targets the monitoring of the load current across a very wide range. A special functionality has been implemented to extend the load current monitoring capability towards very low load current values. This additional functionality dramatically improves the load current monitoring capability at low load currents. However it can cause some side effects at non-normal operation conditions. The implemented measure for improved load current monitoring utilizes a special functionality called “Gate-RückRegelung” (short GRR) or “Output voltage drop limitation” (short OVDL). The functionality output voltage drop limitation increases significantly the current sense capability and accuracy at low load currents. This is achieved by limiting the voltage drop across the power stage to a defined value of +VON(NL) at low load currents (for details see also the individual product data sheet). However, OVDL is also root cause for the following explained side effects. 2.2 Inverse operation The BTS6143D and its family members is used to switch the positive supply rail +VS of a battery feed to the load. Figure 1 shows a typical application example. Application Note 2 V1.1, 2008-03-31 Inverse Operation Behavior of the BTS6143 and its family members Introduction VS V ON RIN IL VBB IN OUT V OUT IS V IN V IS RLoad RSense ApplicationExample.emf GND Figure 1 Typical application example with normal operation conditions Whenever the device is commanded ON by pulling the pin IN to ground, a positive current +IL is flowing from the pin VBB through the power stage out of the output pin OUT towards the load RLoad. This operation condition is the “normal operation condition” of the device. Depending on the switched load type and specific application conditions a current flow opposite to the normal operation condition can occur. This condition is called “inverse operation condition”. The characteristic of any inverse operation condition is a positive supply voltage +VS , but a load current -IL opposite to the normal load current direction. Figure 2 shows a typical example. +V S -VON RIN -I L VBB IN OUT +VOUT IS +VIN +VIS M RSense InverseCondition.emf GND Figure 2 Inverse operation condition example During inverse operation the current -IL flows from the pin OUT to the pin VBB. Inverse operation conditions can occur whenever the voltage at the pin OUT becomes higher an the voltage at the pin VBB. Examples for such conditions are: • • the device drives a load which can also operate as generator. A typical load is a motor load. Due to external conditions the motor is operated for a certain duration as a generator and supplies therefore a voltage higher than the battery voltage (example1: front windshield wiper in a driving car where the wiper is partly driven by the air flow; example2: battery voltage drop while secondary driven motor is still rotating due to its inertia) the device drives loads that can “store” energy. In such condition the stored energy can be fed back in case the supply voltage drops (example: OUT is buffered with a very high capacitor, VS drops due to external conditions). Application Note 3 V1.1, 2008-03-31 Inverse Operation Behavior of the BTS6143 and its family members Inverse operation behavior 3 Inverse operation behavior Although inverse operation is a non-normal operation condition it is not critical for the BTS6143D and its family members as long as the applied conditions remain within the maximum ratings (please refer also to the respective data sheet). The main life time relevant parameters during inverse operation condition are • • • • the maximum inverse current |-IL|, the resulting maximum power losses Ptot=IL*VDS=f(IL), the resulting junction temperature Tj=Ptot*Rth(JA) and the maximum voltages +VBB . The BTS6143D and its family members offers a very robust device performance in case of inverse operation condition. 3.1 Inverse operation behavior during OFF condition Whenever the BTS6143D is OFF, an inverse current flow will be supported. Any inverse current will flow from the pin OUT to the pin VBB through the body diode of the DMOS power stage. The inverse current flow (-IL or IL(inv)) will cause a voltage drop -VDS (also named -VON, Vinv, -VON(inv)) which depends on the inverse current IL(inv) and the junction temperature Tj. The respective values are outlined in the data sheet (see data sheet parameter e.g. VON(inv) ). The diagnosis is disabled. During inverse operation condition no current except a small leakage current in the range of µA will be provided at the diagnosis pin IS. 3.2 Inverse operation behavior during ON condition Whenever the BTS6143D is ON, an inverse current flow will be supported. 3.2.1 Dynamic inverse currents Any transient inverse current condition will trigger the “Output voltage drop limitation” functionality. The “Output voltage drop limitation” functionality targets a minimum POSITIVE forward voltage drop of +VON(NL) across the DMOS power stage. During inverse current condition this target will not be reached (-VON(inv)<+VON(NL)). Therefore the OVDL will result in an internal switch OFF of the DMOS power stage. The duration for this switch OFF depends on the preceding forward load current condition. The smaller the preceding forward load current condition, the shorter will be the internal switch off time. The maximum internal switch off time especially for preceding high load current conditions will be about the same time as the device switch off time (see data sheet parameter tOFF). 188.8.131.52 Very short inverse pulses As long as the transient inverse current condition occurs for a sufficient short duration which is much shorter than the internal switch off time (e.g. just a few µs) the voltage drop across the DMOS power stage will remain proportional to the load current. The DMOS power stage provides in such conditions still a sufficient conduction resistance RDS(ON)=f(time). This sufficient conduction resistance causes a voltage drop of just -VDS(inv)=RDS(ON)*(IL(inv)). As soon as the inverse current condition transitions back to the forward condition the forward current will be supported. The pin IS will provide during such short inverse current condition minimum a leakage current of IIS(LH) (see data sheet parameter IIS(LH)) and will return to the sense current IIS=+IL/KILIS considering the current sense settling times. Application Note 4 V1.1, 2008-03-31 Inverse Operation Behavior of the BTS6143 and its family members Inverse operation behavior Figure 3 shows a typical scope screen shot of this situation. forward mode inverse mode forward mode voltage across sense resistor VIS Current through DMOS stage IL (5A/div) Varying output voltage Varying battery voltage VOUT VBB InverseShort.emf Figure 3 transient inverse current condition for very short duration Observation: It can be seen, that due to a variation in the supply voltage, an inverse current condition occurred for a certain duration (see CH3, 2nd and 3rd division). The duration was short enough to not cause the device to internally switch OFF. Therefore the output voltage follows the battery voltage before, during and after inverse operation. The sense reports during inverse operation no current and provides during normal forward load current condition a defined ratio of the load current. 184.108.40.206 Transient inverse currents As soon as the inverse current condition lasts for a duration, where the internal switch OFF is reached, the resulting DMOS power stage voltage will increase from initially -VDS(inv)=RDS(ON)*(-IL(inv)) to finally VDS(inv)=VBodyDiode. The inverse current flow which flowed initially through the activated DMOS power stage (RDS(ON)) will finally flow through the body diode of the DMOS power stage (-VDS(inv)=f(-IL(inv))). Such inverse current flow -IL through the body diode of the DMOS power stage will cause a voltage drop -VDS (also named -VON, Vinv, -VON(inv)) which depends on the inverse current IL(inv) and the junction temperature Tj. The respective values are outlined in the data sheet. As soon as the inverse current flows across the body diode of the DMOS a parasitic effect in the DMOS power stage causes a signalling of an “virtual” over temperature event towards the control logic. This “virtual” overtemperature signal causes the power stage to remain switched OFF until the “virtual” over-temperature signal is removed. During such inverse operation condition no current will be provided at the diagnosis pin IS except a small leakage current (see data sheet parameter IIS(LH)). It is important to state, that the “virtual” over-temperature event can remain for a certain duration even after the transition from inverse load current back to normal forward mode (see data sheet parameter td(inv)). Only once the “virtual” over-temperature event is cleared, the power stage will switch ON. The pin IS will provide during inverse current condition minimum a leakage current (see data sheet parameter IIS(LH)). Whenever the voltage condition changes from inverse to normal forward mode, the pin IS will report the “virtual” over-temperature event until the “virtual” over-temperature event signal is cleared. Once the signal is cleared the power stage will switch ON and the pin IS will provide a defined sense current IIS=+IL/KILIS considering the current sense settling time. Application Note 5 V1.1, 2008-03-31 Inverse Operation Behavior of the BTS6143 and its family members Inverse operation behavior Figure 4 shows a typical scope screen shot of this situation. forward mode ON inverse mode ON inverse mode OFF forward mode OFF Switch ON voltage across sense resistor VIS Current through DMOS stage IL (5A/div) Voltage across power stage VDS Varying output voltage Varying battery voltage VOUT VBB InverseLong.emf Figure 4 transient inverse current condition Observation: It can be seen, that due to a variation in the supply voltage, an inverse current condition occurred for a certain duration (see CH3, 2nd and 3rd division). Although the inverse load current reduces, it can be observed, that the negative drain source voltage increases its amplitude (see M1, in 2nd division) indicating the internal switch OFF. Once the power stage is internally switched OFF, a voltage drop across the power stage of about 600..700mV can be observed (see M1, in 2nd and 3rd division). As soon as the voltage conditions change from inverse to forward mode, the power stage remains OFF (see M1, in 3rd division). At a certain stage the status pin starts to report a fault condition (see CH4, 5th division). This fault conditions remains set until the “virtual” overtemperature signal is internally cleared (see CH4, 6th division). The clearance of the “virtual” over-temperature signal allows the automatic switch ON of the power stage again (see CH3 and M1, 7th division). As soon as the power stage is sufficiently switched ON and the drain source voltage drops below approximately 1V the sense starts to report the ratio of the load current again. 3.2.2 Permanent inverse currents Any permanent inverse current condition will trigger the “Output voltage drop limitation” functionality. Therefore the power stage will remain internally switched OFF. The inverse current will flow from the pin OUT to the pin VBB through the body diode of the DMOS power stage. The inverse current flow -IL will cause a voltage drop -VDS (also named -VON, Vinv, -VON(inv)) which depends on the inverse current IL(inv) and the junction temperature Tj. The respective values are outlined in the data sheet (see data sheet parameter -VON(inv) ). The diagnosis is disabled. During inverse operation condition no current except a small leakage current will be provided at the diagnosis pin IS. Application Note 6 V1.1, 2008-03-31 Inverse Operation Behavior of the BTS6143 and its family members Countermeasures and Hints 4 Countermeasures and Hints In case inverse operation conditions can occur in the targeted application and have to be “covered” a wide range of measures are available. The following chapter outlines an excerpt of possible examples. 4.1 Measures supporting the use of the BTS6143D Among the measures that support the use of the BTS6143D and its family members covering “inverse operation” are software measures as well as hardware measures. The BTS6143D and its family members will automatically switch ON again while encountering a transitions from inverse mode back to forward mode and while being commanded ON. Therefore the processing readout logic should “blank” the signalling during inverse operation and during the delayed switch ON. Since the reporting of the “virtual” over-temperature signal after the transition from inverse to forward mode provides the same signal level as any over-current-during-ON, over-temperature-switch-OFF and over-current-switch-OFF condition, special attention has to be paid to this signal readout and handling. One example is to introduce a certain filter time until such a fault condition is validated. Another example beside “blanking” is the “verification” and “differentiation” between the transition event from inverse to forward mode and an occurred over-temperature-switch-OFF and over-current-switch-OFF condition by utilizing the potential of the OUT pin. Beside the software measures it is also possible, to introduce measures on hardware level that suppress or limit the current flow through the power stage body diode. One example is the usage of an additional series diode in the output path. This series diode can possibly be required anyhow to protect a secondary connected electrolytic capacitors against reverse battery condition. The second example is the usage of an anti-parallel diode to the output stage. Such an anti-parallel diode would have to be dimensioned in such a manner, that any inverse current will flow across this diode only and not across the power stage body diode. A third example is the usage of “pull down” resistor parallel to the generating or energy storing load. Using this approach offers two benefits. First of all the susceptibility against very fast inverse transients reduces since the additional current for the paralleled resistor reduces the likeliness of forward voltage drop activation during forward mode. Secondly any induced or stored voltage at the OUT will be additionally sink by such resistor. Figure 5 shows these hardware counter measure example. +V S measure 2 RIN measure1 VBB IN OUT IS +VIN +V IS M measure3 RSense InverseCounterMeasure.emf GND Figure 5 BTS6143D inverse counter measure examples 4.2 Measures supporting the use of the BTS6143D alternatives In case the above countermeasures can not be introduced for whatever reason, the designer can profit in most cases from the pin compatibility of this high side switch family. Infineon offers several products that do not include the “forward voltage drop limitation” feature and that can therefore better cope with transient inverse current conditions. In case of the example of the BTS6143D alternatively the BTS6133 can be used as direct replacement. All key parameters (such as resistance, voltage class, kilis ratio) are equal to the BTS6143D. This alternative device differs only in the “forward voltage drop limitation” feature offering less current sense accuracy at low load currents but offering better inverse robustness. Application Note 7 V1.1, 2008-03-31 Inverse Operation Behavior of the BTS6143 and its family members Conclusion Since Infineon offers a wide range of different smart power high side switches there is a big choice for close matching alternatives available. In case further support is needed please contact your nearest Infineon representative or Field Application Engineering for further support. 5 Conclusion Inverse operation is an exceptional operation condition that has to be covered in some applications. This application note provided further information regarding the effects that can be observed with the high current profet BTS6143D and its family members. Additionally information about counter measures or alternatives have been provided. For further information you may contact http://www.infineon.com/ Application Note 8 V1.1, 2008-03-31 Inverse Operation Behavior of the BTS6143 and its family members Revision History 6 Revision History Inverse Operation Behavior Revision History: V1.1, 2008-03-31 Previous Version(s): V1.0 Page Subjects (major changes since last revision) 4 4 OVDL typo corrected header in chapter 3.2.1 renamed from tranient inverse currents to dynamic inverse currents Application Note 9 V1.1, 2008-03-31 Edition 2008-03-31 Published by Infineon Technologies AG 81726 Munich, Germany © 2008 Infineon Technologies AG All Rights Reserved. LEGAL DISCLAIMER THE INFORMATION GIVEN IN THIS APPLICATION NOTE IS GIVEN AS A HINT FOR THE IMPLEMENTATION OF THE INFINEON TECHNOLOGIES COMPONENT ONLY AND SHALL NOT BE REGARDED AS ANY DESCRIPTION OR WARRANTY OF A CERTAIN FUNCTIONALITY, CONDITION OR QUALITY OF THE INFINEON TECHNOLOGIES COMPONENT. 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