AN7800R/AN78M00R Series Positive Output Voltage Regulators with Reset pin (1A/500mA Type) ■ Overview Unit:mm + 0.5 4.0 9.6 – 0.1 ø 3.1 2.0 12.5max. 9.0min. 3–1.0 1.8 0.7±0.2 2.3 2.3 2.3 0.5±0.1 1.5 1.3 3.3max. The AN7800R and the AN78M00R series are the fixed positive output voltage regulators with reset pin. Stabilized fixed output voltage is obtained from unstable DC input voltage without using any external components. Three types of output voltage, 5V, 9V and 12V, are available for the AN7800R series, and four types, 5V, 8V, 9V and 12V, are available for the AN78M00R series. They can be used in power circuits with current capacitance 1A/500mA. ON/OFF of output voltage can be controlled by the reset pin. ■ Features • No external components • Maximum output current :1A (AN7800R) 500mA (AN78M00R) • Output voltage :5V, 9V, 12V (AN7800R) :8V (AN78M08R) • Short-circuit current limiting built-in • Thermal overload protection built-in • Output transistor safe area compensation • ON/OFF of output voltage can be controlled by reset pin. 4-pin SIL Plastic Package with Fin (SSIP004-P-0000) ■ Block Diagram 1 Input Pass Tr Q1 Current Source Starter Voltage Reference Current Limiter + Error Amp. Thermal Protection RSC 3 Output 4 Reset 2 Common R2 – R1 ■ Absolute Maximum Ratings (Ta=25˚C) Symbol Rating Unit Input voltage Parameter VI Power dissipation PD 35 10 *1 W Operating ambient temperature Topr –20 to + 80 ˚C Storage temperature Tstg –55 to + 150 ˚C V *1 Follow the derating curve. When Tj exceeds 150˚C, the internal circuit cuts off the output. ■ Electrical Characteristics (Ta=25˚C) AN7800R Series · AN7805R (1A, 5V Type) Parameter Symbol Output voltage VO Output voltage tolerance VO Line regulation Load regulation REGIN REGL min 4.8 typ max 5 4.75 Unit 5.2 V 5.25 V 3 100 mV 1 50 mV IO=5mA to 1.5A, Tj=25˚C 15 100 mV IO=250 to 750mA, Tj=25˚C 5 50 mV VI=8 to 12V, Tj=25˚C Tj=25˚C 8 mA Input bias current fluctuation ∆Ibias (IN) VI=7.5 to 25V, Tj=25˚C 1.3 mA Load bias current fluctuation ∆Ibias (L) IO=5mA to 1A, Tj=25˚C 0.5 mA Bias current Output noise voltage Ripple rejection ratio Minimum input/output voltage difference Output impedance Ibias Condition Tj=25˚C VI=8 to 20V, IO=5mA to 1A, Tj=0 to 125˚C, PD < = 15W VI=7.5 to 25V, Tj=25˚C Vno f=10Hz to 100kHz RR VI=8 to 18V, IO=100mA, f=120Hz VDIF (min.) ZO IO=1A, Tj=25˚C f=1kHz 3.9 µV 40 62 dB 2 V 17 mΩ 700 mA IO (Short) VI=35V, Tj=25˚C Peak output current IO (Peak) Tj=25˚C Output voltage temperature coefficient ∆VO/Ta IO=5mA, Tj=0 to 125˚C Output voltage at reset VO (Reset) Tj=25˚C, II (Reset)=1mA 1 V Tj=25˚C 1 mA Output short circuit current Reset input current II (Reset) 2 A – 0.3 mV/˚C Note 1) The specified condition Tj=25˚C means that the test should be carried out with the test time so short (within 10ms) that the drift in characteristic value due to the rise in chip junction temperature can be ignored. Note 2) When not specified, VI=10V, IO=100mA, CI=0.33µF, CO=0.1µF, Tj=0 to 125˚C ■ Electrical Characteristics (Ta=25˚C) · AN7809R (1A, 9V Type) Parameter Symbol Output voltage VO Output voltage tolerance VO Line regulation Load regulation REGIN REGL Ibias Bias current Condition Tj=25˚C VI=12 to 24V, IO=5mA to 1A, Tj=0 to 125˚C, PD < = 15W V 9.45 V 7 180 mV 90 mV IO=5mA to 1.5A, Tj=25˚C 12 180 mV IO=250 to 750mA, Tj=25˚C 4 90 mV 3.9 8 mA 1 mA 0.5 mA Tj=25˚C Load bias current fluctuation ∆Ibias (L) IO=5mA to 1A, Tj=25˚C Output noise voltage Vno f=10Hz to 100kHz Ripple rejection ratio RR VI=12 to 22V, IO=100mA, f=120Hz ZO 8.55 Unit 9.35 2 VI=11.5 to 26V, Tj=25˚C Output impedance max 9 VI=12 to 18V, Tj=25˚C ∆Ibias (IN) VDIF (min.) typ 8.65 VI=11.5 to 26V, Tj=25˚C Input bias current fluctuation Minimum input/output voltage difference min µV 57 56 dB IO=1A, Tj=25˚C f=1kHz 2 V 16 mΩ 700 mA Output short circuit current IO (Short) VI=26V, Tj=25˚C Peak output current IO (Peak) Tj=25˚C Output voltage temperature coefficient ∆VO/Ta IO=5mA, Tj=0 to 125˚C Output voltage at reset VO (Reset) Tj=25˚C, II (Reset)=1mA 1 V Tj=25˚C 1 mA Reset input current II (Reset) 2 A – 0.5 mV/˚C Note 1) The specified condition Tj=25˚C means that the test should be carried out with the test time so short (within 10ms) that the drift in characteristic value due to the rise in chip junction temperature can be ignored. Note 2) When not specified, VI=15V, IO=100mA, CI=0.33µF, CO=0.1µF, Tj=0 to 125˚C · AN7812R (1A, 12V Type) Parameter Symbol Output voltage VO Output voltage tolerance VO Line regulation Load regulation Bias current REGIN REGL Ibias Condition Tj=25˚C VI=15 to 27V, IO=5mA to 1A, Tj=0 to 125˚C, PD < = 15W VI=14.5 to 30V, Tj=25˚C Unit 12.5 V 12.6 V 10 240 mV 3 120 mV 240 mV IO=250 to 750mA, Tj=25˚C 4 120 mV Tj=25˚C 4 8 mA 1 mA 0.5 mA ∆Ibias (IN) ∆Ibias (L) IO=5mA to 1A, Tj=25˚C Output noise voltage Vno f=10Hz to 100kHz Ripple rejection ratio RR VI=15 to 25V, IO=100mA, f=120Hz ZO max 12 12 Load bias current fluctuation Output impedance typ 11.4 VI=16 to 22V, Tj=25˚C Input bias current fluctuation Minimum input/output voltage difference 11.5 IO=5mA to 1.5A, Tj=25˚C VI=14.5 to 30V, Tj=25˚C VDIF (min.) min IO=1A, Tj=25˚C f=1kHz µV 75 55 dB 2 V 18 mΩ 700 mA Output short circuit current IO (Short) VI=35V, Tj=25˚C Peak output current IO (Peak) Tj=25˚C Output voltage temperature coefficient ∆VO/Ta IO=5mA, Tj=0 to 125˚C Output voltage at reset VO (Reset) Tj=25˚C, II (Reset)=1mA 1 V Tj=25˚C 1 mA Reset input current II (Reset) 2 A – 0.8 mV/˚C Note 1) The specified condition Tj=25˚C means that the test should be carried out with the test time so short (within 10ms) that the drift in characteristic value due to the rise in chip junction temperature can be ignored. Note 2) When not specified, VI=19V, IO=100mA, CI=0.33µF, CO=0.1µF, Tj=0 to 125˚C ■ Electrical Characteristics (Ta=25˚C) AN78M00R Series · AN78M05R (500mA, 5V Type) Symbol Condition Output voltage Parameter VO Output voltage tolerance VO Tj=25˚C VI=7.5 to 20V, IO=5 to 350mA, Tj=0 to 125˚C, PD < = 15W Line regulation Load regulation REGIN REGL Ibias Bias current max 5 4.75 Unit 5.2 V 5.25 V 3 100 mV VI=8 to 25V, Tj=25˚C 1 50 mV IO=5 to 500mA, Tj=25˚C 20 100 mV IO=5 to 200mA, Tj=25˚C 10 50 mV Tj=25˚C 4.6 6 mA 0.8 mA 0.5 mA ∆Ibias (IN) VI=8 to 25V, Tj=25˚C Load bias current fluctuation ∆Ibias (L) IO=5 to 350mA, Tj=25˚C Output noise voltage Vno f=10Hz to 100kHz Ripple rejection ratio RR VI=8 to 18V, IO=100mA, f=120Hz VDIF (min.) typ 4.8 VI=7.5 to 25V, Tj=25˚C Input bias current fluctuation Minimum input/output voltage difference min µV 40 62 dB IO=500mA, Tj=25˚C 2 V 300 mA Output short circuit current IO (Short) VI=35V, Tj=25˚C Peak output current IO (Peak) Tj=25˚C Output voltage temperature coefficient ∆VO/Ta IO=5mA, Tj=0 to 125˚C Output voltage at reset VO (Reset) Tj=25˚C, II (Reset)=1mA 1 V Tj=25˚C 1 mA Reset input current II (Reset) 700 mA – 0.5 mV/˚C Note 1) The specified condition Tj=25˚C means that the test should be carried out with the test time so short (within 10ms) that the drift in characteristic value due to the rise in chip junction temperature can be ignored. Note 2) When not specified, VI=10V, IO=350mA, CI=0.33µF, CO=0.1µF, Tj=0 to 125˚C · AN78M08R (500mA, 8V Type) Parameter Symbol Condition Output voltage VO Output voltage tolerance VO Tj=25˚C VI=10.5 to 23V, IO=5 to 350mA, Tj=0 to 125˚C, PD < = 15W Line regulation Load regulation REGIN REGL 7.7 typ max 8 7.6 Unit 8.3 V 8.4 V VI=10.5 to 25V, Tj=25˚C 6 100 mV VI=11 to 25V, Tj=25˚C 2 50 mV IO=5 to 500mA, Tj=25˚C 25 160 mV IO=5 to 200mA, Tj=25˚C 10 80 mV Tj=25˚C 4.1 6 mA Input bias current fluctuation ∆Ibias (IN) VI=10.5 to 25V, Tj=25˚C 0.8 mA Load bias current fluctuation ∆Ibias (L) IO=5 to 350mA, Tj=25˚C 0.5 mA Bias current Output noise voltage Ripple rejection ratio Minimum input/output voltage difference Ibias min Vno f=10Hz to 100kHz RR VI=11.5 to 21.5V, IO=100mA, f=120Hz VDIF (min.) IO=500mA, Tj=25˚C µV 52 56 dB 2 V Output short circuit current IO (Short) VI=35V, Tj=25˚C 300 mA Peak output current IO (Peak) Tj=25˚C 0.7 A Output voltage temperature coefficient ∆VO/Ta IO=5mA, Tj=0 to 125˚C Output voltage at reset VO (Reset) Tj=25˚C, II (Reset)=1mA 1 V Tj=25˚C 1 mA Reset input current II (Reset) – 0.5 mV/˚C Note 1) The specified condition Tj=25˚C means that the test should be carried out with the test time so short (within 10ms) that the drift in characteristic value due to the rise in chip junction temperature can be ignored. Note 2) When not specified, VI=14V, IO=350mA, CI=0.33µF, CO=0.1µF, Tj=0 to 125˚C ■ Electrical Characteristics (Ta=25˚C) · AN78M09R (500mA, 9V Type) Symbol Condition Output voltage Parameter VO Output voltage tolerance VO Tj=25˚C VI=11.5 to 24V, IO=5 to 350mA, Tj=0 to 125˚C, PD < = 15W Line regulation Load regulation REGIN REGL Ibias Bias current min typ 8.65 max 9 8.55 Unit 9.35 V 9.45 V VI=11.5 to 25V, Tj=25˚C 7 100 mV VI=12 to 25V, Tj=25˚C 2 50 mV 25 180 mV IO=5 to 500mA, Tj=25˚C IO=5 to 200mA, Tj=25˚C 10 90 mV Tj=25˚C 4.1 6.0 mA Input bias current fluctuation ∆Ibias (IN) VI=12 to 25V, Tj=25˚C 0.8 mA Load bias current fluctuation ∆Ibias (L) IO=5 to 350mA, Tj=25˚C 0.5 mA Output noise voltage Vno f=10Hz to 100kHz Ripple rejection ratio RR VI=12 to 22V, IO=100mA, f=120Hz Minimum input/output voltage difference VDIF (min.) µV 60 56 dB IO=500mA, Tj=25˚C 2 V 300 mA IO (Short) VI=35V, Tj=25˚C Peak output current IO (Peak) Tj=25˚C Output voltage temperature coefficient ∆VO/Ta IO=5mA, Tj=0 to 125˚C Output voltage at reset VO (Reset) Tj=25˚C, II (Reset)=1mA 1 V Tj=25˚C 1 mA Output short circuit current Reset input current II (Reset) 0.7 A – 0.5 mV/˚C Note 1) The specified condition Tj=25˚C means that the test should be carried out with the test time so short (within 10ms) that the drift in characteristic value due to the rise in chip junction temperature can be ignored. Note 2) When not specified, VI=15V, IO=350mA, CI=0.33µF, CO=0.1µF, Tj=0 to 125˚C · AN78M12R (500mA, 12V Type) Symbol Condition Output voltage Parameter VO Output voltage tolerance VO Tj=25˚C VI=14.5 to 27V, IO=5 to 350mA, Tj=0 to 125˚C, PD < = 15W Line regulation Load regulation Bias current REGIN REGL Ibias typ max 12 11.4 Unit 12.5 V 12.6 V 8 100 mV VI=16 to 30V, Tj=25˚C 2 50 mV IO=5 to 500mA, Tj=25˚C 25 240 mV IO=5 to 200mA, Tj=25˚C 10 120 mV Tj=25˚C 4.3 6 mA 0.8 mA 0.5 mA ∆Ibias (IN) VI=14.5 to 30V, Tj=25˚C Load bias current fluctuation ∆Ibias (L) IO=5 to 350mA, Tj=25˚C Output noise voltage Vno f=10Hz to 100kHz Ripple rejection ratio RR VI=15 to 25V, IO=100mA, f=120Hz VDIF (min.) 11.5 VI=14.5 to 30V, Tj=25˚C Input bias current fluctuation Minimum input/output voltage difference min IO=500mA, Tj=25˚C µV 75 55 dB 2 V mA Output short circuit current IO (Short) VI=35V, Tj=25˚C 300 Peak output current IO (Peak) Tj=25˚C, VI=35V 700 mA Output voltage remperature coefficient ∆VO/Ta IO=5mA, Tj=0 to 125˚C – 0.5 mV/˚C Output voltage at reset VO (Reset) Reset input current II (Reset) Tj=25˚C, II (Reset)=1mA 1 V Tj=25˚C 1 mA Note 1) The specified condition Tj=25˚C means that the test should be carried out with the test time so short (within 10ms) that the drift in characteristic value due to the rise in chip junction temperature can be ignored. Note 2) When not specified, VI=19V, IO=350mA, CI=0.33µF, CO=0.1µF, Tj=0 to 125˚C ■ Characteristic Curve PD –Ta VO (Reset) – IO Output Voltage at Reset VO (Reset) (mV) (1) Infinite Heat Sink (2) 5˚C/W Heat Sink (3) 15˚C/W Heat Sink (4) Without Heat Sink 14 Power Dissipation PD (W) II (Reset) – Tj 1000 12 (1) 10 8 (2) 6 (3) 4 (4) 2 1.0 CI=0.33µF CO=0.1µF Tj=25˚C 800 Reset Current II (Reset) (mA) 16 VI=20V 600 VI=10V 400 VI=30V 200 0.8 0.6 0.4 0.2 VI=7V 0 0 40 80 120 0 0.1 160 Ambient Temperature Ta (˚C) 1 10 100 0 –40 1000 Output Current IO (mA) 0 40 80 120 Junction Temperature Tj (˚C) ■ Basic Regulator Circuit Input Output 1 3 * 7406etc. AN7800R AN78M00R 4 CI can be used. Beware of the breakdown of TTL, as the reset pin bears voltage higher than the output voltage VO by 1—2V. CO Reset 2 * For TTL, an open collector type inverter, buffer, gate etc. CI is set when the input line is long. CO improves the temperature response. ■ Application Circuit (1) Soft Start Circuit (2) Several Output Reset Circuits Output Input 1 1 3 AN7800R AN78M00R 4 0.33µF Output Input 3 AN7800R AN78M00R 2 0.1µF 1kΩ 0.33µF 2 1kΩ 4 R 0.1µF Q C Output Voltage Rise Time tr (s) ✼ Control of Output Voltage Rise Time Input 1 3 AN7800R AN78M00R 10 0.33µF 1 4 SW 2 1kΩ 0.1 1 10 Capacity C (µF) 100 R 0.1µF 160