SPB17N80C3 CoolMOS® Power Transistor Product Summary Features • new revolutionary high voltage technology • Extreme dv/dt rated V DS 800 V R DS(on)max @ Tj = 25°C 0.29 Ω 91 nC Q g,typ • High peak current capability • Qualified according to JEDEC1) for target applications PG-TO263 • Pb-free lead plating; RoHS compliant • Ultra low gate charge • Ultra low effective capacitances CoolMOSTM 800V designed for: • Industrial application with high DC bulk voltage • Switching Application (i.e. active clamp forward) Type Package Marking SPB17N80C3 PG-TO263 17N80C3 Maximum ratings, at T j=25 °C, unless otherwise specified Parameter Symbol Conditions Continuous drain current ID Value T C=25 °C 17 T C=100 °C 11 Pulsed drain current2) I D,pulse T C=25 °C 51 Avalanche energy, single pulse E AS I D=3.4 A, V DD=50 V 670 Avalanche energy, repetitive t AR2),3) E AR I D=17 A, V DD=50 V 0.5 Avalanche current, repetitive t AR2),3) I AR MOSFET dv /dt ruggedness dv /dt Gate source voltage V GS Power dissipation P tot Operating and storage temperature T j, T stg Rev. 2.5 Unit A mJ 17 A V DS=0…640 V 50 V/ns static ±20 V AC (f >1 Hz) ±30 T C=25 °C 227 W -55 ... 150 °C page 1 2011-09-27 SPB17N80C3 Maximum ratings, at T j=25 °C, unless otherwise specified Parameter Symbol Conditions Continuous diode forward current IS Diode pulse current 2) I S,pulse Reverse diode dv /dt 4) dv /dt Parameter Symbol Conditions Value Unit 17 T C=25 °C A 51 4 V/ns Values Unit min. typ. max. - - 0.55 SMD version, device on PCB, minimal footprint - - 62 SMD version, device on PCB, 6 cm2 cooling area4) - 35 - MSL1; 10s - - 260 °C 800 - - V - 870 - Thermal characteristics Thermal resistance, junction - case R thJC R thJA Thermal resistance, junction ambient Soldering temperature, reflow soldering T sold K/W Electrical characteristics, at T j=25 °C, unless otherwise specified Static characteristics Drain-source breakdown voltage V (BR)DSS V GS=0 V, I D=250 µA Avalanche breakdown voltage V (BR)DS V GS=0 V, I D=17 A Gate threshold voltage V GS(th) V DS=V GS, I D=1.0 mA 2.1 3 3.9 Zero gate voltage drain current I DSS V DS=800 V, V GS=0 V, T j=25 °C - - 25 V DS=800 V, V GS=0 V, T j=150 °C - 150 - µA Gate-source leakage current I GSS V GS=20 V, V DS=0 V - - 100 nA Drain-source on-state resistance R DS(on) V GS=10 V, I D=11 A, T j=25 °C - 0.25 0.29 Ω V GS=10 V, I D=11 A, T j=150 °C - 0.67 - f =1 MHz, open drain - 0.85 - Gate resistance Rev. 2.5 RG page 2 Ω 2011-09-27 SPB17N80C3 Parameter Values Symbol Conditions Unit min. typ. max. - 2300 - - 94 - - 72 - - 210 - - 25 - - 15 - - 72 - Dynamic characteristics Input capacitance C iss Output capacitance C oss Effective output capacitance, energy related6) C o(er) Effective output capacitance, time related7) C o(tr) Turn-on delay time t d(on) V GS=0 V, V DS=100 V, f =1 MHz pF V GS=0 V, V DS=0 V to 480 V V DD=400 V, V GS=0/10 V, I D=17 A, R G=4.7 Ω, Tj = 125°C ns Rise time tr Turn-off delay time t d(off) Fall time tf - 12 - Gate to source charge Q gs - 12 - Gate to drain charge Q gd - 45 - Gate charge total Qg - 88 117 Gate plateau voltage V plateau - 5.5 - V - 1 1.2 V - 550 - ns - 15 - µC - 51 - A Gate Charge Characteristics V DD=640 V, I D=17 A, V GS=0 to 10 V nC Reverse Diode Diode forward voltage V SD Reverse recovery time t rr Reverse recovery charge Q rr Peak reverse recovery current I rrm V GS=0 V, I F=IS, T j=25 °C V R=400 V, I F=I S, di F/dt =100 A/µs 1) J-STD20 and JESD22 2) Pulse width t p limited by T j,max 3) Repetitive avalanche causes additional power losses that can be calculated as P AV=E AR*f. 4) ISD≤ID, di/dt≤200A/µs, VDClink = 400V, Vpeak<V(BR)DSS, Tj<Tjmax , identical low side and high side switch 5) Device on 40mm*40mm*1.5 epoxy PCB FR4 with 6cm2 (one layer, 70µm thick) copper area for drain connection. PCB is vertical without blown air 6) C o(er) is a fixed capacitance that gives the same stored energy as C oss while V DS is rising from 0 to 80% V DSS. 7) C o(tr) is a fixed capacitance that gives the same charging time as C oss while V DS is rising from 0 to 80% V DSS. Rev. 2.5 page 3 2011-09-27 SPB17N80C3 1 Power dissipation 2 Safe operating area P tot=f(T C) I D=f(V DS); T C=25 °C; D =0 parameter: t p 102 240 limited by on-state resistance 200 10 µs 101 160 1 µs 100 µs I D [A] P tot [W] 1 ms 120 DC 10 ms 100 80 40 10-1 0 0 25 50 75 100 125 1 150 10 T C [°C] 100 1000 V DS [V] 3 Max. transient thermal impedance 4 Typ. output characteristics ZthJC=f(tP) I D=f(V DS); T j=25 °C parameter: D=t p/T parameter: V GS 100 60 20 V 50 10 V 0.5 0.2 I D [A] Z thJC [K/W] 40 10-1 0.1 30 6.5 V 0.05 20 0.02 6V 0.01 5.5 V 10 single pulse 5V 10-2 10-5 0 10-4 10-3 10-2 10-1 t p [s] Rev. 2.5 0 5 10 15 20 25 V DS [V] page 4 2011-09-27 SPB17N80C3 5 Typ. output characteristics 6 Typ. drain-source on-state resistance I D=f(V DS); T j=150 °C R DS(on)=f(I D); T j=150 °C parameter: V GS parameter: V GS 35 1.4 20 V 1.3 30 10 V 1.2 6V 25 1.1 R DS(on) [Ω] I D [A] 20 5.5 V 15 10 V 1 6.5 V 0.9 5V 6V 10 0.8 5.5 V 4.5 V 4V 5 5V 4.5 V 0.7 0 0.6 0 5 10 15 20 25 0 10 20 30 40 50 I D [A] V DS [V] 7 Drain-source on-state resistance 8 Typ. transfer characteristics R DS(on)=f(T j); I D=11 A; V GS=10 V I D=f(V GS); |V DS|>2|I D|R DS(on)max parameter: T j 60 0.8 25 °C 50 0.6 I D [A] R DS(on) [Ω] 40 0.4 98 % typ 30 150 °C 20 0.2 10 0 0 -60 -20 20 60 100 140 180 T j [°C] Rev. 2.5 0 2 4 6 8 10 V GS [V] page 5 2011-09-27 SPB17N80C3 9 Typ. gate charge 10 Forward characteristics of reverse diode V GS=f(Q gate); I D=17 A pulsed I F=f(V SD) parameter: V DD parameter: T j 102 10 150°C (98%) 8 160 V 25 °C 640 V 25°C (98°C) 101 6 I F [A] V GS [V] 150 °C 4 100 2 10-1 0 0 20 40 60 80 0 100 0.5 1 Q gate [nC] 1.5 12 Drain-source breakdown voltage E AS=f(T j); I D=3.4 A; V DD=50 V V BR(DSS)=f(T j); I D=0.25 mA 700 960 600 920 500 880 V BR(DSS) [V] E AS [mJ] 11 Avalanche energy 400 300 840 800 200 760 100 720 0 680 25 50 75 100 125 150 T j [°C] Rev. 2.5 2 V SD [V] -60 -20 20 60 100 140 180 T j [°C] page 6 2011-09-27 SPB17N80C3 13 Typ. capacitances 14 Typ. Coss stored energy C =f(V DS); V GS=0 V; f =1 MHz E oss= f(V DS) 18 104 16 Ciss 14 103 102 E oss [µJ] C [pF] 12 Coss 10 8 6 101 Crss 4 2 100 0 0 100 200 300 400 500 600 700 800 900 V DS [V] Rev. 2.5 0 100 200 300 400 500 600 700 800 V DS [V] page 7 2011-09-27 SPB17N80C3 Definition of diode switching characteristics Rev. 2.5 page 8 2011-09-27 SPB17N80C3 PG-TO263: Outline Rev. 2.5 page 9 2011-09-27 SPB17N80C3 Published by Infineon Technologies AG 81726 Munich, Germany © 2008 Infineon Technologies AG All Rights Reserved. Legal Disclaimer The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights of any third party. Information For further information on technology, delivery terms and conditions and prices, please contact the nearest Infineon Technologies Office (www.infineon.com). Warnings Due to technical requirements, components may contain dangerous substances. For information on the types in question, please contact the nearest Infineon Technologies Office. Infineon Technologies components may be used in life-support devices or systems only with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered. Rev. 2.5 page 10 2011-09-27