INTERSIL EL5132ISZ-T13

EL5132, EL5133
®
Data Sheet
October 26, 2005
670MHz Low Noise Amplifiers
Features
The EL5132 and EL5133 are ultra-low voltage noise, high
speed voltage feedback amplifiers that are ideal for
applications requiring low voltage noise, including
communications and imaging. These devices offer extremely
low power consumption for exceptional noise performance.
Stable at gains as low as 10, these devices offer 120mA of
drive performance. Not only do these devices find perfect
application in high gain applications, they maintain their
performance down to lower gain settings.
• 670MHz -3dB bandwidth
These amplifiers are available in small package options
(SOT-23) as well as the industry-standard SO packages. All
parts are specified for operation over the -40°C to +85°C
temperature range.
Pinouts
FN7382.5
• Ultra low noise 0.9nV/√Hz
• 1000V/µs slew rate
• Low supply current = 12mA
• Single supplies from 5V to 12V
• Dual supplies from ±2.5V to ±5V
• Fast disable on the EL5132
• Low cost
• Pb-free plus anneal available (RoHS compliant)
Applications
• Imaging
EL5132
(8 LD SO)
TOP VIEW
• Instrumentation
• Communications devices
NC 1
8 CE
IN- 2
7 VS+
IN+ 3
+
6 OUT
VS- 4
5 NC
EL5133
(5 LD SOT-23)
TOP VIEW
OUT 1
VS- 2
5 VS+
+ -
IN+ 3
4 IN-
Ordering Information
PART
NUMBER
PART
MARKING
PACKAGE
TAPE &
REEL
PKG.
DWG. #
EL5132IS
5132IS
8 Ld SO
-
MDP0027
EL5132IS-T7
5132IS
8 Ld SO
7”
MDP0027
EL5132IS-T13
5132IS
8 Ld SO
13”
MDP0027
EL5132ISZ
(See Note)
5132ISZ
8 Ld SO
(Pb-free)
-
MDP0027
EL5132ISZ-T7
(See Note)
5132ISZ
8 Ld SO
(Pb-free)
7”
MDP0027
EL5132ISZ-T13 5132ISZ
(See Note)
8 Ld SO
(Pb-free)
13”
MDP0027
BCAA
5 Ld SOT-23
7”
(3K pcs)
MDP0038
EL5133IW-T7A BCAA
5 Ld SOT-23
7”
MDP0038
(250 pcs)
EL5133IW-T7
NOTE: Intersil Pb-free plus anneal products employ special Pb-free
material sets; molding compounds/die attach materials and 100%
matte tin plate termination finish, which are RoHS compliant and
compatible with both SnPb and Pb-free soldering operations. Intersil
Pb-free products are MSL classified at Pb-free peak reflow
temperatures that meet or exceed the Pb-free requirements of
IPC/JEDEC J STD-020.
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2003-2005. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
EL5132, EL5133
Absolute Maximum Ratings (TA = 25°C)
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +125°C
Ambient Operating Temperature . . . . . . . . . . . . . . . .-40°C to +85°C
Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . . . +125°C
Supply Voltage from VS+ to VS- . . . . . . . . . . . . . . . . . . . . . . . 13.2V
IIN-, IIN+, CE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±5mA
Continuous Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . 150mA
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Curves
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests
are at the specified temperature and are pulsed tests, therefore: TJ = TC = TA
Electrical Specifications
PARAMETER
VS+ = +5V, VS- = -5V, RL = 500Ω, RF = 225Ω, RG = 25Ω, TA = 25°C, unless otherwise specified.
DESCRIPTION
CONDITIONS
MIN
TYP
MAX
UNIT
-1
0.5
1
mV
VOS
Offset Voltage
TCVOS
Offset Voltage Temperature Coefficient
Measured from TMIN to TMAX
IB
Input Bias Current
VIN = 0V
8
12
20
µA
IOS
Input Offset Current
VIN = 0V
-1250
400
+1250
nA
TCIOS
Input Bias Current Temperature
Coefficient
Measured from TMIN to TMAX
PSRR
Power Supply Rejection Ratio
VS+ = ±4.75V to ±5.25V
CMRR
Common Mode Rejection Ratio
CMIR
0.8
µV/°C
3
nA/°C
75
87
dB
VIN = ±3.0 V
80
100
dB
Common Mode Input Range
Guaranteed by CMRR test
±3
±3.3
V
RIN
Input Resistance
Common mode
2
5
MΩ
CIN
Input Capacitance
2
pF
IS
Supply Current
AVOL
Open Loop Gain
VOUT = ±2.5V, RL = 1kΩ to GND
VO
Output Voltage Swing
RF = 900Ω, RG = 100Ω, RL = 150Ω
ISC
Short Circuit Current
RL = 10Ω
BW
-3dB Bandwidth
BW
±0.1dB Bandwidth
GBWP
Gain Bandwidth Product
PM
Phase Margin
RL = 1kΩ, CL = 6pF
SR
Slew Rate
RL = 100Ω, VOUT = ±2.5V
tR, tF
Rise Time, Fall Time
OS
9.2
11
5
8.5
KV/V
±3.1
3.5
V
70
140
mA
AV = +10, RL = 1kΩ
670
MHz
AV = +10, RL = 1kΩ
90
MHz
3000
MHz
55
°
1000
V/µs
±0.1VSTEP
TBD
ns
Overshoot
±0.1VSTEP
TBD
%
tPD
Propagation Delay
±0.1VSTEP
TBD
ns
tS
0.01% Settling Time
6.6
ns
dG
Differential Gain
AV = +2, RF = 1kΩ
0.01
%
dP
Differential Phase
AV = +2, RF = 1kΩ
0.01
°
eN
Input Noise Voltage
f = 10kHz
0.9
nV/√Hz
iN
Input Noise Current
f = 10kHz
4.9
pA/√Hz
2
700
13
mA
EL5132, EL5133
Typical Performance Curves
VS=±5V
AV=+10
RG=25
RL=500Ω
CL=+1pF
3
2
300
5
240
4
180
NORMALIZED GAIN (dB)
NORMALIZED GAIN (dB)
4
120
GAIN
1
60
0
0
-60
-1
PHASE (°)
5
-120
-2
PHASE
-3
-180
3
2
1
0
-1
-2
-3
-4
-240
-4
-5
100k
-300
-5
100k
1M
10M
100M
1G
-3dB BW @ 700MHz
1M
FREQUENCY (Hz)
0.5
5
0.4
4
0.3
0.1dB BW @ 30MHz
0.2
0.1
0
-0.1
-0.2
-0.3
2
0
-1
-2
AV=+30
-3
-4
-5
100k
100M
VS=±5V
RL=500Ω
60
50
40
GAIN=40dB or 100
FREQ.=31.6MHz
GAIN BW PRODUCT=31.6x100=3160MHz
30
20
1.0
10.0
100.0
FREQUENCY (MHz)
FIGURE 5. GAIN BANDWIDTH PRODUCT
3
AV=+20
1M
10M
100M
FREQUENCY (Hz)
1G
FIGURE 4. GAIN vs FREQUENCY FOR VARIOUS +AV
GAIN-BANDWIDTH PRODUCT (MHz)
70
AV=+10
1
-0.5
100k
FIGURE 3. 0.1dB BANDWIDTH
GAIN (dB)
3
VS=±5V
RG=25Ω
RL=500Ω
CL=+1pF
-0.4
10M
FREQUENCY (Hz)
1G
FIGURE 2. -3dB BANDWIDTH
NORMALIZED GAIN (dB)
NORMALIZED GAIN (dB)
FIGURE 1. GAIN & PHASE vs FREQUENCY
10M
100M
FREQUENCY (Hz)
4000
3500
VS=±5V
RL=500Ω
3000
2500
2000
1500
1000
3.0
3.5
4.0
4.5
5.0
5.5
6.0
SUPPLY VOLTAGES (±V)
FIGURE 6. GAIN BANDWIDTH PRODUCT vs SUPPLY
VOLTAGES
EL5132, EL5133
Typical Performance Curves (Continued)
NORMALIZED GAIN (dB)
4
3
2
5
AV=+10
RG=25Ω
RL=500Ω
CL=+1pF
4
NORMALIZED GAIN (dB)
5
VS=±4
1
0
-1
VS=±6
-2
VS=±5V
-3
VS=±3V
-4
-5
100k
10M
100M
2
RL=1kΩ
1
0
-1
-2
RL=100Ω
RL=150Ω
-3
RL=500Ω
-4
VS=±2.5V
1M
3
VS=±5V
AV=+10
RG=25Ω
CL=+1pF
-5
100k
1G
1M
FREQUENCY (Hz)
FIGURE 7. GAIN vs FREQUENCY FOR VARIOUS ±VS
NORMALIZED GAIN (dB)
4
3
2
5
VS=±5V
AV=+20
RG=25Ω
CL=+1pF
4
RL=1kΩ
1
0
-1
RL=500Ω
RL=150Ω
-2
-3
RL=100Ω
-4
-5
100k
1M
10M
100M
FREQUENCY (Hz)
3
2
1
3
2
1
CL=23pF
CL=12pF
0
-1
-2
CL=1pF
CL=1pF
-2
-3
4
10M
3
2
VS=±5V
AV=+10
RL=500Ω
CL=+1pF
100M
1G
0
-1
-2
FIGURE 11. GAIN vs FREQUENCY FOR VARIOUS CLOAD
(AV = +20)
RF=90Ω
-3
-5
100k
1G
RF=900Ω
RF=450Ω
1
-4
10M
100M
FREQUENCY (Hz)
1M
FIGURE 10. GAIN vs FREQUENCY FOR VARIOUS CLOAD
(AV = +10)
-5
100k
4
CL=6.8pF
0
-4
1M
CL=12pF
FREQUENCY (Hz)
CL=39pF
-3
CL=3.3pF
-1
5
VS=±5V
AV=+20
RG=25Ω
RF=475
RL=500Ω
VS=±5V
AV=+10
RG=25Ω
RF=225Ω
RL=500Ω
-5
100k
1G
NORMALIZED GAIN (dB)
NORMALIZED GAIN (dB)
4
1G
-4
FIGURE 9. GAIN vs FREQUENCY FOR VARIOUS RLOAD
(AV = +20)
5
100M
FIGURE 8. GAIN vs FREQUENCY FOR VARIOUS RLOAD
(AV = +10)
NORMALIZED GAIN (dB)
5
10M
FREQUENCY (Hz)
RF=225Ω
1M
10M
100M
1G
FREQUENCY (Hz)
FIGURE 12. GAIN vs FREQUENCY FOR VARIOUS RF (AV = +10)
EL5132, EL5133
Typical Performance Curves (Continued)
5
2
RF=1.9kΩ
1
0
-1
-2
RF=953Ω
RF=190Ω
-3
RF=475Ω
-4
-5
100k
VS=±5V
AV=+10
RG=25Ω
RL=500Ω
CL=+1pF
4
1M
10M
100M
3
2
1
0
CIN=2.2pF
-2
CIN=0pF
-3
-4
-5
100k
1G
FIGURE 13. GAIN vs FREQUENCY FOR VARIOUS RF (AV = +20)
1M
2
1
CIN=15pF
CIN=12pF
0
-1
CIN=8.2pF
-2
-3
-5
100k
1M
10M
100M
FREQUENCY (Hz)
300
240
70
180
60
120
50
60
OPEN LOOP PHASE
40
0
30
-60
OPEN LOOP GAIN
20
-120
10
-180
0
-240
-10
1G
1k
10k
100k
1M
10M
100M
1G
-300
FREQUENCY (Hz)
FIGURE 15. GAIN vs FREQUENCY FOR VARIOUS CIN
(AV = +20)
FIGURE 16. OPEN LOOP GAIN & PHASE vs FREQUENCY
-10
VS=±5V
-20
-30
10
CMRR (dB)
OUTPUT IMPEDANCE (Ω)
1G
Vs=±5V
80
CIN=0pF
-4
100
90
OPEN LOOP GAIN (dB)
NORMALIZED GAIN (dB)
3
10M
100M
FREQUENCY (Hz)
FIGURE 14. GAIN vs FREQUENCY FOR VARIOUS CIN(-)
(AV = +10)
CIN=22pF
VS=±5V
AV=+20
RG=25Ω
RL=500Ω
CL=+1pF
4
CIN=3.9pF
-1
FREQUENCY (Hz)
5
CIN=6.8pF
1
AV=+10
VS=±5V
-40
-50
-60
-70
-80
0.10
-90
-100
0.01
10k
100k
1M
10M
100M
-110
1k
10k
100k
1M
10M
100M 500M
FREQUENCY (MHz)
FREQUENCY (Hz)
FIGURE 17. OUTPUT IMPEDANCE vs FREQUENCY
FIGURE 18. CMRR vs FREQUENCY
5
PHASE (°)
3
5
VS=±5V
AV=+20
RL=500Ω
CL=+1pF
NORMALIZED GAIN (dB)
NORMALIZED GAIN (dB)
4
EL5132, EL5133
Typical Performance Curves (Continued)
10
OUTPUT SWING GAIN (dB)
-10
PSRR (dB)
5
AV=+10
VS=±5V
0
-20
-30
-40
-50
VS-
-60
-70
VS+
-80
-90
1k
10k
100k
1M
10M
3
2
1
VOUT=240mVp-p
0
-1
VOUT=670mVp-p
-2
VOUT=2.1Vp-p
-3
VOUT=3.8Vp-p
-4
-5
100M 500M
VS=±5V
AV=+10
RG=25Ω
RL=500Ω
CL=+1pF
4
VOUT=6.6Vp-p
1M
10M
100M
FREQUENCY (Hz)
FREQUENCY (Hz)
20
15
10
5
0
-5
-10
-15
-20
-25
-30
-35
-40
FIGURE 20. OUTPUT SWING vs FREQUENCY
-40
VS=±5V
AV=+10
RG=25Ω
RL=500Ω
-60
-70
-80
INPUT TO OUTPUT
-90
OUTPUT TO INPUT
-100
-110
-120
-130
0
1M
10M
100M
-140
100k
1G
1M
10M
100M
FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE 21. GROUP DELAY vs FREQUENCY
FIGURE 22. INPUT & OUTPUT ISOLATION
-20
VS=±5V
-40 AV=+10
RG=25Ω
-50 RL=500Ω
VOUT=2Vp-p
HARMONIC DISTORTION (dBc)
-30
HARMONIC DISTORTION (dBc)
VS=±5V
AV=+20
RG=25
CHIP DISABLED
-50
ISOLATION (dB)
GROUP DELAY (ns)
FIGURE 19. PSRR vs FREQUENCY
1G
T.H.D
-60
-70
-80
2nd H.D
3rd H.D
-90
-100
-40
5
10
15
20
25
30
35
FUNDAMENTAL FREQUENCY (MHz)
40
FIGURE 23. HARMONIC DISTORTION vs FREQUENCY
6
FIN=10MHz
-50
-60
-70
-80
-90
-100
0
VS=±5V
AV=+10
RG=25Ω
RL=500Ω
-30
FIN=1MHz
0
1
2
3
4
5
6
OUTPUT LEVEL (Vp-p)
7
8
FIGURE 24. TOTAL HARMONIC DISTORTION vs OUTPUT
VOLTAGE
EL5132, EL5133
Typical Performance Curves (Continued)
6
4
ENABLE SIGNAL
3
2
1
0
-1
-3
-400 -200
0
200
400
600
4
DISABLE SIGNAL
3
OUTPUT SIGNAL
2
1
0
-1
OUTPUT SIGNAL
-2
VS=±5V
RL=500Ω
VOUT=2Vp-p
5
AMPLITUDE (V)
AMPLITUDE (V)
6
VS=±5V
RL=500Ω
VOUT=2Vp-p
5
800
-2
-1000 -800 -600 -400 -200 0
TIME (ns)
1000 1200
TIME (ns)
FIGURE 25. ENABLE TIME
1000.0
CURRENT NOISE (pA/√Hz)
VS=±5V
10.0
1.0
0.1
0.0
10
100
1k
10k
FREQUENCY (Hz)
100k
AMPLITUDE (V)
1.0
0.1
0.2
1.0
0.0
TRISE=2.12ns
-0.4
-40 -20 0
RL=500Ω
CL=+1pF
VOUT=500mV
20 40 60 80 100 120 140 160 180
TIME (ns)
FIGURE 29. SMALL SIGNAL STEP RESPONSE_RISE & FALL
TIME
7
10
100
1k
10k
100k
FREQUENCY (Hz)
1M
FIGURE 28. EQUIVALENT INPUT CURRENT NOISE vs
FREQUENCY
2.0
TFALL=2.02ns
VS=±5V
10.0
0.4
VS=±5V
AV=+10
RG=25Ω
600
100.0
1M
FIGURE 27. EQUIVALENT INPUT VOLTAGE NOISE vs
FREQUENCY
-0.2
400
FIGURE 26. DISABLE TIME
AMPLITUDE (V)
VOLTAGE NOISE (nV/√Hz)
100.0
200
TFALL=2.05ns
0.0
TRISE=2.02ns
-1.0
-2.0
-40 -20 0
VS=±5V
AV=+10
RG=25Ω
RL=500Ω
CL=1pF
VOUT=2.0V
20 40 60 80 100 120 140 160 180
TIME (ns)
FIGURE 30. LARGE SIGNAL STEP RESPONSE_RISE & FALL
TIME
EL5132, EL5133
Typical Performance Curves (Continued)
1200
RG=25Ω
RL=500Ω
CL=+1pF
11.8
11.6
1000
11.4
11.2
11.0
10.8
10.6
Please note that the curve showed
positive current. The negative current was almost the same.
10.4
10.2
10.0
2.5
3.0
3.5
4.0
4.5
5.0
SUPPLY VOLTAGE (V)
5.5
6.0
700
0.8
0.6
500
300
2.0
SO8
θJA=110°C/W
0.4
SOT23-5
θJA=230°C/W
0
25
50
75 85 100
125
150
AMBIENT TEMPERATURE (°C)
FIGURE 33. PACKAGE POWER DISSIPATION vs AMBIENT
TEMPERATURE
8
2.5
3.0 3.5 4.0 4.5 5.0
SUPPLY VOLTAGES (±V)
5.5
6.0
FIGURE 32. SLEW RATE vs SUPPLY VOLTAGES
1
435mW
0.2
AV=+10
RG=25Ω
RL=500Ω
CL=+1pF
VOUT=4Vp-p
600
POWER DISSIPATION (W)
POWER DISSIPATION (W)
1 909mW
NEGATIVE SLEW RATE
800
JEDEC JESD51-7 HIGH EFFECTIVE
THERMAL CONDUCTIVITY TEST BOARD
1.2
0
900
400
FIGURE 31. SUPPLY CURRENT vs SUPPLY VOLTAGE
1.4
POSITIVE SLEW RATE
1100
SLEW RATE (V/µs)
SUPPLY CURRENT (mA)
12.0
JEDEC JESD51-3 LOW EFFECTIVE
THERMAL CONDUCTIVITY TEST BOARD
0.9
0.8
0.7 625mW
0.6
0.5
SO8
θJA=160°C/W
391mW
0.4
0.3
SOT23-5
θJA=256°C/W
0.2
0.1
0
0
25
50
75 85 100
125
150
AMBIENT TEMPERATURE (°C)
FIGURE 34. PACKAGE POWER DISSIPATION vs AMBIENT
TEMPERATURE
EL5132, EL5133
DIFFERENTIAL GAIN (%)
Typical Performance Curves (Continued)
0.20
0.15
0.05
0
-0.05
-0.15
-0.20
0
10
20
30
40
50
60
70
80
90
100
80
90
100
DIFFERENTIAL PHASE (°)
FIGURE 35. DIFFERENTIAL GAIN (%)
0.20
0.15
0.05
0
-0.05
-0.15
-0.20
0
10
20
30
40
50
60
70
FIGURE 36. DIFFERENTIAL PHASE (°)
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Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
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