TPH3205WS Preliminary PRODUCT SUMMARY (TYPICAL) VDS (V) 600 RDS(on) (m) 63 Qrr (nC) 138 GaN Power Low-loss Switch Features S Low Qrr Free-wheeling diode not required Quiet Tab™ for reduced EMI at high dv/dt GSD pin layout improves high speed design RoHS compliant High frequency operation S G Applications D Compact DC-DC converters AC motor drives Battery chargers Switch mode power supplies TO-247 3L Package Absolute Maximum Ratings (TC=25 °C unless otherwise stated) Symbol Parameter Limit Value Unit ID25°C Continuous Drain Current @TC=25 °C 34 A ID100°C Continuous Drain Current @TC=100 °C 24 A Pulsed Drain Current (pulse width:100 s) 140 A VDSS Drain to Source Voltage 600 V VTDS Transient Drain to Source Voltage a 750 V VGSS Gate to Source Voltage ±18 V PD25°C Maximum Power Dissipation 150 W Case -55 to 150 °C Junction -55 to 175 °C -55 to 150 °C 260 °C IDM TC TJ TS TCsold Operating Temperature Storage Temperature Soldering peak Temperature b Thermal Resistance Symbol Parameter Typical Unit RΘJC Junction-to-Case 1.0 °C /W RΘJA Junction-to-Ambient 62 °C /W Notes a: For 1 usec, duty cycle D=0.1 b: For 10 sec, 1.6mm from the case Preliminary Data March 26, 2014, ZH TPH3205WS www.transphormusa.com 1 TPH3205WS Electrical Characteristics Symbol (TC=25 °C unless otherwise stated) Parameter Min Typical Max Unit Test Conditions 600 - - V VGS=0 V 1.35 1.8 2.35 V VDS=VGS, ID=2 mA - 63 78 mΩ VGS=8V, ID =24A, TJ = 25 °C - 135 - mΩ VGS=8V, ID =24A,TJ = 175 °C - 2 150 µA VDS=600V, VGS=0V, TJ = 25 °C - 20 - µA VDS=600V, VGS=0V, TJ = 150 °C - - 200 Static VDSS-MAX VGS(th) RDS(on) RDS(on) IDSS IDSS IGSS Maximum Drain-Source Voltage Gate Threshold Voltage Drain-Source On-Resistance (TJ = 25 °C) Drain-Source On-Resistance (TJ = 175 °C) Drain-to-Source Leakage Current, TJ = 25 °C Drain-to-Source Leakage Current, TJ = 150 °C Gate-to-Source Forward Leakage Current Gate-to-Source Reverse Leakage Current VGS= 18 V nA - - -200 VGS= -18 V Dynamic CISS Input Capacitance - 1780 - COSS Output Capacitance - 108 - CRSS Reverse Transfer Capacitance - 12 - CO(er) Output Capacitance, energy related a - 170 - CO(tr) Output Capacitance, time related a - 283 - Qg Total Gate Charge b - 10 13 Qgs Gate-Source Charge - 5.2 - Qgd Gate-Drain Charge - 3.3 - td(on) tr Td(off) tf Turn-On Delay Rise Time Turn-Off Delay Fall Time - 7.2 4.6 12 6.5 VGS=0 V, VDS=400 V, f =1 MHz pF VGS=0 V, VDS=0 V to 480 V nC VDS =100 V a, VGS= 0-4.5 V, ID = 24 A - ns VDS =480 V , VGS= 0-10 V, ID = 24 A, RG= 2 Ω Reverse operation IS Reverse Current - - 24 A VGS=0 V, TJ=100 oC VSD Reverse Voltage - 2.7 3.3 V VGS=0 V, IS=24 A, TJ=25 oC VSD Reverse Voltage - 1.6 1.8 V VGS=0 V, IS=12 A, TJ=25 oC trr Reverse Recovery Time - 30 - ns Qrr Reverse Recovery Charge - 138 - nC IS=24 A, VDD=480 V, di/dt =450 A/s, TJ=25 oC Notes a: Fixed while VDS is rising from 0 to 80% VDSS ; b: Qg does not change for VDS>100 V. Preliminary Data March 26, 2014, ZH TPH3205WS www.transphormusa.com 2 TPH3205WS Test Circuits and Waveforms VDS 90% D.U.T. VGS VDS 10% td(on) VGS tr td(off) ton Fig. 1. Switching Time Test Circuit 750V D.U.T. 3M tf toff Fig. 2. Switching Time Waveform Tpulse + VDS Tpulse ≥ 1 uS 750V 750V - 900V MOSFET 0V ≥ 1 uS Duty Ratio = 0.1 10Tpulse Fig. 4. Spike Voltage Waveform Fig. 3. Spike Voltage Test Circuit i, V ID D.U.T. 0V diF/dt A trr IF tF tS t 10% IRRM IRRM dirr/dt VRRM trr = tS + tF Qrr = QS +QF Fig. 5. Test Circuit for Diode Characteristics March 26, 2014, ZH QF 90% IRRM VDS Preliminary Data QS Fig. 6. Diode Recovery Waveform TPH3205WS www.transphormusa.com 3 TPH3205WS Preliminary Data March 26, 2014, ZH TPH3205WS www.transphormusa.com 4 TPH3205WS Important Notice Transphorm Gallium Nitride (GaN) Switches provide significant advantages over silicon (Si) Superjunction MOSFETs with lower gate charge, faster switching speeds and smaller reverse recovery charge. GaN Switches exhibit in-circuit switching speeds in excess of 150 V/ns and can be even pushed up to 500V/ns, compared to current silicon technology usually switching at rates less than 50V/ns. The fast switching of GaN devices reduces current-voltage cross-over losses and enables high frequency operation while simultaneously achieving high efficiency. However, taking full advantage of the fast switching characteristics of GaN Switches requires adherence to specific PCB layout guidelines and probing techniques . Transphorm suggests visiting application note “Printed Circuit Board Layout and Probing for GaN Power Switches” before evaluating Transphorm GaN switches. Below are some practical rules that should be followed during the evaluation. When Evaluating Transphorm GaN Switches DO DO NOT Minimize circuit inductance by keeping traces short, both in the drive and power loop Minimize lead length of TO-220 and TO247 package when mounting to the PCB Twist the pins of TO-220 or TO-247 to accommodate GDS board layout Use shortest sense loop for probing. Attach the probe and its ground connection directly to the test points Use differential mode probe, or probe ground clip with long wire Preliminary Data March 26, 2014, ZH Use long traces in drive circuit, long lead length of the devices TPH3205WS www.transphormusa.com 5