LV52207NXB D

LV52207NXB
LED Boost Driver, Dual channel,
PWM, 1-Wire Dimming
Overview
The LV52207NXB is a high voltage boost driver for LED drive with 2 channels
adjustable constant current sources.
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Features
 Operating Voltage from 2.7V to 5.5V
 Integrated 40V MOSFET
 1-Wire 255 level digital and PWM dimming
 Supports CABC
 600kHz Switching Frequency
 37.5V OverVoltage Protection (OVP) Threshold
WLP9J, 1.31x1.31, 0.4mm pitch
(1.31mm x 1.31mm, Amax=0.65 mm)
Typical Applications
LED Display Backlight Control
PIN CONNECTION
TOP VIEW
1
A
B
Fig1. 5x2 LED Application
C
RT
2
LEDO LEDO
2
1
PWM FCAP
EN
3
VIN
GND
SW
ORDERING INFORMATION
Ordering Code:
LV52207NXB-VH
Package
WLP9J (1.31x1.31)
(Pb-Free / Halogen Free)
Shipping (Qty / packing)
5000 / Tape & Reel
† For information on tape and reel specifications, including part
orientation and tape sizes, please refer to our Tape and Reel
Packaging Specifications Brochure, BRD8011/D.
http://www.onsemi.com/pub_link/Collateral/BRD8011-D.PDF
© Semiconductor Components Industries, LLC, 2015
November 2015- Rev. 1
1
Publication Order Number:
LV52207NXB/D
LV52207NXB
Specifications
Absolute Maximum Ratings at Ta = 25C (Note 1)
Parameter
Maximum supply voltage
Symbol
Conditions
VCC max
VCC
6
V
V1 max
SW
40
V
Maximum Pin voltage1
Ratings
Unit
Maximum Pin voltage2
V2 max
Other pin
5.5
V
Allowable power dissipation
Pd max
Ta=25C (Note 2)
1.05
W
40 to +85
C
Operating temperature
Topr
Storage temperature
Tstg
55 to +125
C
Stresses exceeding those listed in the Maximum Rating table may damage the device. If any of these limits are exceeded, device
functionality should not be assumed, damage may occur and reliability may be affected.
2. Mounted on the following board: 70mm×70mm×1.6mm (4 layer glass epoxy)
3. Absolute maximum ratings represent the values which cannot be exceeded for any length of time.
4. When the device is used within the range of absolute maximum ratings, as a result of continuous usage under high temperature, high
current, high voltage, or drastic temperature change, the reliability of the IC may be decrease. Please contact ON Semiconductor for the
further details.
1.
Recommended Operating Conditions at Ta = 25C (Note 5)
Parameter
Supply voltage range1
PWM frequency
Symbol
Conditions
VCC op
VCC
FPWM
PWM pin input signal
Ratings
Unit
2.7 to 5.5
V
300 to 100k
Hz
Min. Duty% on PWM pin
DMIN PWM
PWM pin input signal
0.9%
5. Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses
beyond the Recommended Operating Ranges limits may affect device reliability.
Electrical Characteristics Analog block (Note 6)
at Ta=25°C, VCC=3.6V, RT resistor=63.4K unless otherwise specified
Parameter
Symbol
Conditions
Standby current dissipation
Icc1
DC/DC current dissipation1
Icc2
Feedback Voltage
VFB
Output Current1
IO1
Output Current Matching1
IOM1
LEDO1, 2 max current
LEDO1, 2 leak current
OVP Voltage
IMAX
ILEAK
VOVP
EN=PWM=L
Device enable, switching 0.6 MHz and no
load
LEDO1, 2=20mA
LEDO1, LEDO2, LEDISET=20mA
Duty=100%
LEDO1, LEDO2, LEDISET=20mA
Duty=100%
(IMAX – IAVG) / IAVG
LEDO1 LEDO2
LEDO1 LEDO2
SW_pin over voltage threshold
LEDO_OVP Voltage
VOVP,LED
LEDO_pin over voltage threshold
LEDO_DC rising
IL=100mA
Ratings
min
max
0
2.0
A
0.7
1.2
mA
0.2
19.6
Unit
typ
V
20
20.4
mA
0.3
2.0
%
36
37.5
1.0
39
A
V
4.2
4.5
5.0
V
40
mA
SWOUT ON resistance
RON
300
m
NMOS Switch Current Limit
ILIM
1.0
1.5
A
OSC Frequency
FOSC
500
600
750
kHz
VCC
High level input voltage
VINH
EN PWM
1.2
V
Low level input voltage
VINL
EN PWM
0
0.4
V
Under Voltage Lockout
VUVLO
VIN falling
2.2
V
EN pin output voltage
0.4
V
VACK
RPULL-UP =15k
for Acknowledge
6. Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted.
Product performance may not be indicated by the Electrical Characteristics if operated under different conditions.
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LV52207NXB
Recommended EN PWM Timing at Ta=25°C, VCC=3.6V, unless otherwise specified
Parameter
Dimming mode selectable
time
Delay time to start digital
mode detection
Low time to switch to digital
mode
EN pin low time to shutdown
PWM pin low time to
shutdown
1-wire start time for digital
mode programming
1-wire end time for digital
mode programming
Symbol
Conditions
Ratings
min
typ
max
2.2
Unit
TSEL
1.0
ms
Tw0
100
s
Tw1
260
s
TOFF, EN
2.5
ms
TOFF, PWM
20
ms
TSTART
2.0
s
TEND
2.0
360
s
TH0
Bit detection=0
2.0
180
s
1-wire Low time of bit 0
TL0
Bit detection=0
Th0  2
360
s
1-wire High time of bit 1
TH1
Bit detection=1
Tl1  2
360
s
1-wire Low time of bit1
TL1
Bit detection=1
2.0
180
s
1-wire High time of bit 0
DCDC startup delay
TDEL
Delay time of Acknowledge
TACKD
5
2
s
Duration of Acknowledge
TACK
512
s
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3
ms
LV52207NXB
Package Dimensions
unit : mm
WLCSP9, 1.31x1.31
CASE 567HX
ISSUE C
A B
E
BACKSIDE
COATING
PIN A1
REFERENCE
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. COPLANARITY APPLIES TO THE SPHERICAL
CROWNS OF THE SOLDER BALLS.
4. BACKSIDE COATING IS OPTIONAL.
A3
NOTE 4
D
0.05 C
2X
0.05 C
2X
DIM
A
A1
A3
b
D
E
e
DETAIL A
TOP VIEW
DETAIL A
MILLIMETERS
MIN
MAX
0.65
−−−
0.16
0.26
0.025 REF
0.21
0.31
1.31 BSC
1.31 BSC
0.40 BSC
A
0.10 C
RECOMMENDED
SOLDERING FOOTPRINT*
A1
A1
0.08 C
NOTE 3
C
SIDE VIEW
SEATING
PLANE
PACKAGE
OUTLINE
9X
9X
e
b
e
0.05 C A B
0.03 C
C
0.40
PITCH
B
0.20
0.40
PITCH
DIMENSIONS: MILLIMETERS
A
1
2
3
BOTTOM VIEW
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LV52207NXB
Block Diagram
L1 : VLS3012E-4R7M (TDK), VLF504015-4R7 (TDK)
VLS3012E-100M (TDK), VLF504015-100M (TDK)
D1 : MBR0540T1 (ON Semiconductor), NSR05F40 (ON Semiconductor)
C2 : GRM21BR71H105K (Murata), C1608X5R1H105K (TDK)
Fig2. Block Diagram
Pin Connection
TOP VIEW
1
A
B
C
RT
2
LEDO LEDO
2
1
PWM FCAP
EN
3
VIN
GND
SW
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LV52207NXB
Pin Function
PIN #
Pin Name
Description
A1
RT
Connecting a resistor terminal for Full scale LED current setting
A2
LEDO2
Constant Current Output_pin2
A3
LEDO1
Constant Current Output_pin1
B1
PWM
PWM dimming input (active High).
B2
FCAP
Filtering capacitor terminal for PWM mode
B3
GND
Ground
C1
EN
1-wire control and Enable control input (active High).
C2
VIN
Supply voltage.
C3
SW
Switch pin. Drain of the internal power FET.
Pd-Max
Mounted on the following board : 70 mm  70 mm  1.6 mm (4 layer glass epoxy)
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LV52207NXB
LED Current Setting (max sink current)
LED_full current is set by an external resistor
connected between the RT pin and ground.
_
2113 ∗
:
:
RT pin DC Voltage; typically 0.6 V
RT pin resistor to ground
Eg: RT_res= 63.4 k at typical VRT
.
2113 ∗
2113 ∗
_
. 19.99
BRIGHTNESS CONTROL
The LV52207NXB controls the DC current of the
dual channels. The DC current control is normally
referred to as analog dimming mode.
The LV52207NXB can receive digital commands at
the EN pin (1-wire digital interface, known as
Digital Mode) and the PWM signals at the PWM
pin (PWM interface, known as PWM Mode) for
brightness dimming.
Dimming Mode Selection
Dimming Mode is selected by a specific pattern of
the EN pin within TSEL of 1.0 ms from the startup of
the device every time.
Digital Mode
To enter Digital Mode, EN pin should be taken high
for more than Tw0 =100s from the first rising edge
and keep low state for TW1 = 260s before TSEL=1ms.
≅ 20
When using Digital mode, the PWM pin should be
kept high.
It is required sending the device address byte and the
data byte to select LEDI. The bit detection is
determined by the ratio of TH and TL(See Fig5). The
start condition for the bit transmission required EN
pin high for at least Tstart. The end condition is
required EN pin low for at least Tend. When data is
not being transferred, EN pin is set in the “H” state.
These registers are initialized with shutdown.
Start up and Shutdown
The device becomes enabled when EN pin is
initially taken high. The dimming mode is
determined within TSEL and the boost converter start
up after TDEL. To place the device into shutdown
mode, the SWIRE must be held low for TOFF. For
specific timings please refer to the Recommended
EN PWMIN Timing Table on page 3 or the below
figures.
Digital MODE
Fig3. Start up and shutdown diagram (DIGITAL MODE)
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LV52207NXB
1-Wire Programming
Figure 15 and Table 2 give an overview of the
protocol used by LV52207NXB. A command
consists of 24 bits, including an 8-bit device address
byte and a 16-bit data byte. All of the 24 bits should
be transmitted together each time, and the LSB bit
should be transmitted first. In the LV52207NXB, the
device address (DA7(MSB)to DA0(LSB)) is
specified as “10001111”. AKct is setting for the
acknowledge response. If the device address and the
data byte are transferred on AKct=1, the ACK signal
is sent from the receive side to the send side. The
acknowledge signal is issued when EN pin on the
send side is released and EN pin on the receive side
is set to low state.
Fig4. Example of writing data
Tl0 > Th0 * 2
Tl0
Th0
Low state(Bit=0)
Th1 > Tl1 * 2
Tl1
Th1
High state(Bit=1)
Fig5. Bit detection Diagram
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LV52207NXB
BITE
Device
Address
(0x8F)
Register
DA7
DA6
DA5
DA4
DA3
DA2
DA1
DA0
D15
D14
D13
D12
D11
BIT
23(MSB)
22
21
20
19
18
17
16
15
14
13
12
11
AKct(D10)
10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
9
8
7
6
5
4
3
2
1
0(LSB)
Data
Description
1
0
0
0
1
1
1
1
Data bit 15 No information. Write 0 to this bit.
Data bit 14 No information. Write 0 to this bit.
Data bit 13 No information. Write 0 to this bit.
Data bit 12 No information. Write 0 to this bit.
Data bit 11 No information. Write 0 to this bit.
0 = Acknowledge disabled
1 = Acknowledge enabled
Data bit 9
Data bit 8
Data bit 7
Data bit 6
Data bit 5
Data bit 4
Data bit 3
Data bit 2
Data bit 1 LSB of brightness code
Data bit 0 No information.
Table1. Bit Description
LED Current setting
RT resistor= 63.4K ( for ILED Full = 20 mA)
NOTE: If you change the RT resistor, the LED Currents will all change.
_
∗
code
0
1
2
3
4
5
6
7
8
9
10
.
.
D8
0
0
0
0
0
0
0
0
0
0
0
246
247
248
249
250
251
252
253
254
255
1
1
1
1
1
1
1
1
1
1
#
; Where ILED_FULL is the current calculated above
D7
0
0
0
0
0
0
0
0
0
0
0
D6
0
0
0
0
0
0
0
0
0
0
0
D5
0
0
0
0
0
0
0
0
0
0
0
D4
0
0
0
0
0
0
0
0
1
1
1
D3
0
0
0
0
1
1
1
1
0
0
0
D2
0
0
1
1
0
0
1
1
0
0
1
D1
0
1
0
1
0
1
0
1
0
1
0
LED Current(mA)
0 Unavailable
0.22
0.30
0.38
0.47
0.55
0.63
0.70
0.78
0.86
0.94
0
1
0
1
0
1
0
1
0
1
.
.
19.30
19.38
19.46
19.54
19.61
19.69
19.77
19.84
19.93
20 *Default
.
.
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
1
1
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
1
1
0
0
1
1
0
0
1
1
Table2. Data Register vs LED current sink
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LV52207NXB
PWM Mode
The dimming mode is set to PWM mode when it is
not recognized as a digital mode within Tsel. The
LV52207NXB can receive the PWM signals at the
PWM pin (PWM interface, also known asPWM
Mode) for brightness dimming. When using PWM
interface, the EN pin should be kept high. If EN pin
is High, PWM pin alone is used to enable and
disable the IC. When EN pin is High and PWM pin
is High , this IC is enabled. When EN pin is Low
for more than 2.5 ms or when PWM pin is Low for
more than 20 ms, the IC is disabled.
Fig6. Start up and shutdown diagram (PWM MODE)
LEDO1 or LEDO2 UNUSED
If only one channel is used, a user can turn OFF a
branch current by connecting the unused channel
to ground.
If both LEDO1 pin and LEDO2 pin are connected
to ground, boost converter will not start up.
OVP threshold the LV52207NXB’s switching
converter stops switching. When the other LEDO
pin voltage reaches the LEDO OVP threshold the
LV52207NXB’s switching converter stops
switching.
Over Voltage Protection ( SW OVP)
SW pin over-voltage protection is set at 37.5 V.
This IC monitors the Voltage at SW pin. When
the voltage exceeds OVP threshold the switching
converter stops switching.
If SW terminal voltage exceeds a threshold VOVP =
37.5 V typ. for 8 cycles, boost converter enters
shutdown mode. In order to restart the IC, SWIRE
signal must be used again.
Over Voltage Protection ( LEDO OVP)
LED pin over-voltage protection is set at 4.5 V
(rising) and 3.5 V (falling). This IC monitors the
Voltage at LEDO1 pin and LEDO2 pin. When
the voltage exceeds LEDO OVP threshold the
switching converter stops switching. LED current
sink keep.
When both LED strings become open:
If both LED strings are open, LEDO1 pin voltage
and LEDO2 pin voltage are approximately
ground and the boost output voltage is increased
When SW pin voltage is reached the SW OVP
threshold the LV52207NXB’s switching
converter stops switching.
Over Current Protection
Current limit value for built-in power MOS is
around 1.5 A. The power MOS is turned off for
each switching cycle when peak drain current
exceeds the limit value.
Under Voltage Lock Out (UVLO)
UVLO operation works when VIN terminal voltage
is below 2.2 V.
Open LED Protection
When one LED string becomes open:
If one LED string is open, open channel voltage is
approximately ground, the boost output voltage is
increased and other LEDO channel voltage is
increased. When SW pin voltage is reached the SW
Thermal Shutdown
When chip temperature is too high, boost converter
is stopped.
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LV52207NXB
Application Circuit Diagram
PWM dimming mode
EN pin can be used to enable or disable
PWM dimming mode
PWM pin can be used to enable or disable
1-wire dimming mode
PWM pin can be used to enable or disable
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LV52207NXB
1-wire dimming mode
EN pin can be used to enable or disable
1-wire dimming mode and PWM dimming mode (CABC)
Note: Start-up Sequence
During Tw0 period of 1-wire, it is necessary to hold PWM "High".
Fig7. Various application circuit diagrams
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LV52207NXB
Typical Characteristics (VIN=3.6 V, L=10 H, T=25C, unless otherwise specified)
Efficiency vs PWM DIMMING (20 mA/string)
Note: “4s2p” means 2 strings of 4 series LEDs per string.
PWM DIMMING
1-wire DIMMING
CABC DIMMING
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LV52207NXB
START UP WAVEFORM
SHUTDOWN WAVEFORM
SWITCHING WAVEFORM
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LV52207NXB
Packing Specification of Embossed Carrier Taping
WLP9/9J (1.31×1.31) mm / (1.39 × 1.21) mm
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LV52207NXB
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LV52207NXB
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LV52207NXB
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further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose,
nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including
without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can
and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each
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