Ordering number : ENA2346A LV52207NXA Bi-CMOS LSI Dual channel LED Boost Driver with PWM and 1-Wire Dimming http://onsemi.com Overview The LV52207NXA is a high voltage boost driver for LED drive with 2 channels adjustable constant current sources. Function • Operating Voltage from 2.7V to 5.5V • Integrated 40V MOSFET • 1-Wire 255 level digital and PWM dimming • Supports CABC • 600kHz Switching Frequency • 37.5V OVP Threshold WLP9, 1.31x1.31, 0.4mm pitch (1.31mm x 1.31mm, Amax=0.625 mm) Typical Applications LED Display Backlight Control Fig1. 5x2 LED Application ORDERING INFORMATION See detailed ordering and shipping information on page 18 of this data sheet. Semiconductor Components Industries, LLC, 2014 July, 2014 71514NK 20140703-S00001/61914NK No.A2346-1/18 LV52207NXA Specifications Absolute Maximum Ratings at Ta = 25°C Parameter Maximum supply voltage voltage Maximum Pin voltage1 Symbol VCC max V1 max Conditions VCC V2 max Pd max Topr Tstg Other pin Ta=25°C *1 Maximum Pin voltage2 Allowable power dissipation Operating temperature Storage temperature Ratings 6 Unit V 40 V 5.5 0.95 −40 to +85 −55 to +125 V W °C °C SW *1 Mounted on a specified board: 70mm×70mm×1.6mm (4 layer glass epoxy) Caution 1) Absolute maximum ratings represent the values which cannot be exceeded for any length of time. Caution 2) Even when the device is used within the range of absolute maximum ratings, as a result of continuous usage under high temperature, high current, high voltage, or drastic temperature change, the reliability of the IC may be degraded. Please contact us for the further details. Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. Recommended Operating Conditions at Ta = 25°C Parameter Supply voltage range1 PWM frequency MIN DUTY (PWM pin) Symbol Conditions Ratings VCC op Fpwm 2.7 to 5.5 V PWM pin input signal 300 to 100k Hz Dminpwm PWM pin input signal 0.9% VCC Unit Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond the Recommended Operating Ranges limits may affect device reliability. Electrical Characteristics Analog block at Ta=25°C, VCC=3.6V, RT resistor=63.4KΩ unless otherwise specified Parameter Standby current dissipation DC/DC current dissipation1 FB Voltage Symbol Icc1 Icc2 Vfb Output Current1 Io1 Output Current Matching1 Iom1 LEDO1, 2 max current LEDO1, 2 leak current OVP Voltage Imax Ilk Vovp LEDO_OVP Voltage VLovp SWOUT ON resistance NMOS Switch Current Limit OSC Frequency High level input voltage Low level input voltage Under Voltage Lockout EN pin output voltage for Acknowledge Ron Conditions min EN=PWM=L Device enable, switching 0.6 MHz and no load LEDO1, 2=20mA LEDO1 LEDO2 LEDISET=20mA Duty=100% LEDO1 LEDO2 LEDISET=20mA Duty=100% (IMAX – IAVG) / IAVG LEDO1 LEDO2 LEDO1 LEDO2 SW_pin over voltage threshold LEDO_pin over voltage threshold LEDO_DC rising IL=100mA ILIM Fosc VINH VINL Vuvlo EN PWM EN PWM VIN falling Vack Rpullup=15kΩ Ratings typ max 0 2 μA 0.7 1.2 mA 0.2 19.6 Unit V 20 20.4 mA 0.3 2 % 36 37.5 1 39 mA μA V 4.2 4.5 5.0 V 40 300 mΩ 1 1.5 A 500 1.2 0 600 750 VCC 0.4 kHz V V V 0.4 V 2.2 Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. No.A2346-2/18 LV52207NXA Recommended EN PWM Timing at Ta=25°C, VCC=3.6V, unless otherwise specified Parameter Dimming mode selectable time Delay time to start digital mode detection Low time to switch to digital mode EN pin low time to shutdown PWM pin low time to shutdown 1-wire start time for digital mode programming 1-wire end time for digital mode programming 1-wire High time of bit 0 Symbol Conditions Ratings min typ max 2.2 Unit Tsel 1 Tw0 100 μs Tw1 260 μs Toffen 2.5 ms Toffpwm 20 ms Tstart 2 μs Tend 2 360 ms μs Th0 Bit detection=0 2 180 μs 1-wire Low time of bit 0 Tl0 Bit detection=0 Th0 × 2 360 μs 1-wire High time of bit 1 Th1 Bit detection=1 Tl1 × 2 360 μs 1-wire Low time of bit1 Tl1 Bit detection=1 2 DCDC startup delay Delay time of Acknowledge Duration of Acknowledge Tdel 180 5 μs ms Tackd 2 μs Tack 512 μs No.A2346-3/18 LV52207NXA Package Dimensions unit : mm WLCSP9, 1.31x1.31 CASE 567HX ISSUE B NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. COPLANARITY APPLIES TO THE SPHERICAL CROWNS OF THE SOLDER BALLS. A B E PIN A1 REFERENCE D DIM A A1 b D E e 0.05 C 2X 0.05 C 2X TOP VIEW MILLIMETERS MIN MAX 0.625 0.16 0.26 0.21 0.31 1.31 BSC 1.31 BSC 0.40 BSC A 0.10 C RECOMMENDED SOLDERING FOOTPRINT* A1 A1 0.08 C NOTE 3 C SIDE VIEW PACKAGE OUTLINE SEATING PLANE 9X 9X b e 0.05 C A B 0.03 C 0.20 e C B 0.40 PITCH 0.40 PITCH DIMENSIONS: MILLIMETERS A 1 2 3 BOTTOM VIEW *For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. LV52207NXA is as follows. No.A2346-4/18 LV52207NXA Block Diagram L1 : VLS3012E-4R7M (TDK), VLF504015-4R7(TDK) VLS3012E-100M (TDK), VLF504015-100M(TDK) D1 : MBR0540T1 (ON semi), NSR05F40 (ON semi) C2 : GRM21BR71H105K (Murata), C1608X5R1H105K (TDK) Fig2. Block Diagram Pin Connection TOP VIEW 1 A B C RT 2 LEDO LEDO 2 1 PWM FCAP EN 3 VIN GND SW No.A2346-5/18 LV52207NXA Pin Function PIN # Pin Name Description A1 RT Connecting a resistor terminal for Full scale LED current setting A2 LEDO2 Constant Current Output_pin2 A3 LEDO1 Constant Current Output_pin1 B1 PWM PWM dimming input (active High). B2 FCAP Filtering capacitor terminal for PWM mode B3 GND Ground C1 EN 1-wire control and Enable control input (active High). C2 VIN Supply voltage. C3 SW Switch pin. Drain of the internal power FET. Pd-Max Mounted on a specified board : 70mm×70mm×1.6mm (4 layer glass epoxy) No.A2346-6/18 LV52207NXA LED Current Setting (max sink current) LED_full current is set by an external resistor connected between the RT pin and ground. I(LED_full)= 2113 × (V(RT)/R(RT_res)) V(RT) R(RT_res) : RT_pin DC Voltage typ=0.6V : RT_pin resistor RT_res=63.4kΩ : I(LED_full)=20mA BRIGHTNESS CONTROL The LV52207NXA controls the DC current of the dual channels. The DC current control is normally referred to as analog dimming mode. The LV52207NXA can receive digital commands at the EN pin (1-wire digital interface) (Digital Mode) and the PWM signals at the PWM pin (PWM interface) (PWM Mode) for brightness dimming. Dimming Mode Selection Dimming Mode is selected by a specific pattern of the EN pin within Tsel(1ms) from the startup of the device every time. Digital Mode To enter Digital Mode, EN pin should be taken high for more than Tw0(100μs) from the first rising edge and keep low state for Tw1(260μs) before Tsel(1ms). When using Digital mode, the PWM pin should be kept high. It is required sending the device address byte and the data byte to select LEDI. The bit detection is determined by the ratio of Th and Tl(See Fig5). The start condition for the bit transmission required EN pin high for at least Tstart. The end condition is required EN pin low for at least Tend. When data is not being transferred, EN pin is set in the “H” state. These registers are initialized with shutdown. Start up and Shutdown The device becomes enabled when EN pin is initially taken high. The dimming mode is determined within Tsel and the boost converter start up after Tdel. To place the device into shutdown mode, the SWIRE must be held low for Toff. Digital MODE Fig3. Start up and shutdown diagram (DIGITAL MODE) No.A2346-7/18 LV52207NXA 1-Wire Programming Figure 15 and Table 2 give an overview of the protocol used by LV52207NXA. A command consists of 24 bits, including an 8-bit device address byte and a 16-bit data byte. All of the 24 bits should be transmitted together each time, and the LSB bit should be transmitted first. In the LV52207NXA, the device address (DA7(MSB)to DA0(LSB)) is specified as “10001111”. AKct is setting for the acknowledge response. If the device address and the data byte are transferred on AKct=1, the ACK signal is sent from the receive side to the send side. The acknowledge signal is issued when EN pin on the send side is released and EN pin on the receive side is set to low state. Fig4. Example of writing data Tl0 > Th0 * 2 Tl0 Th0 Low state(Bit=0) Th1 > Tl1 * 2 Tl1 Th1 High state(Bit=1) Fig5. Bit detection Diagram No.A2346-8/18 LV52207NXA BITE Device Address (0x8F) Data Register DA7 DA6 DA5 DA4 DA3 DA2 DA1 DA0 D15 D14 D13 D12 D11 BIT 23(MSB) 22 21 20 19 18 17 16 15 14 13 12 11 AKct(D10) 10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 9 8 7 6 5 4 3 2 1 0(LSB) Description 1 0 0 0 1 1 1 1 Data bit 15 No information. Write 0 to this bit. Data bit 14 No information. Write 0 to this bit. Data bit 13 No information. Write 0 to this bit. Data bit 12 No information. Write 0 to this bit. Data bit 11 No information. Write 0 to this bit. 0 = Acknowledge disabled 1 = Acknowledge enabled Data bit 9 Data bit 8 Data bit 7 Data bit 6 Data bit 5 Data bit 4 Data bit 3 Data bit 2 Data bit 1 LSB of brightness code Data bit 0 No information. Table1. Bit Description LED Current setting RT resistor=63.4KΩ (20mA) LED current = I(LED_full) x code/255= LEDO1current=LEDO2current code 0 1 2 3 4 5 6 7 8 9 10 . . D8 0 0 0 0 0 0 0 0 0 0 0 246 247 248 249 250 251 252 253 254 255 1 1 1 1 1 1 1 1 1 1 D7 0 0 0 0 0 0 0 0 0 0 0 D6 0 0 0 0 0 0 0 0 0 0 0 D5 0 0 0 0 0 0 0 0 0 0 0 D4 0 0 0 0 0 0 0 0 1 1 1 D3 0 0 0 0 1 1 1 1 0 0 0 D2 0 0 1 1 0 0 1 1 0 0 1 D1 0 1 0 1 0 1 0 1 0 1 0 LED Current(mA) 0 Unavailable 0.22 0.30 0.38 0.47 0.55 0.63 0.70 0.78 0.86 0.94 0 1 0 1 0 1 0 1 0 1 . . 19.30 19.38 19.46 19.54 19.61 19.69 19.77 19.84 19.93 20 *Default . . 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 1 1 1 1 1 1 1 1 1 1 0 0 0 0 1 1 1 1 1 1 0 0 1 1 0 0 1 1 Table2. Data Register vs LED current sink No.A2346-9/18 LV52207NXA PWM Mode The dimming mode is set to PWM mode when it is not recognized as a digital mode within Tsel. The LV52207NXA can receive the PWM signals at the PWM pin (PWM interface)(PWM Mode) for brightness dimming. When using PWM interface, the EN pin should be kept high. If EN pin is H, PWM pin alone is used to enable and disable the IC. When EN pin is H and PWM pin is H , this IC is enable. When EN pin more than 2.5ms are low or when PWM pin more than 20ms are low, the IC is disable. Fig6. Start up and shutdown diagram (PWM MODE) LEDO1 or LEDO2 UNUSED If only one channel is used, a user can be made to OFF by connecting to ground the unused channel. If LEDO1 pin and LEDO2 pin are connected to ground, dcdc will not start up. Over Voltage Protection ( SW OVP) SW pin over-voltage protection is set at 37.5V. This IC monitors the Voltage at SW pin. When the voltage exceed OVP threshold, the switching converter stops switching. If SW terminal voltage exceeds a threshold Vovp (37.5V typ) for 8 cycles, boost converter enters shutdown mode. In order to restart the IC, SWIRE signal is required again. Over Voltage Protection ( LEDO OVP) LED pin over-voltage protection is set at 4.5V(rise) 3.5V(fall). This IC monitors the Voltage at LEDO1 pin and LEDO2 pin. When the voltage exceed LEDO OVP threshold, the switching converter stops switching. LED current sink keep. Open LED Protection < When one LED string becomes open.> If one LED string is open, open channel voltage is about ground, the boost output voltage is increased and other LEDO channel voltage is increased. When SW pin voltage is reached the SW OVP threshold the LV52207NXA’s switching converter stops switching. When other LEDO pin voltage is reached the LEDO OVP threshold, the LV52207NXA’s switching converter stops switching. < When both LED strings become open.> If both LED strings are open, LEDO1 pin voltage and LEDO2 pin voltage is about ground, and the boost output voltage is increased When SW pin voltage is reached the SW OVP threshold the LV52207NXA’s switching converter stops switching. Over Current Protection Current limit value for built-in power MOS is around 1.5A. The power MOS is turned off for each switching cycle when peak current through it exceeds the limit value. Under Voltage Lock Out (UVLO) UVLO operation works when VIN terminal voltage is below 2.2V. Thermal Shutdown When chip temperature is too high, boost converter is stopped. No.A2346-10/18 LV52207NXA Application Circuit Diagram PWM dimming mode EN pin can be used to enable or disable PWM dimming mode PWM pin can be used to enable or disable 1-wire dimming mode PWM pin can be used to enable or disable No.A2346-11/18 LV52207NXA 1-wire dimming mode EN pin can be used to enable or disable 1-wire dimming mode and PWM dimming mode (CABC) Notes start-up sequences During Tw0 period of 1-wire, it is necessary to make PWM "High". Fig7. Various application circuit diagram No.A2346-12/18 LV52207NXA Typical Characteristics (VIN=3.6V, L=10μH, T=25°C, unless otherwise specified) Efficiency vs PWM DIMMING (20mA/string) PWM DIMMING 1-wire DIMMING CABC DIMMING No.A2346-13/18 LV52207NXA START UP WAVEFORM SHUTDOWN WAVEFORM SWITCHING WAVEFORM No.A2346-14/18 LV52207NXA No.A2346-15/18 LV52207NXA No.A2346-16/18 LV52207NXA No.A2346-17/18 LV52207NXA ORDERING INFORMATION Device LV52207NXA-VH Package WLP9 (1.31×1.31) (Pb-Free / Halogen Free) Shipping (Qty / Packing) 5000 / Tape & Reel ON Semiconductor and the ON logo are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent-Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. 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