Ordering number : ENA2019 LV8747TA Bi-CMOS LSI PWM Constant-Current Control Stepping Motor Driver and Switching Regulator Controller http://onsemi.com Overview The LV8747TA is a PWM constant-current control stepping motor driver and switching regulator controller IC. Features • Two circuits of PWM constant-current control stepping motor driver incorporated • Control of the stepping motor to W1-2 phase excitation possible • Output-stage push-pull composition enabling high-speed operation • Two circuits of switching regulator controller incorporated • Thermal shutdown circuit incorporated • Timer latch type short-circuit protection circuit incorporated • Motor driver control power incorporated • Output short-circuit protection circuit incorporated • Chopping frequency selectable • High-precision reference voltage circuit incorporated • Upper and lower regenerative diodes incorporated Specifications Absolute Maximum Ratings at Ta = 25°C Parameter Symbol Supply voltage VM max Driver output peak current 1 MDIO peak1 Conditions OUT1/OUT2 tw ≤ 10ms, duty 20% Ratings Unit 38 V 1.75 A A Driver output continuous current 1 MDIO max1 OUT1/OUT2 1.5 Driver output peak current 2 MDIO peak2 OUT3/OUT4 tw ≤ 10ms, duty 20% 0.8 A Driver output continuous current 2 MDIO max2 OUT3/OUT4 0.5 A Regulator output current SWIO max OUT5/OUT6 tw ≤ 1μs 500 mA Allowable power dissipation 1 Pd max1 Independent IC 0.4 W Allowable power dissipation 2 Pd max2 Our recommended four-layer substrate *1, *2 Operating temperature Storage temperature 4.85 W Topr -20 to +85 °C Tstg -55 to +150 °C *1 Specified circuit board : 100×100×1.6mm3 : 4-layer glass epoxy printed circuit board *2 For mounting to the backside by soldering, see the precautions. Caution 1) Absolute maximum ratings represent the value which cannot be exceeded for any length of time. Caution 2) Even when the device is used within the range of absolute maximum ratings, as a result of continuous usage under high temperature, high current, high voltage, or drastic temperature change, the reliability of the IC may be degraded. Please contact us for the further details. Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. Semiconductor Components Industries, LLC, 2013 June, 2013 41112 SY 20120131-S00006 No.A2019-1/20 LV8747TA Allowable Operating Ratings at Ta = 25°C Parameter Symbol Conditions Ratings Unit Supply voltage VM 10 to 35 V Logic input voltage VIN 0 to 5 V VREF input voltage VREF 0 to 3 V Regulator output voltage VO Regulator output current IO VM-5 to VM 0 to 200 Error amplifier input voltage VOA Timing capacity CT Timing resistance RT Triangular wave oscillation FOSC V mA 0 to 3 V 100 to 15000 pF 5 to 50 kΩ 10 to 800 kHz frequency Electrical Characteristics at Ta = 25°C, VM = 24V, VREF = 1.5V Parameter Symbol Ratings Conditions min typ Unit max General VM current drain IM PS = “H”, no load 6 Thermal shutdown temperature TSD Design guarantee 180 Thermal hysteresis width ΔTSD Design guarantee REG5 output voltage Vreg5 Ireg5 = -1mA VGH VM = 24V 8 mA °C °C 40 4.5 5.0 5.5 V 28.0 28.7 29.8 V 50 100 ms 90 120 150 kHz Motor Drivers [Charge pump block] Boost voltage Rise time tONG VG = 10μF Oscillation frequency Fcp CHOP = 20kΩ Output block (OUT1/OUT2) RonU1 IO = -1.5A, source side 0.5 0.8 Ω RonD2 IO = 1.5A, sink side 0.5 0.8 Ω Output leak current IOleak1 VO = 35V 50 μA Diode forward voltage VD1 ID = -1.5A 1.0 1.3 V RonU2 IO = -500mA, source side 1.5 1.8 Ω 1.1 1.4 Ω 50 μA 1.0 1.3 V 3 8 15 μA 30 50 70 μA Output on resistance Output block (OUT3/OUT4) Output on resistance RonD2 IO = 500mA, sink side Output leak current IOleak2 VO = 35V Diode forward voltage VD2 ID = -500mA Logic input block Logic pin input current IINL VIN = 0.8V IINH VIN = 5V Logic high-level input voltage VINH Logic low-level input voltage VINL 2.0 V 0.8 V Current control block μA VREF input current IREF VREF = 1.5V -0.5 Chopping frequency Fchop CHOP = 20kΩ 45 62.5 75 Threshold voltage of current setting VHH VREF = 1.5V, I0 = H, I1 = H 0.291 0.300 0.309 V comparator VLH VREF = 1.5V, I0 = L, I1 = H 0.191 0.200 0.209 V VHL VREF = 1.5V, I0 = H, I1 = L 0.093 0.100 0.107 V 15 20 25 μA 0.8 1.0 1.2 V 2.475 2.500 2.525 V kHz Output short-circuit protection circuit Charge current IOCP Threshold voltage VthOCP VOCP = 0V Switching regulator Controller [Reference voltage block] REG25 output voltage Vreg25 Ireg25 = -1mA Input stability VDLI VM = 10 to 35V 10 mV Load stability VDLO Ireg25 = 0 to -3mA 10 mV VregVM5 VregVM5 = 1mA Internal regulator block REGVM5 output voltage VM-6.0 VM-5.0 V Continued on next page. No.A2019-2/20 LV8747TA Continued from preceding page. Parameter Symbol Ratings Conditions min typ Unit max Triangular wave oscillator block Oscillation frequency FOSC RT = 20kΩ, CT = 620pF Frequency fluctuation FDV VM = 10 to 35V Current setting pin voltage VRT RT = 20kΩ VthFB FB5, FB6 72 80 88 kHz 1 5 % 0.91 0.98 1.05 V 1.40 1.55 1.70 V 100 mV 1.6 2.5 3.4 μA 1.65 1.8 1.95 V 100 mV Protective circuit block Threshold voltage of comparator Standby voltage VstSCP ISCP = 40μA Source current ISCP VSCP = 0V Threshold voltage VthSCP Latch voltage VltSCP ISCP = 40μA Source current ISOFT VSOFT = 0V Latch voltage VltSOFT ISOFT = 40μA Soft start circuit block 1.3 1.6 1.9 μA 100 mV Low-input malfunction preventive circuit block Threshold voltage VUT 8.3 8.7 9.1 V Hysteresis voltage VHIS 240 340 440 mV Error amplifier block Input offset voltage ViO 6 mV Input offset current I iO 30 nA 100 nA Input bias current Iib OPEN open gain AV Common-phase input voltage range VCM Common phase removal ratio CMRR Max output voltage VOH Min output voltage VOL Output sink current Isi FB = 2.5V Output source current Iso FB = 2.5V VT100 85 VM = 10 to 35V dB 3.0 80 4.5 V dB 5.0 V 0.2 0.5 V 300 600 1000 μA 45 75 105 μA Duty cycle = 100% 0.95 1.01 1.07 V 0.49 0.52 0.55 V 1 μA PWM comparator block Input threshold voltage (Fosc = 10kHz) VT0 Duty cycle = 0% Input bias current IBDT DT6 = 0.4V MAX duty cycle 1 Don1 5ch Internally fixed 94 % Don2 5ch Internally fixed 92 % Don3 6ch VREG25 divided by 17kΩ and 8kΩ 56 (Fosc = 80kHz) MAX duty cycle 2 (Fosc = 160kHz) MAX duty cycle 3 (Fosc = 10kHz) 65 74 % 10 12 Ω 6 8 Ω 5 μA Output block Output ON resistance Leak current RonU3 IO = -200mA, source side RonD3 IO = 200mA, sink side ILEAK VO = 35V No.A2019-3/20 LV8747TA 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 I14 I04 PS VREF34 OCP OCPM OUT5 OUT6 REGVM5 GND NON5 INV5 FB5 NON6 INV6 FB6 Pin Assignment 1 GND DT6 48 2 PHA4 RT 47 3 OUT4B CT 46 4 RNF4 REG25 45 5 OUT4A REG5 44 6 VM34 SCP 43 LV8747TA 7 OUT3B 8 RNF3 9 OUT3A SOFT 42 VMSW 41 VREF12 40 10 PGND3 CHOP 39 11 I03 CP1 38 Top View 12 I13 CP2 37 OUT2A VM12 VM12 OUT1B OUT1B RNF1 RNF1 OUT1A OUT1A PGND1 16 PHA2 OUT2A I11 34 RNF2 15 I12 RNF2 I01 35 OUT2B 14 I02 OUT2B VG 36 PGND2 13 PHA3 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 PHA1 33 Package Dimensions unit : mm (typ) 3422 TOP VIEW SIDE VIEW BOTTOM VIEW 9.0 Exposed Die-Pad 0.5 7.0 (4.0) 9.0 7.0 (4.0) 64 1 2 0.4 0.18 0.125 0.1 1.2 MAX (1.0) (0.5) SIDE VIEW SANYO : TQFP64L(7X7) No.A2019-4/20 LV8747TA Pd max – Ta Allowable power dissipation, Pd max – W 6.0 4.85 *1 With Exposed Die-Pad substrate *2 Without Exposed Die-Pad Four-layer substrate *1 4.0 Four-layer substrate *2 2.52 2.40 2.0 1.25 0 – 20 0 20 40 60 80 100 Ambient temperature, Ta – °C Substrate Specifications (Substrate recommended for operation of LV8747TA) Size : 100mm × 100mm × 1.6mm (four-layer substrate [2S2P]) Material : Glass epoxy Copper wiring density : L1 = 85% / L4 = 90% L1 : Copper wiring pattern diagram L4 : Copper wiring pattern diagram Cautions 1) The data for the case with the Exposed Die-Pad substrate mounted shows the values when 80% or more of the Exposed Die-Pad is wet. 2) For the set design, employ the derating design with sufficient margin. Stresses to be derated include the voltage, current, junction temperature, power loss, and mechanical stresses such as vibration, impact, and tension. Accordingly, the design must ensure these stresses to be as low or small as possible. The guideline for ordinary derating is shown below : (1)Maximum value 80% or less for the voltage rating (2)Maximum value 80% or less for the current rating (3)Maximum value 80% or less for the temperature rating 3) After the set design, be sure to verify the design with the actual product. Confirm the solder joint state and verify also the reliability of solder joint for the Exposed Die-Pad, etc. Any void or deterioration, if observed in the solder joint of these parts, causes deteriorated thermal conduction, possibly resulting in thermal destruction of IC. No.A2019-5/20 GND GND VREF12 PGND3 PGND2 PGND1 CHOP Oscillation circuit LVS TSD + - 5V Charge pump VG Output preamplifier stage I10 I11 Current selection DAC OUT1B VM12 PHA1 + Output control logic RNF1 OUT1A Output preamplifier stage PS PHA2 I02 I12 + Output preamplifier stage Current selection DAC OUT2B Output control logic OUT2A RNF2 VREF34 + - RNF3 Output preamplifier stage I03 I13 Current selection DAC OUT3B PHA3 + Output control logic OUT3A Output preamplifier stage OCP OUT4B OCPM + RNF4 Current selection DAC OUT6 OUT5 REGVM5 VM-5V Internal reference voltage VM PHA4 I04 I14 Output control logic OUT4A Over-current protection circuit VM34 Output preamplifier stage Output preamplifier stage CP1 CP2 VMSW CT DT6 Triangular wave oscillator RT Short-circuit protection circuit + - + - Internal ; reference voltage + + + + - + + - Constant current 2.5V reference voltage REG25 VMSW SCP SOFT FB6 INV6 NON6 NON5 INV5 FB5 5V REG5 + - LV8747TA Block Diagram No.A2019-6/20 Output preamplifier stage LV8747TA Pin Functions Pin No Pin Description VM12 Driver 1/2ch Pin to connect to power supply OUT1A Driver 1ch OUTA output pin OUT1B Driver 1ch OUTB output pin RNF1 Driver 1ch Current sense resistor connection pin OUT2A Driver 2ch OUTA output pin OUT2B Driver 2ch OUTB output pin RNF2 Driver 2ch Current sense resistor connection pin 35 I01 Driver 1ch Output current setting input pin 34 I11 33 PHA1 Driver 1ch Output phase shift input pin 14 I02 Driver 2ch Output current setting input pin 15 I12 16 PHA2 40 VREF12 Driver 1/2ch Output current setting reference voltage input pin 32 PGND1 Driver output Power GND 17 PGND2 Driver output Power GND 6 VM34 Driver 3/4ch Power connection pin 9 OUT3A Driver 3ch OUTA output pin 7 OUT3B Driver 3ch OUTB output pin 8 RNF3 Driver 3ch Current sense resistor connection pin 5 OUT4A Driver 4ch OUTA output pin 3 OUT4B Driver 4ch OUTB output pin 4 RNF4 Driver 4ch Current sense resistor connection pin 11 I03 Driver 3ch Output current setting input pin 12 I13 13 PHA3 Driver 3ch Output phase shift input pin 63 I04 Driver 4ch Output current setting input pin 64 I14 24 25 30 31 26 27 28 29 22 23 18 19 20 21 Driver 2ch Output phase shift input pin 2 PHA4 61 VREF34 Driver 4ch Output phase shift input pin Driver 3/4ch Output current setting reference voltage input pin 10 PGND3 Driver output Power GND 60 OCP Pin to connect to the output short-circuit state detection time setting capacitor 59 OCPM Over-current mode changeover pin 39 CHOP Pin to connect to the resistor to set the chopping frequency 62 PS Driver Power save input pin 36 VG Charge pump capacitor connection pin 38 CP1 Charge pump capacitor connection pin 37 CP2 Charge pump capacitor connection pin 41 VMSW Power connection pin 44 REG5 Internal regulator output pin 56 REGVM5 Internal regulator output pin 45 REG25 Regulator Reference voltage output pin 46 CT Regulator Timing capacity external pin 47 RT Regulator Timing resistor external pin 42 SOFT Regulator Soft start setting pin 43 SCP Regulator Timer and latch setting pin 54 NON5 Regulator Error amplifier 5 input + pin Continued on next page. No.A2019-7/20 LV8747TA Continued from preceding page. Pin No Pin Description 53 INV5 Regulator Error amplifier 5 input – pin 52 FB5 Regulator Error amplifier 5 output pin 58 OUT5 Regulator Output 5 51 NON6 Regulator Error amplifier 6 input + pin 50 INV6 Regulator Error amplifier 6 input – pin 49 FB6 Regulator Error amplifier 6 output pin 57 OUT6 Regulator Output 6 48 DT6 Regulator Output 6 MAX DUTY setting pin 55 GND GROUND 1 GND GROUND No.A2019-8/20 LV8747TA Equivalent Circuits Pin No. Pin Name 2 PHA4 11 I03 12 I13 13 PHA3 14 I02 15 I12 16 PHA2 33 PHA1 34 I11 35 I01 59 OCPM 62 PS 63 I04 64 I14 36 VG 37 CP2 38 CP1 Equivalent Circuit REG5 10kΩ 100kΩ GND VMSW 38 REG5 37 36 100Ω GND 3 OUT4B 4 RNF4 5 OUT4A 6 VM34 7 OUT3B 8 RNF3 9 OUT3A 10 PGND3 6 REG5 5 9 3 7 500Ω GND 10 17 PGND2 18 OUT2B 19 OUT2B 20 RNF2 21 RNF2 22 OUT2A 23 OUT2A 24 VM12 25 VM12 26 OUT1B 27 OUT1B 28 RNF1 29 RNF1 30 OUT1A 31 OUT1A 32 PGND1 4 8 24 25 REG5 22 23 30 31 18 19 26 27 500Ω GND 17 32 20 28 21 29 Continued on next page. No.A2019-9/20 LV8747TA Continued from preceding page. Pin No. Pin Name 40 VREF12 61 VREF34 Equivalent Circuit REG5 500Ω GND 39 CHOP REG5 1kΩ GND 60 OCP REG5 500Ω GND 44 REG5 VMSW 74kΩ 2kΩ 26kΩ GND REG25 REG5 VMSW 5kΩ 6.25kΩ 45 GND Continued on next page. No.A2019-10/20 LV8747TA Continued from preceding page. Pin No. Pin Name 49 FB6 50 INV6 51 NON6 FB5 53 INV5 54 NON5 REG5 VMSW VMSW 2kΩ 500Ω 2kΩ 500Ω 50 53 500Ω 52 Equivalent Circuit GND VMSW 51 54 48 DT6 49 52 REG5 VMSW 500Ω GND RT REG5 500Ω CT 47 500Ω 46 500Ω 500Ω 500Ω GND VMSW 46 57 OUT6 58 OUT5 47 VMSW REGVM5 Continued on next page. No.A2019-11/20 LV8747TA Continued from preceding page. Pin No. Pin Name 56 REGVM5 Equivalent Circuit VMSW 150KΩ 65KΩ GND 42 SOFT REG5 500Ω 500Ω GND VMSW 43 SCP REG5 500Ω GND VMSW No.A2019-12/20 LV8747TA Stepping Motor Driver OUT1/OUT2(OUT3/OUT4) (1) Output control logic Parallel input (Note) PS Output PHA OUTA Current direction OUTB Low * Off Off Standby High Low Low High OUTB→OUTA High High High Low OUTA→OUTB (Note) : Enter either “H” or “L” externally for the logic input pin. Never use the input pin in the OPEN state. (2) Constant-current setting I0 (Note) I1 (Note) High High Output current IO = (VREF/5) /RNF Low High IO = ((VREF/5) /RNF) × 2/3 High Low IO = ((VREF/5) /RNF) × 1/3 Low Low IO = 0 (Note) : Enter either “H” or “L” externally for the logic input pin. Never use the input pin in the OPEN state. Set current calculation method The constant-current control setting of STM driver is determined as follows from the setting of VREF voltage, and I0 and I1, and resistor (RNF) connected between RNF and GND : Iconst [A] = ((VREF [V] /5) /RNF [Ω]) × attenuation factor (Example) For VREF = 1.5V, I0 = I1 = “H” and RNF = 1Ω ; Iconst = 1.5V/5/1Ω × 1 = 0.3A (3) Setting the chopping frequency For constant-current control, chopping operation is made with the frequency determined by the external resistor (connected to the CHOP pin). The chopping frequency to be set with the resistance connected to the CHOP pin (pin 39) is as shown below. Chopping frequency 140 Chopping frequency (kHz) 120 100 80 60 40 20 0 0 10 20 30 40 50 60 70 80 CHOP resistance (kΩ) The recommended chopping frequency ranges from 30kHz to 120kHz. No.A2019-13/20 LV8747TA (4) Constant-current control time chart (chopping operation) (Sine wave increasing direction) STEP Set current Set current Coil current Forced CHARGE section fchop Current mode CHARGE SLOW FAST CHARGE SLOW FAST (Sine wave decreasing direction) STEP Set current Coil current Forced CHARGE section Set current fchop Current mode CHARGE SLOW FAST Forced CHARGE section FAST CHARGE SLOW In each current mode, the operation sequence is as described below : • At rise of chopping frequency, the CHARGTE mode begins.(The section in which the CHARGE mode is forced regardless of the magnitude of the coil current (ICOIL) and set current (IREF) exists for 1/16 of one chopping cycle.) • The coil current (ICOIL) and set current (IREF) are compared in this forced CHARGE section. When (ICOIL<IREF) state exists in the forced CHARGE section ; CHARGE mode up to ICOIL ≥ IREF, then followed by changeover to the SLOW DECAY mode, and finally by the FAST DECAY mode for the 1/16 portion of one chopping cycle. When (ICOIL<IREF) state does not exist in the forced CHARGE section; The FAST DECAY mode begins. The coil current is attenuated in the FAST DECAY mode till one cycle of chopping is over. Above operations are repeated. Normally, the SLOW (+FAST) DECAY mode continues in the sine wave increasing direction, then entering the FAST DECAY mode till the current is attenuated to the set level and followed by the SLOW DECAY mode. No.A2019-14/20 LV8747TA (5) Output current vector locus (one step is normalized to 90 degrees) 2-phase commutation position Channel 1 phase current ratio 100.0 66.7 33.3 0.0 0.0 33.3 66.7 100.0 Channel 2 phase current ratio (6) Typical current waveform in each excitation mode Two-phase excitation (1/2ch, CW mode) I01,I11 H PHA1 H I02,I12 PHA2 (%) 100 IOUT1 0 -100 (%) 100 IOUT2 0 -100 No.A2019-15/20 LV8747TA 1-2 phase excitation (1/2ch, CW mode) I01 I11 PHA1 I02 I12 PHA2 (%) 100 IOUT1 0 -100 (%) 100 0 IOUT2 -100 PCA01195 W1-2 phase excitation (1/2ch, CW mode) I01 I11 PHA1 I02 I12 PHA2 (%) 100 IOUT1 0 -100 (%) 100 IOUT2 0 -100 PCA01196 No.A2019-16/20 LV8747TA Output short-circuit protection circuit To protect IC from damage due to short-circuit of the output caused by lightening or ground fault, the output short-circuit protection circuit to put the output in the standby mode is incorporated. (1) Output short-circuit protection operation changeover function Changeover to the output short-circuit protection of IC is made by the setting of OCPM pin. OCPM State “Low” Auto reset method “High” Latch method (Auto reset method) When the output current is below the output short-circuit protection current, the output is controlled by the input signal. When the output current exceeds the detection current, the switching waveform as shown below appears instead. Exceeding the over-current detection current ON OFF ON OFF ON Output current 1V OCP voltage 0.5 to 1μs 256μs (TYP) When detecting the output short-circuit state, the short-circuit detection circuit is activated. When the short-circuit detection circuit operation exceeds the timer latch time described later, the output is changed over to the standby mode and reset to the ON mode again in 256μs (TYP). In this event, if the over-current mode still continues, the above switching mode is repeated till the over-current mode is canceled. (Latch method) Similarly to the case of automatic reset method, the short-circuit detection circuit is activated when it detects the output short-circuit state. When the short-circuit detection circuit operation exceeds the timer latch time described later, the output is changed over to the standby mode. In this method, latch is released by setting PS = “L” (2) OCP pin constant setting method (timer latch setting) Connect C between the OCP pin and GND, and the time up to the output OFF can be set in case of output short-circuit. The C value can be determined as follows : Timer latch : Tocp Tocp ≈ C × V/I [s] V : Threshold voltage TYP 1V I : OCP charge current TYP 20μA (C: Recommended constant value 100pF to 200pF) No.A2019-17/20 LV8747TA Switching Regulator Controller (1) Regulator block diagram MAXDUTY setting pin 5ch internally fixed REG5 VMSW DT CT RT VM 5V REG25 1.0V Internal reference voltage Triangle wave 2.5V reference voltage 2.5V 0.5V 5V Triangle wave oscillator 5V Constant Current Error amplifier 5V + + 1.6μA NON PWM comparator 5V + FB comparator High during LVS - 5V FB operation 1.55V + - + High during protection circuit operation OUT 5V 5V LVS 5V Short-circuit protection circuit Constant Current REGOUT 2.5μA VM Internal reference voltage VM-5V SOFT INV SCP REGVM5 Soft start setting pin Timer/latch setting pin (2) Timing chart Short-circuit protection comparator reference voltage Oscillator triangular wave output (CT) Max_Duty setting voltage (DT) Error amplifier output (FB) 1.55V 1.0V 0.5V Output (OUT) Triangular wave conversion output (1) SCP pin waveform (2) 1.8V Short-circuit protection comparator output Latch output SOFT pin waveform VMSW supply voltage 9.1V No.A2019-18/20 LV8747TA (3) SOFT pin constant setting method (Soft start setting) The switching regulator can be set to soft-start by connecting C between the SOFT pin and GND. Determine the C value as follows : Soft start time : Tsoft Tsoft ≈ C × V/I [s] V : Error amplifier input + pin voltage (NON5/NON6) I : SOFT charge current TYP 1.6μA (4). SCP pin constant setting method (Timer latch setting) The time up to the output OFF in case of regulator output short-circuit can be set by connecting C between the SCP pin and GND. Determine the C value as follows : Timer latch : Tscp Tscp ≈ C × V/I [s] V : Threshold voltage TYP 1.8V I : SCP charge current TYP 2.5μA (5) RT pin constant setting method (Capacitor charge/discharge current setting) The CT pin capacitor charge/discharge current can be set for triangular wave generation by connecting R between the RT pin and GND. Determine the R value as follows : Charge/discharge current : Irt Irt ≈ V/R [A] V : R pin voltage TYP 0.98V (6) CT pin constant setting method (Triangular wave oscillation frequency setting) The triangular wave oscillation can be set (together with the setting of charge/discharge current setting of RT pin) by connecting C between the CT pin and GND. Determine the C value as follows : Triangular wave oscillation frequency : Fosc Fosc ≈ 1/{2×C×V/I} [Hz] V : Triangle wave amplitude TYP 0.5V (Fosc = 10kHz) *Note that the amplitude increases with the frequency. I : Capacitor charge/discharge current. See the RT pin constant setting method of (5). No.A2019-19/20 LV8747TA + Lo gi c in 100pF pu t + - 1.5V Application Circuit FB6 INV6 FB5 NON6 INV5 GND NON5 OUT6 2 PHA4 REGVM5 OUT5 OCP OCPM 1 GND VREF34 PS I04 I14 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 DT6 48 RT 47 3 OUT4B CT 46 4 RNF4 REG25 45 SCP 43 LV8747TA 6 VM34 7 OUT3B 8 RNF3 9 OUT3A 10 PGND3 11 I03 12 I13 Logic input SOFT 42 VMSW 41 I01 35 Logic input PHA1 33 PGND1 OUT1A OUT1A RNF1 RNF1 OUT1B OUT1B VM12 VM12 OUT2A OUT2A RNF2 I11 34 RNF2 1.5V CP2 37 15 I12 OUT2B - CP1 38 VG 36 OUT2B + CHOP 39 14 I02 PGND2 + VREF12 40 13 PHA3 16 PHA2 620pF REG5 44 5 OUT4A - + 24V - + 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 ON Semiconductor and the ON logo are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent-Marking.pdf. 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This literature is subject to all applicable copyright laws and is not for resale in any manner. PS No.A2019-20/20