NCN5151 Wired M-BUS Slave Transceiver with Low Power Mode Support Description www.onsemi.com The NCN5151 is a single−chip integrated slave transceiver for use in two−wire Meter Bus (M−BUS) slave devices and repeaters. The NCN5151 reuses the NCN5150 features and adds two low power modes: a 2−wire low power mode dedicated to System for meter Communication and Readout for powerless meters (SCR) and a 3−wire low power mode allowing support for wireless applications. When configured in low power mode, the transceiver will not behave anymore as a constant current source in order to save energy. When configured and used in M−BUS mode, the NCN5151 transceiver provides all of the functions needed to satisfy the European Standards EN 13757−2 and EN 1434−3 describing the physical layer requirements for M−BUS. It includes a programmable power level of up to 6 unit loads, which are available for use in external circuits through a 3.3 V LDO regulator. Features • Single−chip M−BUS Transceiver • 2 and 3−Wire Low Power Modes with Selection Input Pins • Integrated 3.3 V VDD LDO Regulator with Extended Peak Current Capability of 15 mA • Supports Powering Slave Device from the Bus • Adjustable Constant Current Sink Up to 6 Unit Loads in M−Bus • • • • • • • • • Mode Adjustable Current Limit up to 2 Unit Loads in Low Power Mode Current budget of 0.88 mA minimum for external circuits Low Turn−ON/OFF Levels for Low Bus Voltage Operation Polarity Independent Power−Fail Function (M−Bus mode) UART Communication Speeds up to 38400 baud Fast Startup − No External Transistor Required on STC Pin Industrial Ambient Temperature Range of −40°C to +85°C These are Pb-free Devices NQFP−20 MN SUFFIX CASE 485E MARKING DIAGRAMS 20 1 A L Y W G NCN 5151 ALYW G = Assembly Location = Wafer Lot (optional) = Year = Work Week = Pb-free Package ORDERING INFORMATION See detailed ordering and shipping information on page 19 of this data sheet. Typical Applications • Multi−Energy Utility Meters ♦ ♦ ♦ ♦ Water Gas Electricity Heating systems Related Standards − European Standard EN 13757−2, EN 1434−3 For more information visit www.m-bus.com © Semiconductor Components Industries, LLC, 2015 April, 2015 − Rev. 2 1 Publication Order Number: NCN5151/D GND 1 BUSL1 2 RIS OD RXI RX VDD NCN5151 20 19 18 17 16 15 3WLPM 14 NC NCN5151 13 VIO BUSL2 3 VB 4 12 TX PMODE 5 11 6 7 8 9 10 STC RIDD PF SC 2PWLPM QFN20 TXI Figure 1. Pin Out NCN5151 in 20−pin NQFP (Top View) Table 1. NCN5151 PINOUT Signal Name Type Pin Number Pin Description GND Ground 1 Ground BUSL1 Bus 2 BUSL2 Bus 3 Bus line. Connect to bus through series resistors. Connections are polarity independent. VB Power 4 Rectified bus voltage PMODE Output 5 Power Mode output indicating the voltage level on VB pin STC Output 6 Storage capacitor pin. Connect to bulk storage capacitor (typically 100 mF − 470 mF, minimum 10 mF). RIDD Input 7 Mark current adjustment pin. Connect to programming resistor. PF Output 8 Power Fail, active low (disabled in low power mode) SC Output 9 Mark bus voltage level storage capacitor pin. Connect to ceramic capacitor (typically 220 nF). 2WLPM Input 10 2−Wire Low Power Mode selection input TXI Output 11 UART Data output (inverted) TX Output 12 UART Data output VIO Input 13 I/O pins (RX, RXI, TX, TXI, PF) high level voltage NC − 14 Leave this pin floating. 3WLPM Input 15 3−Wire Low Power Mode selection input VDD Power 16 Voltage regulator output. Connect to minimum 1 mF decoupling capacitor. RX Input 17 UART Data input RXI Input 18 UART Data input (inverted) OD Output 19 Open Drain output (active low). Used for the slave to master communication in 3−Wire Low Power mode RIS Input 20 Modulation current adjustment pin www.onsemi.com 2 NCN5151 PF 8 19 VIO 13 VIO_BUF VIO OD 3−Wire LPM Buffer Transmitter LP_TX 5 PMODE Power VB Monitor VB_INT 2 Fail BUSL1 Detect 4 VB CS1 3 STC Clamp 7 BUSL2 RIDD 9 STC 6 SC VIO_BUF 11 STC 16 TXI Voltage VDD Receiver Monitor 12 3.3 V TX LDO & POR 2WLPM ECHO 17 10 RX LP_TX Transmitter Low 18 LP_CTL RXI Power 3WLPM 15 Logic CS_TX Thermal Shutdown 1 GND NCN5151 20 RIS Figure 2. NCN5151 Block Diagram www.onsemi.com 3 PC20130527.1 NCN5151 Table 2. ABSOLUTE MAXIMUM RATINGS Parameter Symbol Min Max Unit TJ Junction temperature −40 +150 °C TS Storage temperature −55 +150 °C Bus voltage (|BUSL1 − BUSL2|) −50 50 V VTX, VTXI Voltage on pin TX, TXI −0.3 7.5 V VRX, VRXI, VIO Voltage on pin RX, RXI, VIO −0.3 5.5 V VBUS Voltage on pin OD −0.3 40 V V3WLPM VOD Voltage on pin 3WLPM −0.3 3.6 V V2WLPM Voltage on pin 2WLPM −0.3 3.6 V VPMODE Voltage on pin PMODE −0.3 3.6 V ESDHBM ESD Rating − Human Body Model 4.0 − kV ESDMM ESD Rating − Machine Model 250 − V ESDCDM ESD Rating − Charged Device Model 750 − V Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. All voltages are referenced to GND. Table 3. THERMAL CHARACTERISTICS Symbol RqJA Rating Typical Value Unit 38 °C/W Thermal Characteristics, QFN−20 Thermal Resistance, Junction−to−Air RqJA obtained with 2S2P test boards according to JEDEC JESD51 standard. Table 4. RECOMMENDED OPERATING CONDITIONS (Note 2) Parameter Symbol TA VBUS Max Unit −40 +85 °C 9.2 42 V 3−6 UL 9.7 42 V 1−2 UL 4.75 10 V Ambient Temperature Bus voltage (|VBUSL1−VBUSL2|) M−Bus mode 2 and 3−Low Power Mode VSTC,LP Min 1−2 UL VSTC in Low Power Mode to guarantee min VDD of 3.1 V @ IDD = 15 mA peak 3.8 VIO VIO pin voltage (Note 3) 2.5 3.8 V VOD OD pin voltage (Note 3) 0 10 V ESD−HBM Human Body Model (EIA−JESD22−A114−B) 4 kV ESD−MM Machine Model (JEDEC JESD22−A115) 200 V Charged Device Model (EIA−JESD22−C101−A) 750 V Latch−up (EIA/JESD78) ±100 mA ESD−CDM LU 2. Refer to ELECTRICAL CHARACTERISTIS and APPLICATION INFORMATION for Safe Operating Area. 3. All voltages are referenced to GND www.onsemi.com 4 V NCN5151 Table 5. M−BUS MODE − ELECTRICAL CHARACTERISTICS (Notes 4 and 5) Symbol Parameter Min ΔVBR Voltage drop over bus rectifier (VBUS − VB) with RIDD = 4.02 kW ΔVCS Voltage drop over CS1 (VB − VSTC) IBUS ΔIBUS ISTC DISTC,SPACE Total current drawn from the bus, in Mark State RIDD ≤ 13 kW 1.30 RIDD ≤ 4.02 kW 1.70 Max Unit 1.25 V V mA RIDD = 30 kW 1.30 1.50 RIDD = 13 kW 2.70 3.00 RIDD = 8.45 kW 4.10 4.50 RIDD = 6.19 kW 5.50 6.00 RIDD = 4.87 kW 6.80 7.50 RIDD = 4.02 kW 8.20 9.00 0.2 2 % mA Bus current stability (over ΔVBUS = 10 V, RX/RXI = mark) Idle current available for the application to draw from STC and VDD (including current drawn from VDD) Typ RIDD = 30 kW 0.88 1.00 1.20 RIDD = 13 kW 2.10 2.30 2.60 RIDD = 8.45 kW 3.10 3.60 4.00 RIDD = 6.19 kW 4.20 4.80 5.40 RIDD = 4.87 kW 5.30 6.10 6.90 RIDD = 4.02 kW 6.50 7.40 8.40 − 250 − mA Additional current available for the application when transmitting a space VB,PF Threshold voltage on VB to trigger PF VSTC +0.3 VSTC + 0.8 V VPF,OH PF voltage high (IPF = −100 mA) VIO − 0.6 VIO V VPF, OL PF voltage low (Note 6) (IPF = 50 mA) 0 0.6 V Max Unit 0.35 V mA 4. All voltages are referenced to GND 5. RIDD resistor with 1% accuracy 6. PF pin is pulled down with an on−chip resistor of typically 2 MW Table 6. LOW POWER MODE − ELECTRICAL CHARACTERISTICS (Note 7) Symbol Parameter Min ΔVBR,LP Voltage drop over bus rectifier (VBUS − VB) with IBUS = 3 mA and external Schottky diodes (Note 8) ISTC,LP Max Current available for the application to draw from STC and VDD (including current drawn from VDD) (Note 10) VSTC,CLAMP,LP Typ RIDD (Note 9) = 30 kW 2.0 2.3 2.7 (Note 9) = 13 kW 4.1 4.8 5.5 9.4 10.5 11.5 Clamp voltage on pin STC (IDD < ISTC) (Note 11) V 7. All voltages are referenced to GND 8. Forward voltage of 0.3 V max 9. Resistor with 1% accuracy 10. When configured in low power mode, the current limit of CS1 is set to 2 x the mark current level in M−BUS mode. The NCN5151 does not behave as a current source but as current limiter because VSTC never reaches the STC clamp level. 11. The STC clamp function protects the STC capacitor in case 2WLPM or 3WLPM is accidentally enabled during regular M−Bus operation. Table 7. GENERAL − ELECTRICAL CHARACTERISTICS (Note 12) Symbol Parameter Min Typ Max Unit − 250 500 mA ICC Internal Supply Current (RIDD (Note 13)) = 13kW, RX/RXI = mark) IIO Current drawn by the VIO pin −0.5 − 0.5 mA Voltage on RIDD pin 1.15 1.2 1.25 V VRIDD 12. All voltages are referenced to GND 13. Resistor with 1% accuracy www.onsemi.com 5 NCN5151 Table 8. VDD REGULATOR ELECTRICAL CHARACTERISTICS (Note 14) Symbol Min Typ Max Unit VDD Voltage on VDD (IDD < 15 mA) Parameter 3.1 3.3 3.6 V IDD Peak current that can be supplied by VDD Note 15 with condition VSTC > 3.8 V 15 − − mA IDD, OFF VBUS = 0 V, VSTC = 0 V −0.5 − 0.5 mA VPOR, ON Power−on reset threshold to connect VDD 2.65 2.85 3.15 V VPOR, OFF Power−on reset threshold to disconnect VDD 2.55 2.75 3.00 V VSTC,VDDON Threshold voltage on pin STC to turn on VDD regulator and pull high PF pin. PMODE high (VB > 10.6 V) M−Bus Mode 5.6 6.0 6.4 V PMODE low (VB < 10.6 V) Low Power Mode 3.1 3.4 3.6 V 2.7 3.0 3.2 V VSTC,VDDOFF Threshold voltage on pin STC to turn off VDD regulator and pull low PF pin 14. All voltages are referenced to GND 15. Average current draw limited by ISTC Table 9. M−BUS RECEIVER ELECTRICAL CHARACTERISTICS (Note 16) Symbol VT VSC ISC, charge ISC, discharge CDR Parameter Min Receiver threshold voltage Typ Mark − 8.2 Mark level storage capacitor voltage Max Unit Mark − 5.7 V VB V Mark level storage capacitor charge current −40 −25 −15 mA Mark level storage capacitor discharge current 0.3 0.6 −0.033 x ISC, charge mA Charge/Discharge current ratio 30 40 − VIO − 0.6 − VIO V TX/TXI low−level voltage (ITX/ITXI = 100 mA) 0 0.20 0.35 V VTX,OL2 TX/TXI low−level voltage (ITXI = 1.1 mA) − 1 1.5 V ITX, ITXI VTX = 7.5 V, VSTC = 6 V 0 11 16 mA VTX,OH1 VTXI,OH1 TX/TXI high−level voltage (ITX/ITXI = −100 mA) (Note 17) VTXI,OL1 VTX,OL1 16. All voltages are referenced to GND 17. VSTC > VIO + 1 V Table 10. LOW POWER MODE RECEIVER ELECTRICAL CHARACTERISTICS (Note 18) Symbol Parameter Min Typ Max Unit VTL,LP Receiver low threshold voltage (Falling VBUS) 1.2 1.6 2.4 V VTH,LP Receiver high threshold voltage (Rising VBUS) 1.5 2 2.7 V VTX,OH2 VTXI,OH2 TX/TXI high−level output voltage (ITX/ITXI = −100 mA) with VSTC ≥ VIO + 0.7 V VIO − 0.75 VIO − 0.6 VIO V VTX,OH3 VTXI,OH3 TX/TXI high−level output voltage (ITX/ITXI = −50 mA) with VSTC ≥ VIO + 0.5 V VIO − 0.6 VIO − 0.45 VIO V VTXI,OL3 VTX,OL3 TX/TXI low−level output voltage (ITX/ITXI = 100 mA) 0 0.20 0.35 V 18. All voltages are referenced to GND www.onsemi.com 6 NCN5151 Table 11. M−BUS TRANSMITTER ELECTRICAL CHARACTERISTICS (Note 19) Parameter Symbol Min Typ Max Unit IMC Space level modulating current with RRIS = 100 W (Note 20) 12.5 15 18 mA VRIS Voltage on RIS pin 1.2 1.4 1.6 V 5.5 V VRX,IH, VRXI,IH RX/RXI high−level input voltage VRX,IL, VRXI,IL RX/RXI low−level input voltage 0 0.8 V Current drawn from RX/RXI pins (Note 21) (VIO = 3 V) ±6 ±30 mA IRX, IRXI VIO − 0.8 19. All voltages are referenced to GND 20. Resistor with 1% accuracy 21. Including internal pull−up resistor on RX and internal pull−down resistor on RXI Table 12. LOW POWER MODE TRANSMITTER ELECTRICAL CHARACTERISTICS (Note 22) Symbol Parameter Min Typ Max Unit Transmission current with RRIS = 100 W (Note 23) 8.5 10 11.5 mA Voltage on RIS pin 0.85 1.00 1.15 V OD low−level output voltage, IOD = 2 mA 0 0.1 0.3 V OD leakage current, VOD = 10 V 0 − 1 mA Min Typ Max Unit 8.0 9.4 10.5 V VDD − 0.3 − VDD V 0 − 0.3 V Min Typ Max Unit 2−WIRE LOW POWER MODE ITX,2WLPM VRIS,2WLPM 3−WIRE LOW POWER MODE VOD,OL ILEAK,OD 22. All voltages are referenced to GND 23. Resistor with 1% accuracy Table 13. VB MONITOR ELECTRICAL CHARACTERISTICS (Note 24) Parameter Symbol VVB,PMODE VB voltage level to enable PMODE pin VPMODE,OH PMODE high−level output voltage, IPMODE = −50 mA VPMODE,OL PMODE low−level output voltage , IPMODE = 50 mA 24. All voltages are referenced to GND Table 14. 2WLPM and 3WLPM INPUT CHARACTERISTICS (Note 25) Symbol Parameter I2WLPM,IL I3WLPM,IL 2WLPM / 3WLPM pull−down current, (voltage range: 0.2 to 3.3 V) 2 uA V2WLPM,IL V3WLPM,IL 2WLPM / 3WLPM low−level input voltage 0 − 0.2 x VDD V V2WLPM,IH V3WLPM,IH 2WLPM / 3WLPM high−level input voltage 0.8 x VDD − VDD V 25. All voltages are referenced to GND Table 15. 2WLPM, 3WLPM, and OD TRUTH TABLE 2WLPM 3WLPM Operating Mode OD L L M−Bus HiZ L H 3 Wire Low Power Mode Space (Note 26) state: Low Mark (Note 27) state: HiZ H L 2 Wire Low Power Mode High Impedance H H Not Valid (Note 28) Space state: Low Mark state: HiZ 26. “Space” state means RX “0” or RXI “1” 27. “Mark” state means RX “1” or RXI “0” 28. Note 2WLPM and 3WLPM both High is not a valid combination. This state is not destructive for the NCN5151 device, but the communication will fail www.onsemi.com 7 NCN5151 APPLICATION SCHEMATICS − M−BUS APPLICATION ONLY CVDD VIO PMODE 2WLPM 3WLPM PF TX mC TXI VDD 13 5 16 10 OD 19 15 8 NCN5151 BUSL1 2 12 11 VB 4 RX RBUS1 M−BUS TVS1 17 RXI 18 20 RIS 3 9 1 SC 7 GND RIDD CSC RIS BUSL2 6 R BUS2 STC RIDD CSTC PC20130419.4 Figure 3. General Application Schematic CVDD VIO PMODE 2WLPM 3WLPM PF mC TX TXI 5 VDD 13 16 10 19 OD 15 8 NCN5151 2 12 11 4 RX BUSL1 VB RBUS1 TVS1 17 RXI 18 20 RIS RIS 3 9 1 SC 7 GND CSC 6 RIDD RIDD BUSL2 R BUS2 STC CSTC PC2010419.5 Figure 4. Application Schematic with External Power Supply www.onsemi.com 8 M−BUS NCN5151 VBB VDD CVDD VIO VSTC PMODE 2WLPM 3WLPM PF TX mC VBB VDD TXI RX VDD 13 5 16 10 19 OD 15 8 NCN5151 12 11 2 4 R BUS1 BUSL1 VB TVS1 M−BUS 17 RXI 18 20 9 RIS SC 1 3 7 6 BUSL2 GND RIDD STC CSC RIS RIDD R BUS2 VSTC CSTC PC20130419.6 Figure 5. Optically Isolated Application Schematic Table 16. TYPICAL BILL OF MATERIALS − M−BUS MODE Reference Designator Value (Typical) Tolerance U1 TVS1 40 V CVDD ≥1 mF CSTC Part Number NCN5151 ON Semiconductor 1SMA40CAT3G −20%, +80% RIS 100W 1% CSC 220 nF −20%, +80% 220 W 10% 1 UL 30 kW 1% 2 UL 13 kW 1% 3 UL (Note 29) 8.45 kW 1% 4 UL (Note 29) 6.19 kW 1% 5 UL (Note 29) 4.87 kW 1% 6 UL (Note 29) 4.02 kW 1% 1 UL <330 mF 10% 2 UL <680 mF 10% 3 UL (Note 29) <1000 mF 10% 4 UL (Note 29) <1500 mF 10% 5 UL (Note 29) <2200 mF 10% 6 UL (Note 29) <2200 mF 10% RBUS1, RBUS2 RIDD Manufacturer ON Semiconductor 29. 3−6 UL configurations are only possible for the NQFP variant. www.onsemi.com 9 NCN5151 APPLICATION INFORMATION − M−BUS MODE 1.5 mA called unit loads. Table 5 lists the different values of programming resistors needed for different unit loads, as well as the current drawn from the bus (IBUS) and the current that can be drawn from the STC pin (ISTC). ISTC is slightly less than IBUS to account for the internal power consumption of the NCN5151. The resistors RIDD used must be at least 1% accurate. Note that using 5 and 6 Unit Loads is not covered by the M−BUS standard. When the voltage on the STC pin reaches VSTC,VDDON the LDO is turned on, and will regulate the voltage on the VDD pin to 3.3 V, drawing current from the storage capacitor. A decoupling capacitor of minimum 1 mF is required on the VDD pin for stability of the regulator. On the STC pin, a minimum capacitance of 10 mF is required. Furthermore, the ratio CSTC/CVDD must be larger than 9. The voltage on the STC pin is clamped to VSTC by a shunt regulator which will dissipate any excess current that is not used by the NCN5151 or external circuits. This section provides some information related to M−bus mode application. The NCN5151 is a slave transceiver for use in the M−Bus protocol. The bus connection is fully polarity independent. The transceiver will translate the bus voltage modulation from master−to−slave communication to TTL UART communication, and in the other direction translate UART voltage levels to bus current modulation. The transceiver also integrates a voltage regulator for utilizing the current drawn in this way from the bus, and an early power fail warning. The transceiver also supports an external power supply and the I/O high level can be set to match the slave sensor circuit. A complete block diagram is shown in Figure 2. Each section will be explained in more detail below. M−Bus Protocol M−BUS is a European standard for communication and powering of utility meters and other sensors. Communication from master to slave is achieved by voltage−level signaling. The master will apply a nominal +36 V to the bus in idle state, or when transmitting a logical 1 (“mark”). When transmitting a logical 0 (“space”), the master will drop the bus voltage to a nominal +24 V. Communication from the slave to the master is achieved by current modulation. In idle mode or when transmitting a logical 1 (“mark”), the slave will draw a fixed current from the bus. When transmitting a logical 0 (“space”), the slave will draw an extra nominal 15 mA from the bus. M−BUS uses a half−duplex 11−bit UART frame format, with 1 start bit, 8 data bits, 1 even parity bit and a stop bit. Communication speeds allowed by the M−BUS standard are 300, 600, 2400, 4800, 9600, 19200 and 38400 baud, all of which are supported by the NCN5151. Slave Power Supply (External Battery) In case the external sensor circuit consumes more than the allowed bus current or the sensor should be kept operational when the bus is not present, an external power supply, such as a battery, is required (Figure 4). When the external circuitry uses different logical voltage levels, simply connect the power supply of that voltage level to VIO, so that the RX, RXI, TX, TXI and PF pins will respond to the correct voltage levels. The NCN5151 will still be powered from the bus, but all communication will be translated to the voltage level of VIO. Contrary to the NCN5150, the NCN5151 does not support the remote supply/Battery support because of the VSTC,VDDOFF level which has been lowered below 3.3 V for low bus voltage operation. Bus Connection and Rectification The bus should be connected to the pins BUSL1 and BUSL2 through series resistors to limit the current drawn from the bus in case of failure (according to the M−BUS standard). Typically, two 220 W resistors are used for this purpose. Since the M−BUS connection is polarity independent, the NCN5151 will first rectify the bus voltage through a semi−active bridge rectifier. Communication, Master to Slave M−BUS communication from master to slave is based on voltage level signaling. To differentiate between master signaling and voltage drop caused by the signaling of another slave over cabling resistance, etc., the mark level VMARK is stored, and only when the bus voltage drops to less than VT will the NCN5151 detect communication. A simplified schematic of the receiver is shown in Figure 7. The received data is transmitted on the pins TX and TXI, as shown in the waveforms in Figure 6. An external capacitor must be connected to the SC pin to store the mark voltage level. This capacitor is charged to VS. Discharging of this capacitor is typically 40x slower, so that the voltage on SC drops only a little during the time the master is transmitting a space. The value of CSC must be chosen in the range of 100 nF − 330 nF. Slave Power Supply (Bus Powered) A slave device can be powered by the M−BUS or from an external supply. The M−BUS standard requires the slave to draw a fixed current from the bus. This is accomplished by the constant current source CS1. This current is used to charge the external storage capacitor CSTC. The current drawn from the bus is defined by the programming resistor RIDD. The bus current can be chosen in increments of www.onsemi.com 10 NCN5151 VRX VBUS VMARK VIO VT VMARK = 21 … 42 V 0 VT = VMARK − 6 V VSPACE = VMARK − 12 V VSPACE IBUS ISPACE VTX ISPACE = IMARK + 15 mA VIO IMARK = N unit loads IMARK 0 PC20130514.5 VTXI VIO Figure 8. Slave to Master Communication Driving RX VRX 0 VIO PC20130419.1 Figure 6. Master to Slave Communication 0 IBUS ISPACE C SC SC 9 ISPACE = IMARK + 15 mA PC20130516.2 VB_INT IMARK = N unit loads IMARK NCN5151 PC20130514.6 VIO_BUF ICHARGE 12 A B IDISCHARGE Figure 9. Slave to Master Communication Driving RXI TX Encoding A: M−Bus Mode B: 2&3Wire LPM 11 TXI VIO_BUF LP_CTL ECHO Figure 7. Receiver Block 17 ECHO A: M−Bus/2WLP Mode B: 3−Wire LP Mode B LP_TX Communication, Slave to Master Decoding 18 A M−BUS communication from slave to master uses bus current level modulation while the voltage remains constant. This current modulation can be controlled from either the RX or RXI pin as shown in Figures 8 and 9. When transmitting a space (“0”), the current modulator will draw an additional current from the bus. This current can be set with a programming resistor RRIS. To achieve the space current required the M−BUS standard, RRIS should be 100 W. A simplified schematic of the transmitter is shown in Figure 10. Because the M−BUS protocol is specified as half−duplex, an echo function will cause the transmitted signal on RX or RXI to appear on the receiver outputs TX and TXI. Should the master attempt to send at the same time, the bitwise added signal of both sources will appear on these pins, resulting in invalid data. LP_CTL CS_TX VB_IN M−Bus: 1.5V 2−Wire LP: 1V 20 RIS NCN5151 PC20130516.1 R IS Figure 10. Transmitter Block www.onsemi.com 11 RX RXI NCN5151 200 be used to dimension the value of the bulk CSTC needed, taking into account that the M−BUS standard requires ton to be less than 3 s. For certain applications where the power drawn from the bus is not used in external circuits, the storage capacitor value can be much lower. The NCN5151 requires a minimum STC capacitance of 10 mF (and CSTC/CVDD > 9) to ensure that the bus current regulation is stable under all conditions. RIS (W) 150 100 VBUS VB = VSTC + 0.6 50 VB,min 5 10 15 IMC (mA) 20 25 VSTC Figure 11. Typical Modulation Current and RIS Resistor VSTC,CLAMP VSTC,VDD ON VSTC,VDD OFF 0 Power On/Off Sequence and Power Fail Indicator tON The power-on and power-off sequence of the NCN5150 is shown in Figure 12. Shown also in Figure 12 is the operation of the PF pin. This pin is used to give an early warning to the microcontroller that the bus power is collapsing, allowing the microcontroller to save its data and shut down gracefully. The times ton and toff can be approximated by the following formulas: t on + t off + C STC I DD ) I STC C STC I STC tOFF VDD 0 VPF VIO 0 PC20130419.3 Figure 12. Power−on and Power−off V STC,VDDON ǒVSTC,CLAMP * VSTC,VDD OFFǓ Thermal Shutdown The NCN5151 includes a thermal shutdown function disabling the transmitter in case of excessive junction temperature. Where ICC is the internal current consumption of the NCN5151 and IDD is the current consumed by external circuits drawn from either VDD or STC. These formulas can www.onsemi.com 12 NCN5151 APPLICATION SCHEMATICS LOW−POWER MODE and M−BUS APPLICATIONS CVDD PF PMODE “0” Sensor System “1” 13 8 VOD VDD 16 5 19 2WLPM RF−MODULE ROD OD 10 Data IN TVS1 3WLPM 15 TX ÎÎÎÎÎ ÎÎÎÎÎ VIO ROD_PU VOD TXI RX NCN5151 2 12 11 4 BUSL1 RIS 3 9 1 SC 7 GND CSC RIS 6 RIDD D1 TVS2 D2 TVS3 DC Supply + ON/OFF Keying VB 17 RXI 18 20 RBUS1LP BUSL2 RBUS 2LP STC RIDD CSTC BAT_RF Min: 4.75 V Max: 9 V 4.75 .. 9 V 0V PC20130419.9 Figure 13. 3−Wire Low Power Mode and M−Bus Application Schematic 4.75 .. 9 V C VDD V OD VIO PF PMODE “1” “0” 0V 13 16 8 MODULE 5 19 2WLPM R OD OD 10 TVS 1 3WLPM 15 Sensor System V OD VDD TX TXI NCN5151 2 BUSL1 DC D1 11 4 RX 3 20 RIS R IS 9 1 SC 7 GND C SC 6 RIDD R IDD Supply + D2 18 TVS 2 VB 17 RXI R BUS1LP 12 TVS 3 ON/OFF Keying BUSL2 R BUS2LP STC C STC BAT Min: 4,75 V Max: 9 V PC20130419.7 Figure 14. 2−Wire Low Power Mode and M−Bus Application Schematic www.onsemi.com 13 NCN5151 Table 17. TYPICAL BILL OF MATERIALS − LOW POWER MODE Reference Designator Value (Typical) Tolerance U1 Manufacturer Part Number ON Semiconductor NCN5151 Note TVS1 40 V ON Semiconductor 1SMA40AT3G TVS2 30 V ON Semiconductor 1SMA30AT3G ON Semiconductor BAS70LT1G Absolute maximum reverse voltage >40 V Murata PRG18B330MB1RB Over−current protection resistor type are recommended for Low Power Modes D1, D2 CVDD ≥1 mF −20%, +80% RIS 100 W 1% −20%, +80% CSC 220 nF RBUS1LP, RBUS2LP 33 W ROD 560 W 10% 30 kW 1% RIDD CSTC 1 UL 2 UL 13 kW 1% 1 UL <330 mF 10% 2 UL <680 mF 10% Min : 22 mF with CSTC / CVDD > 9 APPLICATION INFORMATION − LOW POWER MODE 3−Wire LP Mode − RF Module − Bidirectional between 4.75 and 9 V; two 3 V lithium batteries are normally used in a system like this. Figure 17 illustrates this bidirectional communication in 3−wire LP mode. The OD pin has to be protected against surge transients with a TVS and a series resistor ROD. This resistor acts also as a current limiter in case of a short between the 9V battery module and the wire “Data_In” going to the OD connector, while 3WLPM and RX/RXI are active. The current through the OD pin is limited to 20 mA. Therefore a typical ROD resistor of 560 W is recommended. (Note that the internal OD switch has a typical RDS(on) of 50 W) This section provides some information related to the NCN5151 operating in Low Power mode. As depicted in Figure 13, the NCN5151 also offers the possibility to build an extremely low power communication with an external RF Module. This topology uses a 3−wire interface: the regular bus lines (BUSL1, BUSL2) and the open drain pin (OD). This three−wire interface is designed in such a way that when the system is switched on, the Sensor System detects via the third contact VOD whether any direct connection with the external battery module exists. If this is the case, the Sensor System enables the 3WLPM (three−wire low power mode) pin. The low power logic changes the operating mode of the transmitter block (Figures 2 and 10). The communication from slave to RF module does not take place via energy−intensive current modulation, but instead by means of a purely digital signal on the OD pin. This enables extremely energy−saving communication with the master. As with the M−Bus, the RF module signals the data to the NCN5151 through voltage modulation but in this case this is purely ON/OFF keying. This means the power supply (maximum of 9 V) is simply switched on and off. As illustrated in Figure 7 the receiver threshold switches to a level referenced to ground instead of the mark state. The sensor system has to make sure that it has sufficient energy to send data and save enough energy in a capacitor for this purpose. During communication from the RF module to the sensor, the sensor system must also have sufficient energy and buffer this if necessary. The power supply can be 2−Wire LP Mode − SCR − Bidirectional The second low power mode works with a 2−wire interface also called SCR (System for meter Communication and Readout for powerless meters) which is enabled with the 2WLPM input pin (see Figure 14). The communication from master to slave is done with ON/OFF keying similar to 3−wire LP mode, but the communication from slave to master uses current modulation similar to the current modulation used in the M−Bus protocol. In order to handle the low supply voltage (down to 4.75 V) and limit voltage losses, the current modulation amplitude is reduced with 33% (10 mA vs 15 mA) as illustrated in Figure 10. Figure 18 illustrates the bidirectional communication in 2−wire LP mode. Precautions regarding the stored energy during ON/OFF keying are also valid for this mode www.onsemi.com 14 NCN5151 MBUS and Low Power Mode Recognition This current limit in low power mode is double compared to the M−BUS mode (Table 6, Figures 15 and 16). This allows a faster recharge of CSTC during ON/OFF keying and a duty cycle close to 50%. The NCN5151 includes a VB voltage monitor with an output pin PMODE (Power Mode) indicating whether VB voltage is above 9.5 V typical. This information is sent to the sensor system which determines the relevant mode (using the OD state pin): M−Bus, 2−wire or 3−wire low power mode. The sensor system then signals the NCN5151 the chosen operating mode using 2WLPM and 3WLPM pins (see Figures 15 and 16). During 2WLPM or 3WLPM the PF output is disabled and pulled to ground. By keeping the selection mode mechanism outside the NCN5151, the user can enhance the meter application robustness and its reliability through the sensor system firmware based on their application environment. Table 15 gives an overview of the low power pin truth table. Note that both 2WLPM and 3WLPM pins enabled is not allowed. This combination is safe for the NCN5151 but the communication with the master may fail. Low Power Mode and Minimum Operating Voltage The user should take several precautions when using the low power modes in order to maximize the voltage seen by the NCN5151 circuitry. It is required to replace the 220 W bus resistors with current limiting resistor (33 W typ, PTC type with rapid operation). This will significantly reduce the voltage drop, especially during current modulation (slave to master) in 2WLPM and guarantee sufficient short protection. An external Schottky (with forward voltage of 0.3 V max) is also required between BUSL1/BUSL2 and the VB pin in order to reduce the overall voltage drop on the internal diode bridge. These adaptations allow the NCN5151 to operate in low power mode with a minimum battery voltage of 4.75 V. As mentioned in both low power mode sections, it is important to maintain a minimum voltage level on the STC pin during the ON/OFF keying. Below 3.8 V on STC, the low dropout regulator may not be able to regulate the VDD supply pin correctly. CS1 Current Source and STC Clamp Contrary to M−BUS mode, in low power mode the NCN5151 does not behave as a constant current load. The STC clamp level (VSTC,CLAMP,LP) is increased higher than the low power mode supply (9.5 V typical) in order to never trigger it under normal operating range. Thus the CS1 will only act as current limiter during startup and ON/OFF keying and in steady state the CS1 block will be pinched off between STC and VB. www.onsemi.com 15 NCN5151 V 5V VBUS VSTC VDD VSTC,VDDON VPOR,ON 1 1 VDD release IBUS 2 Drop of IBUS due to clamping of STC to VBUS IBUS_MAX= 2 x f(RIDD) 3 Detection and enabling 3−wire low power mode by the external mC/sensor 4 Increases of bus current limit (x2) and increase of STC clamp level 0 2 I BUS_MAX= f(RIDD) ICC + ISENSOR 0 VOD 4 0 VPMODE 0 V2WLPM 0 V 3WLPM 3 0.8 VDD 0 VTX VIO 0 VTXI 0 PC20130514.1 Figure 15. Startup Sequence in 3−Wire Low Power Mode www.onsemi.com 16 NCN5151 V 5V VBUS VSTC V DD VSTC,VDDON VPOR,ON 1 1 VDD release IBUS 2 Drop of IBUS due to clamping of STC to VBUS I BUS_MAX = 2 x f(RIDD) 3 Detection and enabling 2−wire low power mode by the external mC/sensor 4 Increases of bus current limit (x2) and increase of STC clamp level 0 2 I BUS_MAX = f(RIDD) I CC + I SENSOR 0 VOD 4 0 VPMODE 0 V2WLPM 0.8 VDD 0 V3WLPM 3 0 VTX VIO 0 VTXI 0 PC20130514.2 Figure 16. Startup Sequence in 2−Wire Low Power Mode www.onsemi.com 17 NCN5151 V Master to Slave Slave to Master VBUS VSTC VTH,LP VTL,LP 0 IBUS IBUS_MAX = 2 x f(RIDD) ICC + ISENSOR 0 VOD VIO 0 VRX VDD 0 VTX VIO 0 VTXI VIO 0 V2WLPM VDD 0 V3WLPM VDD PC20130514.3 0 Figure 17. Communication in 3−wire Low Power Mode www.onsemi.com 18 NCN5151 Master to Slave Slave to Master V VBUS VSTC VTH,LP VTL,LP 0 IBUS ITX,2WLPM IBUS_MAX= 2 x f(RIDD) ICC + ISENSOR 0 VOD VIO 0 VRX VIO 0 VTX VIO 0 VTXI VIO 0 V2WLPM VDD 0 V3WLPM VDD 0 PC20130514.4 Figure 18. Communication in 2−wire Low Power Mode Table 18. ORDERING INFORMATION Device NCN5151MNTWG Package Shipping† NQFP20, 4x4 (Pb-free) 2500 / Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. www.onsemi.com 19 NCN5151 PACKAGE DIMENSIONS QFN20, 4x4, 0.5P CASE 485E ISSUE B A B D PIN ONE REFERENCE 2X 0.15 C ÉÉÉ ÉÉÉ ÉÉÉ ÇÇ ÉÉ EXPOSED Cu E NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN 0.15 AND 0.30 MM FROM THE TERMINAL TIP. 4. COPLANARITY APPLIES TO THE EXPOSED PAD AS WELL AS THE TERMINALS. ÉÉ ÉÉ ÇÇ A3 MOLD CMPD A1 DETAIL B DIM A A1 A3 b D D2 E E2 e K L L1 OPTIONAL CONSTRUCTIONS 2X 0.15 C L L TOP VIEW (A3) DETAIL B L1 A 0.10 C DETAIL A OPTIONAL CONSTRUCTIONS 0.08 C A1 SIDE VIEW C MILLIMETERS MIN MAX 0.80 1.00 --0.05 0.20 REF 0.20 0.30 4.00 BSC 2.60 2.90 4.00 BSC 2.60 2.90 0.50 BSC 0.20 REF 0.35 0.45 0.00 0.15 SEATING PLANE SOLDERING FOOTPRINT* 0.10 C A B D2 DETAIL A 20X 4.30 20X 0.58 L 6 2.88 0.10 C A B 11 E2 1 1 20 K 20X e 2.88 4.30 b 0.10 C A B 0.05 C BOTTOM VIEW NOTE 3 PKG OUTLINE 20X 0.35 0.50 PITCH DIMENSIONS: MILLIMETERS *For additional information on our Pb-free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada Email: [email protected] N. American Technical Support: 800−282−9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81−3−5817−1050 www.onsemi.com 20 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative NCN5151/D