M-BUS Design Changes Between TSS721A and NCN5150

AND9108/D
M-BUS Design Changes
Between TSS721A and
NCN5150
NCN5150 is a drop in replacement of the TSS721A for all designs
using a VDD capacitor larger than 1 mF. The NCN5150 M−BUS
transceiver (in SOIC version) is pin−to−pin compatible with the
TSS721A from Texas Instruments™ and can replace this component
with no changes to the PCB layout on a typical implementation. Some
minor differences between both parts are detailed in this document.
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APPLICATION NOTE
Summary of Differences
• No transistor required on STC for fast start−up
• Minimum required decoupling capacitance on VDD
External PMOS Transistor on STC
PACKAGE PICTURES
The TSS721A requires an external PMOS transistor (BSS84) in
series with the STC capacitor if this capacitor is larger than 50 mF in
order to meet the maximum start−up time requirement by the M−BUS
standard. The NCN5150 does not require this transistor (QSTC), and
allows the STC capacitor to be connected directly to the STC pin.
Optionally, for existing PCB layouts where no possibility exists to
bypass the transistor footprint, the transistor can be kept in place
without any problem.
QFN20
CASE 485E
VDD Decoupling Capacitor
The NCN5150 requires a minimum total decoupling capacitance
(CVDD) of 1 mF on the output of the 3.3 V regulator to remain stable.
Typical designs with the TSS721A will use a 100 nF capacitor.
Related Standards:
European Standard
EN 13757−2
EN 1434−3
© Semiconductor Components Industries, LLC, 2013
March, 2013 − Rev. 1
MARKING DIAGRAMS
1
NCN
5150
ALYW
G
A
(W)L
YW(W)
G/G
For more information visit www.m−bus.com
1
SOIC−16
CASE 751B−05
NCN5150
AWLYWWG
= Assembly Location
= Wafer Lot
= Year / Work Week
= Pb-Free Package
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VS
VIO
VDD
RBUS1
CVDD
BUSL2
U1
NCN5150
TXI
TX
RX
RXI
PFb
mC
TVS1
VB
MBUS
BUSL1
RBUS2
RIS
SC
RIS
GND
RIDD
STC
RIDD
CSC
CSTC
Figure 1. General Application Schematic – NCN5150
VS
VIO
VDD
RBUS1
CVDD
TSS721A
TXI
TX
RX
RXI
PFb
mC
BUSL2
U1
TVS1
VB
MBUS
BUSL1
RBUS2
RIS
SC
RIS
GND RIDD
CSC
STC
RIDD
QSTC
Figure 2. General Application Schematic – TSS721A
Table 1. GENERAL APPLICATION SCHEMATIC BOM DIFFERENCES
Reference Designator
TSS721A
NCN5150
U1
TSS721A
NCN5150
CVDD
100 nF
1 mF
RIS
100 W
100 W
RIDD
30 kW (1UL)
13 kW (2UL)
30 kW (1UL)
13 kW (2UL)
CSC
220 nF (typ.)
220 nF (typ.)
QSTC
BSS84L
BSS84L (optional)
CSTC
up to 470 mF
up to 470 mF
RBUSL1, RBUSL2
220 W
220 W
TVS1
1SMA40CAT3G
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CSTC
AND9108/D
Start-up and Shut-down
cause the PF pin to rise above the recommended voltage
rating of the microcontroller it is connected to. During
start-up of the NCN5150 no unwanted step is present on
VDD and all of the IO pins are turned on only when VDD
is turned.
Shutdown of both components is shown in figures 7, 8 and
9. We can see the PFb pin (green) go from logic high to low.
This happens immediately after the bus voltage collapses.
The VDD is disconnected later. All these figures were taken
with an external load on VDD, because otherwise the VDD
capacitor would retain its charge for a long time.
However, when the load on VDD is removed after the
voltage has collapsed (as is the case for digital circuits) the
TSS721A will charge back to ∼300 mV, which can be
undesirable for certain circuits. The NCN5150 does not have
this behavior.
Shown in figures 3, 4, 5 and 6 is the start-up and shutdown
of the NCN5150 next to the corresponding waveforms
captured from the TSS721A (both with and without STC
transistor). We can see clearly that the startup of the
TSS721A is much longer without the STC transistor, and
will not comply with the M-BUS standard defined
maximum start-up time of 3 s for the same STC capacitor
value. The solution in this case is to add an extra PMOS in
series with the STC capacitor.
While this technique reduces the startup to similar time as
the NCN5150 at the cost of an extra component, it also
causes a 700 mV step on VDD if no load is present on VDD.
If a sufficient external load is present, this step will not
occur, however in this case a strange effect can be seen on
PF, where this pin rises along with the STC voltage until the
VDD regulator is turned on, as shown in figure 6. This can
Figure 3. NCN5150 Startup (CSTC = 220 mF, 1 Unit Load, no STC transistor)
(purple = BUSL1, blue = STC, yellow = VDD, green = PFb)
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AND9108/D
Figure 4. TSS721A Startup (CSTC = 220 mF, 1 Unit Load, no STC transistor)
(purple = BUSL1, blue = STC, yellow = VDD)
Figure 5. TSS721A Startup (CSTC = 220 mF, 1 Unit Load, BSS84L, no external load)
(purple = BUSL1, blue = STC, yellow = VDD)
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AND9108/D
Figure 6. TSS721A Startup (CSTC = 220 mF, 1 Unit Load, BSS84L, external load of 8 kW)
(purple = BUSL1, blue = STC, yellow = VDD, green = PFb)
Figure 7. NCN5150 Shutdown (CSTC = 220 mF, 1 Unit Load, external load of 8 kW)
(purple = BUSL1, blue = STC, yellow = VDD, green = PFb)
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AND9108/D
Figure 8. TSS721A Shutdown (CSTC = 220 mF, 1 Unit Load, external load of 8 kW)
(purple = BUSL1, blue = STC, yellow = VDD, green = PFb)
Figure 9. TSS721A Shutdown (CSTC = 220 mF, 1 Unit Load, external load of 8 kW disconnected on shutdown)
(purple = BUSL1, blue = STC, yellow = VDD, green = PFb)
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AND9108/D
Minimum STC capacitor value
Therefore, for practical purposes, a ratio of at least 6 times
between the nominal values is recommended. The effect of
choosing a lower STC capacitor value at startup is shown in
figure 10. You can see the STC voltage dropping when
charge is transferred to the VDD capacitor. In this case, the
value of the STC capacitor is low enough for the STC
voltage to drop below the disable threshold of the VDD
regulator, resulting in the VDD capacitor being charged in
steps. This can have potential bad effects when the
microcontroller already starts up at a lower voltage. In that
case, the microcontroller will be powered solely from the
small charge on the VDD capacitor, and the VDD voltage
will collapse, resulting in a cycle of microcontroller reboots.
Choosing a low STC capacitor value will also severely
reduce the shutdown time.
For applications where the external circuit is not powered
by the bus, it can make sense to choose a low value capacitor
for STC. The lower limit on this capacitor is determined by
two factors that apply equally to the TSS721A and the
NCN5150.
The first lower limit is determined by the charge transfer
to the VDD capacitor when the device is starting up. To
achieve a clean startup, the voltage drop incurred by this
charge transfer should not cause the STC voltage to drop
below the turn-off threshold.
For both parts, this limits the STC voltage drop DVSTC to
1.3 V. This leads us to a minimum ratio between the
capacitor values on VDD and STC of:
This equation does not take into account the tolerances on
capacitor value, which can be up to −80% or +20%.
Figure 10. Charge Transfer Instability (NCN5150, CSTC = 2 mF, CVDD = 1 mF, 1 Unit Load, no external load)
(purple = BUSL1, blue = STC, green = VDD)
Current available for application (during transmit)
However, there is also another factor that is usually stricter
in determining the minimum capacitance on CSTC. The
value of CSTC has an influence on the stability of the bus
current regulator. For values of CSTC that are too small, the
bus current regulator will become unstable and an
oscillation will become visible on the bus current. To ensure
stable operation under all environmental conditions and
sample variation, a minimum CSTC capacitor value of 10 mF
is required.
Thanks to the internal operation of the NCN5150, the
application has an extra 200 mA (typical) available to be
drawn from VDD or STC when the transceiver is sending a
space. This extra current is on top of the expanded current
budget offered by the NCN5150 due to its reduced power
consumption. This may ease the design of an isolated
application. On the TSS721A, the current available is
constant.
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AND9108/D
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