LC823450 Low Power & High-Resolution Audio Processing System LSI for Portable Sound Solution LC823450 is audio processing system LSI for record and playback, and High-Resolution 32-bit & 192 kHz audio processing capable. It is possible to cover the most of functions necessary for a portable audio with only this LSI as follows. It has Dual CPU and DSP with High processing capability, and internal 1656K-Byte SRAM, which make it possible to implement large scale program. And it has integrated analog functions so that PCB space and cost is reduced, and it has various interface to make extensibility high. Also it is provided with various function including SBC/AAC codec by DSP and UART and ASRC for Bluetooth® audio. It is very small chip size in spite of the multi-funciton as described above and it realizes the low power consumption. Therefore, it is applicable to porable audio markets such as Wireless headsets and will show high performance. This document describes features, basic functions, electrical specifications, characteristics, application diagram and package dimension of this LSI. www.onsemi.com TQFP128 14x14 / TQFP128L [LC823450TA-2H] Features Ultra low power consumption ARM ® Cortex® -M3 Dual Core Proprietary 32-bit DSP Core (LPDSP32) Internal large scale size SRAM : 1656 KB (1.5 MB + 120 KB) High-Resolution 32-bit & 192 kHz audio processing capability WLCSP154, 5.52x5.33 [LC823450XATBG, LC823450XBTBG, LC823450XCTBG, LC823450XDTBG] Several DSP codes available for audio functions Hard wired audio functions built-in MP3 decoder, MP3 encoder 6 band Equalizer Synchronous SRC, Asynchronous SRC, etc. ORDERING INFORMATION Analog blocks built-in System PLL, Audio PLL 16-bit DAC, Class-D amp, etc. See detailed ordering and shipping information in the package dimensions section on page 55 of this data sheet. USB2.0 device and USB2.0 host with a integrated PHY eMMC and SD card I/F Serial Flash I/F(Quad) with cache memory 2 SPI, UART, I C, etc. Typical Applications Sound Recorders Wearable Audio Players Bluetooth Headsets Smart Phone Accessories © Semiconductor Components Industries, LLC, 2015 December 2015 - Rev. 3 1 Publication Order Number : LC823450/D LC823450 1 Abstract 1-1 Features ® Cortex-M3 Dual Core, AMBA (AHB/APB) system Internal SRAM (1.5M-byte) Internal ROM (256k-byte). Boot code, Standard Functions SDRAM Controller (1 * CS) 64M to 256Mbit SDRAM / Mobile SDRAM External Memory Controller (2 * CS) NOR FLASH, SRAM, ROM supported, 8/16 bit I/F LCD controller supported Internal ROM boot and External memory device boot available DMA Controller (8ch) Interrupt Controller (External 90ch, Internal 82ch) SPI (1ch) Serial Flash I/F (1ch) Quad SPI, cache memory (16k-byte, 4way set associative, 128line) function available 1.8V dedicated power supply UART (3ch) UART1 : w/flow control (CTS, RTS) UART0, UART2 : w/o flow control I2C (2ch) Single Master, Full/Standard GPIO (90 ch) Plain Timer w/ Watch Dog Timer (1ch×3) Multiple Timer (2ch×4) 10bit ADC (6ch) SD Card I/F (3ch) eSD/eMMC, UHS-I, w/o CPRM SD0 : eSD/eMMC boot supported (Internal ROM Boot function) 1.8V dedicated power supply SD1 : Multiplexed w/ Memory Stick I/F 1.8V dedicated power supply SD2 : 1.8V dedicated power supply Memory Stick I/F (1ch) Multiplexed w/ SD1 USB2.0 Host (HS/FS/LS) Controller, Device (HS/FS) Controller. Integrated PHY Xtal (XT1) is required for USB function. 48 MHz for Host, and 12,20,24,48 MHz for device w/o OTG function. Host and Device share an integrated PHY. Real Time Clock 2 modes below are available General RTC mode : RTC w/o key input KeyInt RTC mode : RTC w/ key input which enables power on function SWD (Serial Wire Debug) is supported as the debug interface SWV (Serial Wire Viewer) is supported as the trace interface Only one of Cortex-M3 Dual Core can be traced. www.onsemi.com 2 LC823450 1 Availability of features explained here depends on products. 1 MP3 hard wired encoder/decoder MP3 MPEG1, MPEG2, MPEG2.5 Sampling rate : 8kHz,11.025kHz,12kHz,16kHz, 22.05kHz, 24kHz, 32kHz, 44.1kHz, 48kHz Bit rate :8 Kbps to 320 Kbps (Decoder-VBR supported) LPDSP32 system Internal SRAM (120kbyte) Internal ROM (220kbyte) 2 WMA (Microsoft WMA Decoder Profile Level3) Sampling rate : 8kHz,11.025kHz,16kHz, 22.05kHz, 32kHz, 44.1kHz, 48kHz Bit rate :5 Kbps to 320 Kbps (VBR supported) AAC (MPEG4 LC-AAC) Sampling rate : 8kHz,11.025kHz,12kHz,16kHz, 22.05kHz, 24kHz, 32kHz, 44.1kHz, 48kHz Bit rate : 8Kbps to 320Kbps (VBR supported) Variable Speed Control playback (0.5 to 4.0 times speed) While WMA and AAC playback, up to 2.0 time speed While PCM playback, up to 4.0 times speed While MP3 playback w/ hard wired decoder, up to 4.0 times speed Noise Canceller, etc. JTAG ICE 3 Bluetooth Protocol Stack available Other audio functions available 6band Equalizer (EQ3) Volume, Mute Level Meter Audio Timer w/ interrupt generation 16/24/32bit 192 kHz PCM I/F (2ch×2). Master/slave, I2S SSRC (Synchronous Sampling Rate Converter) 0.25 to 64 conversion capable ASRC (Asynchronous Sampling Rate Converter) jitter reducing function supporting USB audio class and Bluetooth streaming Beep generator Digital Microphone I/F (2ch×1) 16bit Audio DAC (2ch) w/ Class-D Amplifier for Head Phone (2ch). Need external LC LPF Audio clock generation Dedicated PLL for audio(PLL2:1V and PLL3:3V operation integrated) Selectable PLL reference clock XT1 (1 to 50MHz Main xtal) XTRTC (32.768KHz RTC xtal) PCM I/F MCLK0 (/MCLK1), BCK0, BCK1 Power supply Typical voltage LOGIC(Vdd1), XT1(VddXT1), PLL1(AVddPLL1), PLL2(AVddPLL2) = 1.0V PLL3(AVddPLL3) = 3.3V RTC(VddRTC) = 1.0V I/O(Vdd2) = 1.8V or 3.3V SD0(VddSD0) = 1.8V or 3.3V SD1(VddSD1) = 1.8V or 3.3V SD2(VddSD2) = 1.8V or 3.3V S-Flash I/F(VddQSPI) = 1.8V or 3.3V ADC(AVddADC) = 3.3V USB PHY1(AVddUSBPHY1, DVddUSBPHY1) = 1.0V(w/o USB connection) or 1.2V(w/ USB connection) USB PHY2(AVddUSBPHY2) = 2.8V(w/o USB connection) or 3.3V(w/ USB connection) Class-D Amplifier(AVddDAMPL,AVddDAMPR) = 1.2V 1 MPEG Layer-3 audio coding technology licensed from Fraunhofer IIS and Thomson. Supply of this product does not convey license nor imply any right to distribute content created with this product in revenue-generating broadcast systems (terrestrial, satellite, cable and/or other distribution channels), streaming applications (via Internet, intranets and/or networks), other content distribution systems (pay-audio or audio-on-demand applications and the like) or on physical media (compact discs, digital versatile discs, semiconductor chips, hard drives, memory cards and the like). For details, please visit http://mp3licensing.com/ Supply of this product does not convey license under the relevant intellectual property of Thomson and/or Fraunhofer Gesellschaft nor imply any right to use this product in any finished end user or ready-to-use final product. An independent license for such use is required. For details, please visit http://mp3licensing.com/. 2 This product contain technology of Microsoft company ownership, and you cannot distribute or use without getting license from Microsoft Licensing company. 3 The product name for which Bluetooth Protocol Stack is available is determined. Refer to Page 4. Please contact our representative for license fee for the Stack. Copyright 1999-2014 OpenSynergy GmbH All rights reserved. All unpublished rights reserved. www.onsemi.com 3 LC823450 1-2 Device naming rule LC82345 0 T A H B K - 2 H LC82345 (Fixed) Eco code Silicon version “0” to “9” Packing code Thomson MP3 Royalty “K”:Thomson MP3 royalty included in the price Blank:Not included Package Code “T” : TQFP “A”, “B”, : 128L, etc. “X” : WLP “A”, “B”, : 154, etc. “R” : XBGA “A”, “B”, : 240, etc. Bluetooth Protocol Stack “B”:Available and cost included in the price Blank:Not Available 2nd character(AB) means different functions using same type of package. USB2.0 Host Function “H”:Available and cost included in the price Blank:Not Available www.onsemi.com 4 LC823450 1-3 Package Code and Functional Difference The product of Package Code=”RA” is under planning Function Package Cortex-M3 Dual Core SDRAM Controller External Memory Controller SD2 Table of Functinal Difference Package Code TA XA, XC XB, XD TQFP128L WLP154 Single MP3 hard wired encoder 16bit Audio DAC, Class-D AMP PLL2(1V PLL) PLL3(3V PLL) XTALINFO[1:0] input RTCMODE input 8bit I/F (LCD I/F, etc.) Available Dual BCK1/LRCK1 share pins with other function Available Available Available Available Available Available Available Available Available Available Available Only PLL2 Available Available Available Available Available Available Available 61 ch 61 ch Available 61 ch 61 ch Available 90 ch 90 ch Only PLL2 “00” (24 MHz) “1” 45 ch 45 ch Available Available MAX 20MHz (*4) VRH=AVddADC and lower VRL=AVssADC and higher VRH=AVddADC VRL=AVssADC (*3) KEYINT[2:0] input GPIO 8bit I/F (LCD I/F, etc.) Available MAX 5MHz (*2) (General RTC mode) External Interrupt Dual Available 10bit ADC conversion speed 10bit ADC reference voltage PCM1(PCM I/F ch1) Single RA XBGA240 [Note] Pin shared for multiple function. Refer to Terminal Functions for details. (*1) Intentionally not used (*2) VR is open inside (*3) VRH=AVddADC, VRL=AVssADC inside (*4) Decoupling capacitor is required. MAX 5MHz in case of open www.onsemi.com 5 LC823450 1-4 Block Diagram 1-4-1 Top 1MHz~ 50MHz 32.768kHz JTAG ICE SWD/SWV ICE XT1 ARM CortexM3 ARM CortexM3 XTRTC DMAC (8ch) LPDSP32 Multilayer Bus EXT4 SDRAM CTRL S-Flash I/F (1ch) ISOLATED-G Cache (16 Kbyte) BASIC Reset Controller ISOLATED-E External Memory Controller USB2.0 SRAM ROM (120k byte) (220k byte) ISOLATED-D APB Bridge PHY XT1 Plain Timer (1ch×3) Main Module Manager SRAM (512k byte) SRAM (512k byte) ISOLATED-B ISOLATED-C ISOLATED-I BUF (4.5 Kbyte) SRAM (512k byte) USB2.0 Host USB2.0 Device ROM (256k byte) 10bit ADC (6ch) Multiple Timer (2ch×4) PORT0~4 (80 I/O) PORT5 (10 I/O) UART (3ch) I2C (2ch) SPI (1ch) RTC EXT1 ISOLATED-H BUF (512/512 byte×3) SD I/F (3ch) OSC System PLL MS I/F MS PB XT1 RC XTRTC EXT3 Audio Buffer (64 Kbyte) XTRTC ISOLATED OSC ATM Audio PLL BEEP VOLUME MP3 Decoder PCM I/F PCM I/F Digital Mic 16bit Audio DAC MP3 Encode r EQ3 METER MUTE BCK0/1 MCLK0/1 (PCM I/F) XT1 XTRTC AHB CLK (HCLK) SSRC ASRC ISOLATED-A Class-D AMP www.onsemi.com 6 ISOLATED-F EXT2 not used not used intentionally intentionally LC823450 1-4-2 Bus Matrix USB2.0 Host DMAC (8ch) LPDSP32 OHCI EHCI PM DMB DMA System ROM LPDSP32 ROM SRAM (Seg 0) . . . DMIO D-Bus System-Bus I-Bus System-Bus D-Bus ARM Cortex-M3 I-Bus ARM Cortex-M3 SRAM (Seg 8) SRAM (Seg 9) BASIC Peripheral EXT1 Peripheral EXT3 Peripheral EXT4 Peripheral APB Peripheral www.onsemi.com 7 LC823450 1-4-3 Audio 64KB SRAM divided into A ~ N Audio Buffers by register settings Internal Bus A buffer 8 MP3 Encoder RAM B buffer BIT1-0, MONO Dredirect Eredirect Jredirect Lredirect RAM 16 Bit conv Bit conv Gredirect Nredirect 24 0 BIT1-0, MONO C buffer D E C S E L Eredirect Jredirect Lredirect 16 8 RAM Nredirect MP3 Decoder Bit conv Bit conv Gredirect 1 24 METER (DEC) MUTE (DEC) 32 D buffer 32Bit conv 24 VOLUME (DEC) Bit conv RAM SSRC 24 BIT1-0, MONO 32 E buffer 32 32 RAM Bit conv VOLUME (SP0) EQ3 BIT1-0, MONO F buffer BIT1-0, MONO S I N S E L 0 1 SINGEN P C M S E L 1 32 0 PCMSP 0 PCM input DIN0 (PCM input) PCM PS0 PCM output DOUT0 (PCM output) 32 Jredirect Lredirect RAM 32 Bit conv Bit conv Gredirect DMCKO0 DMDIN0 DMCKO1 DMDIN1 METER (SP0) Dredirect Eredirect S E L Digtal Mic DWNMIX (PS0) EQ3 VOLUME (PS0) MUTE (PS0) BEEP 24 16bit Audio DAC Class-D AMP LOUT ROUT Nredirect METER (SP1) G buffer AudioTimer0 32 RAM MCLK0/ BCK0/ LRCK0 METER (PS0) LRCK0 VOLUME (SP1) Bit conv BIT1-0, MONO 32 BIT1-0, MONO H buffer PCM SP1 PCM input DIN1 (PCM input) PCM PS1 PCM output DOUT1 (PCM output) Dredirect Bit conv Jredirect Lredirect 32 Bit conv Eredirect Gredirect DWNMIX (PS1) VOLUME (PS1) 32 RAM Nredirect MCLK1/ BCK1/ LRCK1 METER (PS1) BIT1-0, MONO I buffer AudioTimer1 Dredirect Eredirect Lredirect Nredirect RAM 24 Bit conv Bit conv Gredirect ASRC J buffer 32Bit conv RAM 24 Bit conv BIT1-0, MONO K buffer BIT1-0, MONO Dredirect Eredirect Bit conv Gredirect Jredirect Nredirect L buffer RAM RAM CBIT1-0, CMONO Bit conv 32Bit conv BIT1-0, MONO 32 BIT1-0, MONO M buffer Dredirect Eredirect Bit conv Gredirect Jredirect Lredirect CBIT1-0, CMONO N buffer RAM RAM Bit conv 32Bit conv BIT1-0, MONO www.onsemi.com 8 LRCK1 LC823450 2 Terminal Functions TA : Package Code=”TA” XA : Package Code=”XA” XB : Package Code=”XB” XC : Package Code=”XC” XD : Package Code=”XD” (A) JTAG/SWD Terminal name Polarity Direction Function − O JTAG test data output Pos Neg − I I B SD I/F Ch1 write protect Memory Stick INS GPIO EXTINT21 − I TDI − SDCD1 SWO Neg Multiplexed function IO POWER Available(○) XA, XB, TA XC XD ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ External Interrupt 2-bit1 ○ ○ ○ I JTAG test data input ○ ○ ○ − I O SD I/F Ch1 detect serial wire view data ○ ○ ○ ○ ○ ○ GPIO20 − B GPIO ○ ○ ○ EXTINT20 − I External Interrupt 2-bit0 ○ ○ ○ TMS − I JTAG test data select ○ ○ ○ Pos I SD I/F Ch2 write protect ○ (*) ○ ○ ○ ○ TDO SDWP1 INS GPIO21 SDWP2 VddSD1 VddSD1 VddSD2 GPIO28 − B GPIO EXTINT28 − I External Interrupt 2-bit8 ○ ○ ○ TCK Pos I JTAG test clock ○ ○ ○ SDCD2 Neg I SD I/F Ch2 detect ○ (*) ○ VddSD2 GPIO29 − B GPIO ○ ○ ○ EXTINT29 − I External Interrupt 2-bit9 ○ ○ ○ SWDCLK DMCKO1 GPIO58 EXTINT58 Pos − − − I O B I Serial wire clock Digital MicCh1Clock Output GPIO External Interrupt 5-bit8 ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ SWDIO − DMDIN1 − GPIO59 − EXTINT59 − Sum (*) This function is not available B I B I Serial wire Data Digital MicCh1 Data Input GPIO External Interrupt 5-bit9 ○ ○ ○ ○ 6 ○ ○ ○ ○ 6 ○ ○ ○ ○ 6 www.onsemi.com 9 Vdd2 Vdd2 LC823450 (B) RTC Terminal name Polarity Direction Pos I O 32.768kHz XTAL Input (XTRTC) 32.768kHz XTAL Output (XTRTC) VddRTC VddRTC Available(○) XA, XB, TA XC XD ○ ○ ○ ○ ○ ○ I RTC power detect Input RTC Interrupt Output (Normal:Hiz, Interrupt enabled:Low Output ) RTC backup mode input RTC KEY input can be used when KeyInt RTC mode RTC mode input(*1) Set General RTC or KeyInt RTC mode RTCMODE = “0” : KeyInt RTC mode “1” : General RTC mode Bonding internally for “TA” product VddRTC ○ ○ ○ VddRTC ○ ○ ○ VddRTC ○ ○ ○ VddRTC ○ ○ VddRTC ○ ○ Function Multiplexed function XIN32K XOUT32K VDET − Neg RTCINT Neg O BACKUPB Neg I KEYINT[2:0] − I RTCMODE − I VddRTC − P RTC power supply VssRTC P RTC ground − Sum (*1) Set according to the General RTC mode or KeyInt RTC mode. Bonding internally for “TA” product as described on Page 5 www.onsemi.com 10 IO POWER − ○ ○ ○ − ○ 7 ○ 11 ○ 11 LC823450 (C) External Interrupt/GPIO Terminal name Polarity Direction Function Multiplexed function IO POWER TA Available(○) XA, XB, XC XD SDRADDR12 GPIO2A EXTINT2A − − − O B I SDRAM address GPIO External Interrupt 2-bit10 Vdd2 SCL1 GPIO2B EXTINT2B − − − O B I I2C ch1 Clock (open drain output ) GPIO External Interrupt 2-bit11 Vdd2 ○ ○ ○ ○ ○ ○ ○ ○ ○ SDA1 GPIO2C EXTINT2C − − − B B I I2C ch1 Data (open drain output ) GPIO External Interrupt 2-bit12 Vdd2 ○ ○ ○ ○ ○ ○ ○ ○ ○ SDRADDR11 DMCKO0 GPIO2D EXTINT2D − − − − O O B I SDRAM address Digital Mic Clock Ch0 Output GPIO External Interrupt 2-bit13 Vdd2 ○ ○ ○ ○ ○ ○ ○ ○ ○ EXTINT2E − I ○ ○ ○ GPIO2E − B External Interrupt 2-bit14 GPIO * While Internal ROM boot, this terminal is used as external power circuit enable signal. ○ ○ ○ EXTINT2F − I ○ ○ ○ GPIO2F − B ○ ○ ○ 5 5 5 External Interrupt 2-bit15 GPIO * While Internal ROM boot, this terminal is used as boot monitor signal. Sum www.onsemi.com 11 Vdd2 Vdd2 LC823450 (D) SPI(Serial I/F Ch0)/S-Flash I/F(Serial I/F Ch1) Terminal name Polarity Direction Function Multiplexed function IO POWER SCK0 GPIO1D EXTINT1D Neg − − B B I Serial I/F Ch0 Clock GPIO External Interrupt 1-bit13 Vdd2 SDI0 GPIO1E EXTINT1E − − − I B I Serial I/F Ch0 Data Input GPIO External Interrupt 1-bit14 Vdd2 SDO0 GPIO1F − − O B Serial I/F Ch0 Data Output GPIO EXTINT1F − I Neg GPIO0D Available(○) XA, XB, TA XC XD ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ External Interrupt 1-bit15 ○ ○ ○ O Serial I/F Ch1 Clock (QSPI Clock) ○ ○ ○ − B GPIO ○ ○ ○ EXTINT0D − I External Interrupt 0-bit13 ○ ○ ○ SDI1(QIO0) − O(B) ○ ○ ○ GPIO0E − B Serial I/F Ch1 Data Output (QSPI Data 0) GPIO ○ ○ ○ EXTINT0E − I External Interrupt 0-bit14 ○ ○ ○ SDO1(QIO1) − I(B) ○ ○ ○ GPIO0F − B Serial I/F Ch1 Data Input (QSPI Data 1) GPIO ○ ○ ○ EXTINT0F − I External Interrupt 0-bit15 ○ ○ ○ Neg O(B) Serial I/F Ch1 write protect (QSPI Data 2) ○ ○ ○ GPIO11 − B GPIO ○ ○ ○ EXTINT11 − I External Interrupt 1-bit1 ○ ○ ○ Neg O(B) Serial I/F Ch1 hold (QSPI Data 3) ○ ○ ○ GPIO12 − B GPIO ○ ○ ○ EXTINT12 − I External Interrupt 1-bit2 ○ ○ ○ 8 8 8 SCK1 SWP1(QIO2) SHOLD1(QIO3) Sum www.onsemi.com 12 Vdd2 VddQSPI VddQSPI VddQSPI VddQSPI VddQSPI LC823450 (E) I2C Terminal name Polarity Direction Function Multiplexed function SCL0 GPIO07 EXTINT07 − − − O B I I2C ch0 Clock (open drain output ) GPIO External Interrupt 0-bit7 SDA0 GPIO08 − − B B I2C ch0 Data (open drain output ) GPIO EXTINT08 − I External Interrupt 0-bit8 IO POWER Vdd2 Vdd2 Sum (F) UART Terminal name Polarity Direction Function TXD1 SDAT20 GPIO04 EXTINT04 − − − − O B B I UART Ch1 transmit Data SD I/F Ch2 Data 0 GPIO External Interrupt 0-bit4 RXD1 SDAT21 GPIO05 EXTINT05 − − − − I B B I UART Ch1 receive Data SD I/F Ch2 Data 1 GPIO External Interrupt 0-bit5 CTS1 SDAT22 RXD0 GPIO56 EXTINT56 Neg I B I B I UART Ch1 clear to send SD I/F Ch2 Data 2 UART Ch0 receive Data GPIO External Interrupt 5-bit6 RTS1 SDAT23 TXD0 GPIO57 EXTINT57 Neg − O B O B I UART Ch1 request to send SD I/F Ch2 Data 3 UART Ch0 transmit Data GPIO External Interrupt 5-bit7 − O UART Ch2 transmit Data Multiplexed function − − − − TXD2 − − − TIOCA10 − B GPIO0B EXTINT0B − − B I MTM1 Ch0A - target signal of pulse-length-reader function - output of sentinel-inform-function - output of PWM output GPIO External Interrupt 0-bit11 RXD2 − I UART Ch2 receive Data TIOCA11 − B GPIO0C EXTINT0C − − B I MTM1 Ch1A - target signal of pulse-length-reader function - output of sentinel-inform-function - output of PWM output GPIO External Interrupt 0-bit12 Sum (*)This function is not available www.onsemi.com 13 IO POWER TA ○ ○ ○ Available(○) XA, XB, XC XD ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ 2 2 2 Available(○) XA, XB, TA XC XD VddSD2 ○ ○ ○ ○ ○ (*) ○ ○ ○ ○ ○ ○ VddSD2 ○ ○ ○ ○ ○ (*) ○ ○ ○ ○ ○ ○ VddSD2 ○ ○ ○ ○ ○ ○ (*) ○ ○ ○ ○ ○ ○ ○ ○ VddSD2 ○ ○ ○ ○ ○ ○ (*) ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ 6 6 6 VddQSPI VddQSPI LC823450 (G) Timer Terminal name Polarity Direction Function Multiplexed function TIOCA00 − B MTM0 Ch0A - target signal of pulse-length-reader function - output of sentinel-inform-function - output of PWM output SDCLK2 − O SD I/F Ch2 Clock Output PHI0 − O GPIO09 − EXTINT09 − IO POWER Available(○) XA, XB, TA XC XD ○ ○ ○ ○ (*) ○ System Clock Output 0 ○ ○ ○ B GPIO ○ ○ ○ I External Interrupt 0-bit9 ○ ○ ○ ○ ○ ○ ○ (*) ○ VddSD2 TIOCA01 − B MTM0 Ch1A - target signal of pulse-length-reader function - output of sentinel-inform-function - output of PWM output SDCMD2 − B SD I/F Ch2 command line PHI1 − O System Clock Output 1 ○ ○ ○ GPIO0A − B GPIO ○ ○ ○ EXTINT0A − I External Interrupt 0-bit10 ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ TIOCB00 − B DIN1 DMDIN0 GPIO02 EXTINT02 − − − − I I B I TIOCB01 − B DMCKO0 − O Neg O − − B I QSCS GPIO03 EXTINT03 MTM0 Ch0B - target signal of pulse-length-reader function - output of sentinel-inform-function PCM1 Data Input Digital Mic Data Ch0 Input GPIO External Interrupt 0-bit2 MTM0 Ch1B - target signal of pulse-length-reader function - output of sentinel-inform-function Digital Mic Clock Ch0 Output Serial I/FCh1 QSPI chip select * While Serial Flash Boot, this is used as chip select of Serial Flash GPIO External Interrupt 0-bit3 VddSD2 Vdd2 VddQSPI TCLKA0 − I MTM0 external Clock A ○ ○ ○ BCK1 GPIO00 EXTINT00 − − − B B I PCM1 bit Clock GPIO External Interrupt 0-bit0 ○ ○ ○ ○ ○ ○ ○ ○ ○ TCLKB0 − I MTM0 external Clock B ○ ○ ○ LRCK1 GPIO01 EXTINT01 − − − B B I PCM1 LR Clock GPIO External Interrupt 0-bit1 ○ ○ ○ ○ ○ ○ ○ ○ ○ 6 6 6 Sum (*)This function is not available www.onsemi.com 14 Vdd2 Vdd2 LC823450 (H) PCM I/F Terminal name Polarity Direction Function Pos Pos B B PCM0 maser Clock PCM1 master Clock GPIO18 EXTINT18 − − B I GPIO External Interrupt 1-bit8 BCK0 DMCKO1 GPIO19 − − − B O B PCM0 bit Clock Digital Mic Ch1 Clock Output GPIO EXTINT19 − I LRCK0 DMDIN1 GPIO1A EXTINT1A − − − − DIN0 DMDIN0 GPIO1B EXTINT1B Multiplexed function MCLK0 MCLK1 IO POWER Vdd2 Available(○) XA, XB, TA XC XD ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ External Interrupt 1-bit9 ○ ○ ○ B I B I PCM0 LR Clock Digital Mic Ch1 Data Input GPIO External Interrupt 1-bit10 Vdd2 ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ − − − − I I B I PCM0 Data Input Digital Mic Ch0 Data Input GPIO External Interrupt 1-bit11 Vdd2 ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ DOUT0 DMCKO0 GPIO1C EXTINT1C − − − − O O B I PCM0 Data Output Digital Mic Ch0 Clock Output GPIO External Interrupt 1-bit12 Vdd2 ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ BCK1 GPIO13 EXTINT13 − − − B B I PCM1 bit Clock GPIO External Interrupt 1-bit3 Vdd2 ○ ○ ○ ○ ○ ○ LRCK1 GPIO14 EXTINT14 − − − B B I PCM1 LR Clock GPIO External Interrupt 1-bit4 Vdd2 ○ ○ ○ ○ ○ ○ DOUT1 GPIO15 EXTINT15 − − − O B I PCM1 Data Output GPIO External Interrupt 1-bit5 ○ ○ ○ ○ ○ ○ ○ ○ ○ 6 8 8 Sum www.onsemi.com 15 Vdd2 Vdd2 LC823450 (I) SD IF/MS IF Terminal name Polarity Direction SDCLK0 − O SD I/F Ch0 Clock Output VddSD0 Available(○) XA, XB, TA XC XD ○ ○ ○ SDCMD0 − B SD I/F Ch0 command line VddSD0 ○ ○ ○ SDAT0[3:0] − B SD I/F Ch0 Data VddSD0 ○ ○ ○ SDCLK1 − O SD I/F Ch1 Clock Output ○ ○ ○ SCLK − O Memory Stick Clock Output ○ ○ ○ GPIO22 − B GPIO ○ ○ ○ EXTINT22 − I External Interrupt 2-bit2 ○ ○ ○ SDCMD1 − B SD I/F Ch1 command line ○ ○ ○ BS − O Memory Stick BS ○ ○ ○ ○ ○ ○ Function Multiplexed function IO POWER VddSD1 VddSD1 GPIO23 − B GPIO EXTINT23 − I External Interrupt 2-bit3 ○ ○ ○ SDAT1[3:0] − B SD I/F Ch1 Data ○ ○ ○ DATA[3:0] − B Memory Stick Data ○ ○ ○ GPIO2[7:4] − B GPIO ○ ○ ○ EXTINT2[7:4] − I External Interrupt 2-bit7 to bit4 ○ ○ ○ 12 12 12 VddSD1 Sum (*)This function is not available (J) SDRAM I/F Terminal name Polarity Direction SDRCLK SDRCKE SDRCS SDRWE SDRCAS SDRRAS Neg Pos Neg Neg Neg Neg O O O O O O SDRDQM[1:0] Pos O SDRADDR[10:0] − SDRBA[1:0] − Function Multiplexed function IO POWER SDRAM Clock Output SDRAM Clock enable Output SDRAM chip select Output SDRAM write enable Output SDRAM CAS Output SDRAM RAS Output SDRAM Data mask byte lane select Vdd2 Vdd2 Vdd2 Vdd2 Vdd2 Vdd2 O SDRAM address(*) Vdd2 O SDRAM bank select Vdd2 SDRDATA[15:0] B SDRAM Data − Sum (*) SDRAM address bit is 13bit including SDRADDR [12:11]. www.onsemi.com 16 Available(○) XA, XB, TA XC XD Vdd2 Vdd2 0 0 0 LC823450 (K) External Memory I/F Terminal name Function Direction Neg − O B chip select0 GPIO − I External Interrupt 0-bit6 ○ ○ Neg − O I chip select1 UART Ch0 receive Data ○ ○ ○ ○ − B GPIO ○ ○ Multiplexed function NCS0 GPIO06 EXTINT06 NCS1 RXD0 GPIO10 Available(○) XA, XB, TA XC XD ○ ○ ○ ○ Polarity IO POWER Vdd2 Vdd2 − I External Interrupt 1-bit0 ○ ○ Neg − O B read enable GPIO ○ ○ ○ ○ − I External Interrupt 1-bit7 ○ ○ NWRENWRL GPIO30 EXTINT30 Neg − − O B I write enable, write enable low GPIO External Interrupt 3-bit0 Vdd2 ○ ○ ○ ○ ○ ○ NHBNWRH TXD0 GPIO31 EXTINT31 Neg − − − O O B I high byte select, write enable high UART Ch0 transmit Data GPIO External Interrupt 3-bit1 Vdd2 ○ ○ ○ ○ ○ ○ ○ ○ NLBEXA0 GPIO16 − − O B low byte select, address0 GPIO ○ ○ ○ ○ EXTINT16 − I External Interrupt 1-bit6 ○ ○ EXA[20:15] GPIO4[5:0] EXTINT4[5:0] − − − O B I address GPIO External Interrupt 4-bit5 to bit0 Vdd2 EXA[14:9] GPIO3[F:A] EXTINT3[F:A] − − − O B I address GPIO External Interrupt 3-bit15 to bit10 Vdd2 EXA[8:1] GPIO3[9:2] O B address GPIO EXTINT3[9:2] − − − I External Interrupt 3-bit9 to bit2 EXD[7:0] GPIO4[D:6] EXTINT4[D:6] − − − B B I Data GPIO External Interrupt 4-bit13 to bit6 ○ ○ ○ ○ ○ ○ EXD[15:8] GPIO5[5:0], GPIO4[F:E] EXTINT5[5:0], EXTINT4[F:E] Sum − B Data − B GPIO I External Interrupt 5-bit5 to bit0, External Interrupt 4-bit15 to bit14 14 14 EXTINT10 NRD GPIO17 EXTINT17 − Vdd2 Vdd2 Vdd2 Vdd2 Vdd2 0 www.onsemi.com 17 LC823450 (L) Xtal, PLL Terminal name XIN1 − I XTAL input (XT1) VddXT1 Available(○) XA, XB, TA XC XD ○ ○ ○ XOUT1 − O XTAL output (XT1) VddXT1 ○ ○ ○ − ○ ○ ○ − ○ ○ ○ ○ ○ Polarity Direction Function IO POWER Multiplexed function VddXT1 − P XTAL power supply (XT1) VssXT1 − P XTAL ground (XT1) XTAL frequency input (*1) XTALINFO[1:0] = “00” : 24MHz “01” : 12MHz “10” : 20MHz “11” : 48MHz Used for determining clock frequency setting while internal ROM boot. Bonding internally for “TA” product XTALINFO[1:0] − B VCNT1 − O AVddPLL1 − P AVssPLL1 − VCNT2 Vdd2 AVddPLL1 ○ ○ ○ − ○ ○ ○ P PLL1 VCO control PLL1 analog power supply PLL1 analog ground − ○ ○ − O PLL2 VCO control AVddPLL2 ○ ○ AVddPLL2 − P PLL2 analog power supply ○ ○ VCNT3 − O PLL3 VCO control ○ ○ AVddPLL3 − P ○ ○ (*2) ○ (*2) ○ (*3) ○ (*3) ○ ○ AVssPLL2 − P ○ ○ ○ Sum 10 14 (*1) Set according to the frequency of XT1(12/20/24/48MHz). Bonding internally for “TA” product as described on Page 5. (*2),(*3) Audio clock is generated by one of PLL2(1V) or PLL3(3V). One of PLL2 or PLL3 is available for “TA” and “RA” product. Please refer to Page 5 for more information. Both of PLL2 and PLL3 are available for “XA”, “XB”, “XC” and “XD” products. (*4) Analog ground is shared by PLL2 and PLL3. 14 PLL3 analog power supply PLL2/3 analog ground(*4) www.onsemi.com 18 − AVddPLL3 − − LC823450 (M) USB-PHY Terminal name Polarity Direction Function IO POWER Multiplexed function USBDP − B USB D+ USBDM − B USB D− USBEXT12 − O AVddUSBPHY1 − P DVddUSBPHY1 − P AVddUSBPHY2 − P AVssUSBPHY − P Polarity Direction USB-PHY reference resister USB-PHY 1.0V analog power supply USB-PHY 1.0V digital power supply. Connected to AVddUSBPHY1 internally in case of no DVddUSBPHY1 port available USB-PHY 3.3V analog power supply USB-PHY analog ground AVddUSBPHY2 or AVddUSBPHY1 AVddUSBPHY2 or AVddUSBPHY1 AVddUSBPHY2 − − − Function IO POWER Multiplexed function ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ 2 ○ 2 ○ 2 ○ 2 ○ 4 11 ○ 2 ○ 4 11 ○ 2 ○ 4 11 − Sum (N) 10bit ADC Terminal name Available(○) XA, XB, TA XC XD Available(○) XA, XB, TA XC XD ○ ○ ○ AN[5:0] − I ADC Input AVddADC VRH − I ADC High reference AVddADC VRL − I ADC Low reference AVddADC VR − O ADC reference voltage AVddADC AVddADC − P ADC analog power − ○ ○ ○ AVssADC − P ADC analog ground − ○ ○ ○ 8 8 8 Sum www.onsemi.com 19 LC823450 (O) Class-D AMP Terminal name Polarity Direction LOUT GPLOUT − − O O Lch Class D AMP Output General purpose Output (GPO) AVddDA MPL Available(○) XA, XB, TA XC XD ○ ○ ○ ○ ○ ROUT GPROUT − − O O AVddDA MPR ○ ○ AVddDAMPL − P − ○ AVddDAMPR − P Rch Class D AMP Output General purpose Output (GPO) Lch Class D AMP analog power supply Rch Class D AMP analog power supply − ○ AVssDAMPL − P Lch Class D AMP analog ground − ○ ○ ○ AVssDAMPR − P Rch Class D AMP analog ground − ○ ○ ○ 6 6 6 Function Multiplexed function IO POWER Sum ○ ○ ○ ○ ○ ○ ○ (P) Other, Power Terminal name Polarity Direction Function IO POWER Available(○) Vdd2 ○ XA, XC ○ Vdd2 ○ ○ ○ Vdd2 − ○ ○ 7 ○ 8 ○ ○ 7 ○ 8 ○ ○ 7 ○ 8 Digital IO power(SDI/F Ch0) − ○ ○ ○ P Digital IO power (SD(MS)I/F Ch1) − ○ ○ ○ P Digital IO power (SDI/F Ch2) − ○ ○ ○ − P Digital IO power (QSPI) − P Digital ground − ○14 Sum ○ ○ 14 37 ○ − ○ ○ 12 35 All sum 128 154 154 Multiplexed function TA − B TEST Pos I NRES Neg I Boot mode select test mode(normally connect to ground) LSI reset Input Vdd1 − P Digital core power − Vdd2 − P Digital IO power VddSD0 − P VddSD1 − VddSD2 − VddQSPI Vss BMODE[1:0] XB, XD ○ 37 Note : Unused Input terminals and input state terminals of bidirectional should be set Pull-up/Down resister ON or connect to digital power supply or ground (don’t left open). www.onsemi.com 20 LC823450 2-1 Boot mode Boot modes available depend on BMODE[1:0] port status IPL mode Physical Boot USB BMODE1 BMODE0 PD 470kΩ PD 470kΩ explanation Internal ROM boot(eMMC Physical Boot with USB download –SD card I/F Ch0 + USB Device + EXTINT2E + EXTINT2F) By using Boot operation mode of eMMC, load IPL2(program) from eMMC connected to SD0 to internal SRAM and jump to IPL2. IPL2 is written through USB. Physical Boot SD PD 470kΩ PU 470kΩ Internal ROM boot(eMMC Physical Boot with SD Ch1 download –SD card I/F Ch0 + SD card I/F Ch1 + EXTINT2E + EXTINT2F) By using Boot operation mode of eMMC, load IPL2(program) from eMMC connected to SD0 to internal SRAM and jump to IPL2. IPL2 is written through SD1. User Area Boot USB PD 1kΩ PU or PD 470kΩ Internal ROM boot(User Area Boot with USB download –SD card I/F Ch0 + USB Device + EXTINT2E + EXTINT2F) Load IPL2(program) from user area of eMMC connected to SD0 to internal SRAM and jump to IPL2. IPL2 is written through USB. User Area Boot SD PU 470kΩ PD 1kΩ Internal ROM boot(User Area Boot with SD Ch1 download –SD card I/F Ch0 + SD card I/F Ch1 + EXTINT2E + EXTINT2F) Load IPL2(program) from user area of eMMC connected to SD0 to internal SRAM and jump to IPL2. IPL2 is written through SD1. SPI Boot USB PU 470kΩ PU 470kΩ Internal ROM boot(external Serial Flash SPI Boot with USB download –S-Flash I/F + USB Device + EXTINT2E + EXTINT2F + TIOCB01) Load IPL2(program) from Serial Flash connected to S-Flash I/F to internal SRAM and jump to IPL2. IPL2 is written through USB. SPI Boot SD PD 470kΩ PU 1kΩ Internal ROM boot(external Serial Flash SPI Boot with SD Ch1 download –S-Flash I/F + SD card I/F Ch1 + EXTINT2E + EXTINT2F + TIOCB01) Load IPL2(program) from Serial Flash connected to S-Flash I/F to internal SRAM and jump to IPL2. IPL2 is written through SD1. QSPI Boot USB PU 1kΩ PU 470kΩ Internal ROM boot(external Serial Flash QSPI Boot with USB download –S-Flash I/F(QSPI) + USB Device + EXTINT2E + EXTINT2F + TIOCB01) Fetch IPL2(program) from Serial Flash connected to S-Flash I/F. IPL2 is written by using DO command directly through USB. QSPI Boot SD PU 1kΩ PD 470kΩ Internal ROM boot(external Serial Flash QSPI Boot with SD Ch1 download –S-Flash I/F(QSPI) + SD card I/F Ch1 + EXTINT2E + EXTINT2F + TIOCB01) Fetch IPL2(program) from Serial Flash connected to S-Flash I/F. IPL2 is written through SD1. User Area Delete PD 1kΩ PU 1kΩ Internal ROM boot(User Area IPL2 delete –SD card I/F Ch0 + EXTINT2E + EXTINT2F) www.onsemi.com 21 LC823450 After deleting IPL2 by using this mode, IPL2 can be written again while User Area Boot mode. Partition Delete PD 470kΩ PD 1kΩ Internal ROM boot(Partition Area IPL2 delete –SD card I/F Ch0 + EXTINT2E + EXTINT2F) After deleting IPL2 by using this mode, IPL2 can be written again while eMMC Physical Boot mode. SPI All Erase PU 470kΩ PU 1kΩ Internal ROM boot(external Serial Flash SPI all area delete –S-Flash I/F + EXTINT2E + EXTINT2F + TIOCB01) Delete all content of Serial Flash. This mode should be used in case of SPI mode operation of Serial Flash SDCH0 All Erase PD 1kΩ PD 1kΩ Internal ROM boot(all area delete –SD card I/F Ch0 + EXTINT2E + EXTINT2F) Delete all content of eMMC including Partition area. Take a lot of time to delete. Trim also processed in case of eMMC supporting Trim function. QSPI All Erase PU 1kΩ PD 1kΩ Internal ROM boot(external Serial Flash QSPI all area delete –S-Flash I/F(QSPI) + EXTINT2E + EXTINT2F + TIOCB01) Delete all content of Serial Flash. This mode should be used in case of QSPI fetch mode operation of Serial Flash External ROM Boot PU 470kΩ PD 470kΩ External memory boot(External-0) Fetch from external memory(External0) connected to XMC(external memory controller) Hi-z PU 1kΩ PU 1kΩ External I/F ports below forced to Hiz - EXA[20:1],EXD[15:0],NCS[1:0],NRD,NWRENWRL,NHBNWRH,NLBEXA0 - SDCLK0,SDCMD0,SDAT0[3:0] - CK1,SDI1(QIO0),SDO1(QIO1),SWP1(QIO2),SHOLD1(QIO3),TIOCB01 In case of TQFP128L, WLP154, don’t use external memory boot (External-0) www.onsemi.com 22 LC823450 2-2 Boot port Some ports are used in internal ROM code while booting as below. EXTINT2E(GPIO2E) : OUT for power supply control EXTINT2F(GPIO2F) : OUT for indicating status of boot, start of USB connection and USB disconnection, error status by Low/High of this port. Use SDCMD1, SDAT1[3:0], SDCLK1 as SD1. SDCD1 and SDWP1 are not used. Port function switch is processed during write from SD1. SPI Boot/SPI All Erase is processed by using 4 ports SCK1, QSCS, SDO1,SDI1. SHOLD1 and SWP1 are not used. QSPI Boot/QSPI All Erase is processed by using SCK1, QSCS, SDO1, SDI1, SHOLD1, SWP1. External ROM Boot is processed by using NCS0 and external memory controller ports. GPIO2E is not used. In case of External I/F ports Hiz mode, external memory interface ports such as NCS0, NCS1 and external memory controller ports is used. GPIO2E is used as input port. Ports used during IPL IPL mode Ports used(*) Physical Boot USB P2E(power supply control), P2F(status monitoring) Physical Boot SD P2E(power supply control), P2F(status monitoring) P22(SDCLK1) P23(SDCMD1) P24(SDDATA10) P25(SDDATA11) P26(SDDATA12) P27(SDDATA13) User Area Boot USB P2E(power supply control), P2F(status monitoring) User Area Boot SD P2E(power supply control), P2F(status monitoring) P22(SDCLK1) P23(SDCMD1) P24(SDDATA10) P25(SDDATA11) P26(SDDATA12) P27(SDDATA13) SPI Boot USB P2E(power supply control), P2F(status monitoring) P0D(SCK1) P03(QSCS) P0F(SDO1) P0E(SDI1) SPI Boot SD P2E(power supply control), P2F(status monitoring) P0D(SCK1) P03(QSCS) P0F(SDO1) P0E(SDI1) P22(SDCLK1) P23(SDCMD1) P24(SDDATA10) P25(SDDATA11) P26(SDDATA12) P27(SDDATA13) QSPI Boot USB P2E(power supply control), P2F(status monitoring) P0D(SCK1) P03(QSCS) P0F(SDO1) P0E(SDI1) P11(SWP1) P12(SHOLD1) QSPI Boot SD P2E(power supply control), P2F(status monitoring) P0D(SCK1) P03(QSCS) P0F(SDO1) P0E(SDI1) P011(SWP1) P12(SHOLD1) P22(SDCLK1) P23(SDCMD1) P24(SDDATA10) P25(SDDATA11) P26(SDDATA12) P27(SDDATA13) User Area Delete P2E(power supply control), P2F(status monitoring) Partition Delete P2E(power supply control), P2F(status monitoring) SPI Erase P2E(power supply control), P2F(status monitoring) P0D(SCK1) P03(QSCS) P0F(SPIOUT) P0E(SDI1) SDCH0 All Erase P2E(power supply control), P2F(status monitoring) QSPI All Erase P2E(power supply control), P2F(status monitoring) P0D(SCK1) P03(QSCS) P0F(SDO1) P0E(SDI1) P11(SWP1) P12(SHOLD1) External ROM Boot P06(NCS0) P17(NRD) P30(NWRENWRL) P31(NHBNWRH) P16(NLBEXA0) P32(EXA01) P33(EXA02) P34(EXA03) P35(EXA06) P36(EXA05) P37(EXA06) P38(EXA07) P39(EXA08) P3A(EXA09) P3B(EXA10) P3C(EXA11) P3D(EXA12) P3E(EXA13) P3F(EXA14) P40(EXA15) P41(EXA16) P42(EXA17) P43(EXA18) P44(EXA19) P45(EXA20) P46(EXD00) P47(EXD01) P48(EXD02) P49(EXD03) P4A(EXD04) P4B(EXD05) P4C(EXD06) P4D(EXD07) P4E(EXD08) P4F(EXD09) P50(EXD10) P51(EXD11) P52(EXD12) P53(EXD13) P54(EXD14) P55(EXD15) HI-z SDCLK0 Hi-z state (*) In this table, ”Pxx” means ”GPIOxx”. For example ”P2E” means ”GPIO2E”. www.onsemi.com 23 LC823450 2-3 SDIF PullUp In case of boot mode using SDIF port, internal PullUp resistor is used (SDCMD0, SDAT0[3:0] / SDCMD1, SDAT1[3:0]). So, external PullUp resistor is not required on board. 2-4 QSCS PullUp In case of boot mode using QSCS, PullUp of GPIO03(QSCS) is active by the hard reset. After GPIO2E is set to high, GPIO03 set to QSCS and PullUp set to inactive. In case of Hi-z boot, PullUp is forced to inactive 2-5 GPIO2F During boot, GPIO2F is used as GPIO and indicates boot status and error occurrence by output of Low/High. When errors occur during boot sequences, for example writing of IPL2, GPIO2F reports the sort of error. GPIO0F can indicate the status of USB connection and the completion of USB file transfer. And Delete Mode, completion of Erase, and status of Erase can be reported by sequence of Low/High. For more detail about the behavior of ports used during boot, refer to the document LC823450 Series IPL specification. www.onsemi.com 24 LC823450 3 Pin Assignment 3-1 Pin Assignment I/O I O B P NC Input Type Input Output Bidirectional power Non Connect Drive (example) 3.3V 4mA Output 3.3V with 4/8mA 4mA, 8mA output drivability switch 1.0V 0.3mA 0.3mAopen drain OD Output 4mA XBGA240 TQFP128L Output Type CMOS CMOS Input 3-State Tristate Output schmitt X 3A 1A schmitt Input Xtal 3.3V analog 1.0Vanalog OD X 3A 1A open drain Output Xtal 3.3V analog 1.0/1.2Vanalog PU PU/PD pull-up resister IO Circuit Type Refer to Page 34 for circuit diagram PD pull-down resister PU/PD pull-up, pull-down resister WLP154 I/O Input Type Output Type Drive PU/PD IO Pwr Grp IO Circuit Type SDRDATA2 B CMOS 3-State 2/4/8mA PD Vdd2 3ICD/3T2(4)(8) M11 Vss G N12 Vdd2 P H8 TCLKA0/ BCK1/ GPIO00/ EXTINT00 I/ B/ B/ I schmitt 3-State 1/2/4mA PU/PD Vdd2 3ISUD/3T1(2)(4) SDRDATA3 B CMOS 3-State 2/4/8mA PD Vdd2 3ICD/3T2(4)(8) L10 TCLKB0/ LRCK1/ GPIO01/ EXTINT01 I/ B/ B/ I schmitt 3-State 1/2/4mA PU/PD Vdd2 3ISUD/3T1(2)(4) 5 K9 NHBNWRH/ TXD0/ GPIO31/ EXTINT31 O/ O/ B/ I schmitt 3-State 2/4/8mA PD Vdd2 3ISD/3T2(4)(8) - 6 N11 NCS1/ RXD0/ GPIO10/ EXTINT10 O/ I/ B/ I schmitt 3-State 2/4/8mA PU Vdd2 3ISU/3T2(4)(8) - - SDRDATA4 B CMOS 3-State 2/4/8mA PD Vdd2 3ICD/3T2(4)(8) NCS0/ GPIO06/ EXTINT06 O/ B/ I schmitt 3-State 2/4/8mA PU Vdd2 3ISU/3T2(4)(8) B/ I/ O schmitt 3-State 2/4/8mA PU/PD Vdd2 3ISUD/3T2(4)(8) PD Vdd2 3ISD/3T2(4)(8) PIN NAME No. Ball No. No 1 R16 - - 2 N14 1 1 3 P15 2 2 4 P16 3 3 5 N15 - - 6 N16 4 4 7 M16 - 8 M15 9 M14 Ball 10 M13 - 7 M10 11 L16 - - GPIO2A/ EXTINT2A/ SDRADDR12 12 L15 - - Vdd2 P 13 L14 - - Vss G 14 L13 5 8 L9 N10 Vdd1 P NRD/ GPIO17/ EXTINT17 O/ B/ I schmitt 3-State 2/4/8mA 15 L12 - 9 16 K16 - - SDRADDR5 O - 3-State 2/4/8mA Vdd2 3T2(4)(8) 17 K15 - - SDRADDR6 O - 3-State 2/4/8mA Vdd2 3T2(4)(8) 18 K14 - 10 NWRENWRL/ GPIO30/ EXTINT30 O/ B/ I schmitt 3-State 2/4/8mA Vdd2 3ISD/3T2(4)(8) M9 www.onsemi.com 25 PD LC823450 EXD0/ GPIO46/ EXTINT46 B/ B/ I schmitt 3-State 2/4/8mA - SDRADDR7 O - 3-State 2/4/8mA - - SDRDATA5 B CMOS 3-State 2/4/8mA - - SDRDATA6 B CMOS 3-State 2/4/8mA J13 - - Vdd2 P H10 - - Vss G J12 - - SDRDATA7 B CMOS 3-State J11 - - SDRDATA8 B CMOS 3-State H11 - - SDRDATA9 B CMOS 12 J8 SCK1/ GPIO0D/ EXTINT0D O/ B/ I 19 K13 - 11 20 K12 - 21 H13 22 J14 23 24 25 26 27 28 H16 6 N9 PD Vdd2 3ISD/3T2(4)(8) Vdd2 3T2(4)(8) PD Vdd2 3ICD/3T2(4)(8) PD Vdd2 3ICD/3T2(4)(8) 2/4/8mA PD Vdd2 3ICD/3T2(4)(8) 2/4/8mA PD Vdd2 3ICD/3T2(4)(8) 3-State 2/4/8mA PD Vdd2 3ICD/3T2(4)(8) schmitt 3-State 6/8/10mA PU/PD VddQSPI 3ISUD/3T6(8)(10) B/ O/ O/ B/ I schmitt 3-State 6/8/10mA PU/PD VddQSPI 3ISUD/3T6(8)(10) I(B)/ B/ I schmitt 3-State 6/8/10mA PU/PD VddQSPI 3ISUD/3T6(8)(10) schmitt 3-State 6/8/10mA PU/PD VddQSPI 3ISUD/3T6(8)(10) 29 H14 7 13 N8 TIOCB01/ DMCKO0/ QSCS/ GPIO03/ EXTINT03 30 J16 8 14 M8 SDO1(QIO1)/ GPIO0F/ EXTINT0F 31 G14 9 15 L8 VddQSPI 32 H15 10 16 K8 SDI1(QIO0)/ GPIO0E/ EXTINT0E 33 J15 11 17 N7 Vss 34 G16 12 18 M7 SWP1(QIO2)/ GPIO11/ EXTINT11 O(B)/ B/ I schmitt 3-State 6/8/10mA PU/PD VddQSPI 3ISUD/3T6(8)(10) 35 G15 13 19 L7 SHOLD1(QIO3)/ GPIO12/ EXTINT12 O(B)/ B/ I schmitt 3-State 6/8/10mA PU/PD VddQSPI 3ISUD/3T6(8)(10) 36 H12 14 20 K7 TXD2/ TIOCA10/ GPIO0B/ EXTINT0B O/ B/ B/ I schmitt 3-State 1/2/4mA PU/PD VddQSPI 3ISUD/3T1(2)(4) 37 G13 15 21 J7 RXD2/ TIOCA11/ GPIO0C/ EXTINT0C I/ B/ B/ I schmitt 3-State 1/2/4mA PU/PD VddQSPI 3ISUD/3T1(2)(4) N6 TDI/ SDCD1/ SWO/ GPIO20/ EXTINT20 I/ I/ O/ B/ I schmitt 3-State 2mA PU/PD VddSD1 3ISUD/3T2 O/ I/ I/ B/ I schmitt 3-State 2mA PU/PD VddSD1 3ISUD/3T2 38 G12 16 22 P O(B)/ B/ I G 39 G11 17 23 M6 TDO/ SDWP1/ INS/ GPIO21/ EXTINT21 40 F16 18 24 L6 SDCMD1/ BS/ GPIO23/ EXTINT23 B/ O/ B/ I CMOS 3-State 6/8/10mA PU/PD VddSD1 3ICUD/3T6(8)(10) 41 F15 19 25 K6 SDAT10/ DATA0/ GPIO24/ EXTINT24 B/ B/ B/ I CMOS 3-State 6/8/10mA PU/PD VddSD1 3ICUD/3T6(8)(10) 42 F14 20 26 N5 VddSD1 P www.onsemi.com 26 LC823450 SDAT11/ DATA1/ GPIO25/ EXTINT25 B/ B/ B/ I 43 E14 21 27 M5 CMOS 3-State 6/8/10mA PU/PD VddSD1 3ICUD/3T6(8)(10) 44 F13 22 28 L5 Vss B/ B/ B/ I G CMOS 3-State 6/8/10mA PU/PD VddSD1 3ICUD/3T6(8)(10) 45 E16 23 29 J6 SDAT12/ DATA2/ GPIO26/ EXTINT26 46 E15 24 30 N4 SDAT13/ DATA3/ GPIO27/ EXTINT27 B/ B/ B/ I CMOS 3-State 6/8/10mA PU/PD VddSD1 3ICUD/3T6(8)(10) 47 D16 25 31 M4 SDCLK1/ SCLK/ GPIO22/ EXTINT22 O/ O/ B/ I CMOS 3-State 6/8/10mA PU/PD VddSD1 3ICUD/3T6(8)(10) 48 F12 - - SDRADDR8 O - 3-State 2/4/8mA Vdd2 3T2(4)(8) 49 E12 - - SDRADDR9 O - 3-State 2/4/8mA Vdd2 3T2(4)(8) - 3-State 2/4/8mA Vdd2 3T2(4)(8) 50 F11 - - SDRADDR10 O 51 E13 26 32 L4 Vdd1 P 52 D13 27 33 N3 Vss G 53 D14 28 34 N2 Vdd2 P 54 D15 - - SDRBA0 O - 3-State 2/4/8mA Vdd2 3T2(4)(8) 55 C16 - - SDRBA1 O - 3-State 2/4/8mA Vdd2 3T2(4)(8) 56 C15 - - SDRCAS O - 3-State 2/4/8mA Vdd2 3T2(4)(8) 57 C14 - - SDRRAS O - 3-State 2/4/8mA Vdd2 3T2(4)(8) 58 B16 - - Vdd2 P 59 B15 - - Vss G 60 A16 - - SDRCKE O - 3-State 2/4/8mA Vdd2 3T2(4)(8) 61 A15 - - SDRCLK O - 3-State 2/4/8mA Vdd2 3T2(4)(8) 62 A14 29 35 M3 SDCLK0 O CMOS 3-State 6/8/10mA VddSD0 3IC/3T6(8)(10) 63 B14 30 36 K5 SDCMD0 B CMOS 3-State 6/8/10mA PU/PD VddSD0 3ICUD/3T6(8)(10) 64 C12 31 37 N1 VddSD0 P 65 B13 32 38 L3 SDAT00 B CMOS 3-State 6/8/10mA PU/PD VddSD0 3ICUD/3T6(8)(10) 66 C13 33 39 M2 Vss G 67 A13 34 40 K4 SDAT01 B CMOS 3-State 6/8/10mA PU/PD VddSD0 3ICUD/3T6(8)(10) 68 A12 35 41 M1 SDAT02 B CMOS 3-State 6/8/10mA PU/PD VddSD0 3ICUD/3T6(8)(10) 69 B12 36 42 J5 SDAT03 B CMOS 3-State 6/8/10mA PU/PD VddSD0 3ICUD/3T6(8)(10) B/ B/ O/ B/ I CMOS 3-State 6/8/10mA PU/PD VddSD2 3ICUD/3T6(8)(10) 70 C11 37 43 K3 TIOCA01/ SDCMD2/ PHI1/ GPIO0A/ EXTINT0A 71 A11 38 44 L2 TXD1/ SDAT20/ GPIO04/ EXTINT04 O/ B/ B/ I CMOS 3-State 6/8/10mA PU/PD VddSD2 3ICUD/3T6(8)(10) 72 B11 39 45 J4 RXD1/ SDAT21/ GPIO05/ EXTINT05 I/ B/ B/ I CMOS 3-State 6/8/10mA PU/PD VddSD2 3ICUD/3T6(8)(10) 73 D12 40 46 L1 VddSD2 P I/ B/ I/ B/ I CMOS 3-State 6/8/10mA PU/PD VddSD2 3ICUD/3T6(8)(10) G 74 C10 41 47 H6 CTS1/ SDAT22/ RXD0/ GPIO56/ EXTINT56 75 E11 42 48 K2 Vss www.onsemi.com 27 LC823450 76 B10 43 49 K1 RTS1/ SDAT23/ TXD0/ GPIO57/ EXTINT57 O/ B/ O/ B/ I CMOS 3-State 6/8/10mA PU/PD VddSD2 3ICUD/3T6(8)(10) 77 D11 44 50 J3 TCK/ SDCD2/ GPIO29/ EXTINT29 I/ I/ B/ I schmitt 3-State 1/2/4mA PU/PD VddSD2 3ISUD/3T1(2)(4) 78 D10 45 51 H5 TMS/ SDWP2/ GPIO28/ EXTINT28 I/ I/ B/ I schmitt 3-State 1/2/4mA PU/PD VddSD2 3ISUD/3T1(2)(4) J2 TIOCA00/ SDCLK2/ PHI0/ GPIO09/ EXTINT09 B/ O/ O/ B/ I schmitt 3-State 6/8/10mA PU/PD VddSD2 3ISUD/3T6(8)(10) 79 A10 46 52 80 E10 - - SDRCS O - 3-State 2/4/8mA Vdd2 3T2(4)(8) 81 F10 - - SDRWE O - 3-State 2/4/8mA Vdd2 3T2(4)(8) 82 G10 - - SDRDQM0 O - 3-State 2/4/8mA Vdd2 3T2(4)(8) 83 D9 - - SDRDQM1 O - 3-State 2/4/8mA Vdd2 3T2(4)(8) 84 E9 - - SDRDATA10 B CMOS 3-State 2/4/8mA PD Vdd2 3ICD/3T2(4)(8) 85 F9 - - SDRDATA11 B CMOS 3-State 2/4/8mA PD Vdd2 3ICD/3T2(4)(8) 86 A9 47 53 J1 Vdd1 P 87 B9 48 54 H4 Vss G 88 G9 - 55 G5 XTALINFO0 B schmitt 3-State 2/4/8mA PU Vdd2 3ISU/3T2(4)(8) 89 C9 49 56 H1 Vdd2 P 90 H9 - - SDRDATA12 B CMOS 3-State 2/4/8mA PD Vdd2 3ICD/3T2(4)(8) 91 G8 - - SDRDATA13 B CMOS 3-State 2/4/8mA PD Vdd2 3ICD/3T2(4)(8) 92 F8 - - SDRDATA14 B CMOS 3-State 2/4/8mA PD Vdd2 3ICD/3T2(4)(8) 93 E8 - - SDRDATA15 B CMOS 3-State 2/4/8mA PD Vdd2 3ICD/3T2(4)(8) 94 D8 50 57 H2 VddRTC P 95 A7 - 58 H3 RTCMODE I CMOS - - - VddRTC 1IC 96 B8 51 59 G2 VssRTC G 97 A8 52 60 G1 XIN32K I X - - - VddRTC X 98 C8 53 61 G3 XOUT32K O - X - - VddRTC X 99 B7 54 62 F1 VDET I CMOS - - - VddRTC 1IC 100 C7 55 63 G4 RTCINT(*1) O - OD 0.3mA-OD - VddRTC OD3 101 D7 56 64 F2 BACKUPB I schmitt - - - VddRTC 1IS 102 E7 - 65 F3 KEYINT0 I schmitt - - PD VddRTC 1ISD 103 F7 - 66 F4 KEYINT1 I schmitt - - PD VddRTC 1ISD 104 G7 - 67 E1 KEYINT2 I schmitt - - PD VddRTC 1ISD 105 A6 57 68 E2 AVddADC P 106 B6 - - VRH I 3A - - - AVddADC 3A 107 C6 - - VR O - 3A - - AVddADC 3A 108 D6 - - 3A - - - AVddADC 3A 109 E6 58 69 110 C5 59 111 B5 60 112 A5 61 113 C4 62 114 B4 115 A4 VRL I D1 AVssADC G 70 E3 AN5 I 3A - - - AVddADC 3A 71 D2 AN4 I 3A - - - AVddADC 3A 72 D3 AN3 I 3A - - - AVddADC 3A 73 C1 AN2 I 3A - - - AVddADC 3A 63 74 C2 AN1 I 3A - - - AVddADC 3A 64 75 B1 AN0 I 3A - - - AVddADC 3A www.onsemi.com 28 LC823450 116 D5 - 76 F5 NLBEXA0/ GPIO16/ EXTINT16 O/ B/ I schmitt 3-State 2/4/8mA PD Vdd2 3ISD/3T2(4)(8) 117 F6 - 77 E4 EXD1/ GPIO47/ EXTINT47 B/ B/ I schmitt 3-State 2/4/8mA PD Vdd2 3ISD/3T2(4)(8) 118 A3 - - EXA1/ GPIO32/ EXTINT32 O/ B/ I schmitt 3-State 2/4/8mA PD Vdd2 3ISD/3T2(4)(8) 119 B3 - - EXA2/ GPIO33/ EXTINT33 O/ B/ I schmitt 3-State 2/4/8mA PD Vdd2 3ISD/3T2(4)(8) 120 A2 - - EXA3/ GPIO34/ EXTINT34 O/ B/ I schmitt 3-State 2/4/8mA PD Vdd2 3ISD/3T2(4)(8) 121 A1 - - Vss G 122 B2 - - Vdd2 P 123 B1 - - EXA4/ GPIO35/ EXTINT35 O/ B/ I schmitt 3-State 2/4/8mA PD Vdd2 3ISD/3T2(4)(8) 124 C1 - - EXA5/ GPIO36/ EXTINT36 O/ B/ I schmitt 3-State 2/4/8mA PD Vdd2 3ISD/3T2(4)(8) 125 C2 - - EXA6/ GPIO37/ EXTINT37 O/ B/ I schmitt 3-State 2/4/8mA PD Vdd2 3ISD/3T2(4)(8) 126 C3 65 78 SCL0/ GPIO07/ EXTINT07 O/ B/ I schmitt 3-State 1/2/4mA PU/PD Vdd2 3ISUD/3T1(2)(4) 127 D3 - - EXA7/ GPIO38/ EXTINT38 O/ B/ I schmitt 3-State 2/4/8mA PD Vdd2 3ISD/3T2(4)(8) 128 D4 66 79 SDA0/ GPIO08/ EXTINT08 B/ B/ I schmitt 3-State 1/2/4mA PU/PD Vdd2 3ISUD/3T1(2)(4) 129 E4 - - EXA8/ GPIO39/ EXTINT39 O/ B/ I schmitt 3-State 2/4/8mA PD Vdd2 3ISD/3T2(4)(8) 130 E5 67 80 C3 SDO0/ GPIO1F/ EXTINT1F O/ B/ I schmitt 3-State 1/2/4mA PU/PD Vdd2 3ISUD/3T1(2)(4) 131 D1 68 81 D4 Vss G 132 D2 69 82 A2 Vdd2 P O/ B/ I schmitt 3-State 2/4/8mA PD Vdd2 3ISD/3T2(4)(8) A1 B2 133 F4 - - EXA9/ GPIO3A/ EXTINT3A 134 F5 - - EXA10/ GPIO3B/ EXTINT3B O/ B/ I schmitt 3-State 2/4/8mA PD Vdd2 3ISD/3T2(4)(8) 135 G5 - - EXA11/ GPIO3C/ EXTINT3C O/ B/ I schmitt 3-State 2/4/8mA PD Vdd2 3ISD/3T2(4)(8) 136 G4 70 83 SCK0/ GPIO1D/ EXTINT1D B/ B/ I schmitt 3-State 1/2/4mA PU/PD Vdd2 3ISUD/3T1(2)(4) 137 G6 - - EXA12/ GPIO3D/ EXTINT3D O/ B/ I schmitt 3-State 2/4/8mA PD Vdd2 3ISD/3T2(4)(8) 138 H4 71 84 SWDCLK/ GPIO58/ EXTINT58/ DMCKO1 I/ B/ I/ O schmitt 3-State 1/2/4mA PU/PD Vdd2 3ISUD/3T1(2)(4) 139 H5 - - EXA13/ GPIO3E/ EXTINT3E O/ B/ I schmitt 3-State 2/4/8mA PD Vdd2 3ISD/3T2(4)(8) 140 H6 72 85 SDI0/ GPIO1E/ EXTINT1E I/ B/ I schmitt 3-State 1/2/4mA PU/PD Vdd2 3ISUD/3T1(2)(4) B3 A3 F6 www.onsemi.com 29 LC823450 141 J4 - - EXA14/ GPIO3F/ EXTINT3F O/ B/ I schmitt 3-State 2/4/8mA PD Vdd2 3ISD/3T2(4)(8) B/ B/ I/ I schmitt 3-State 2mA PU Vdd2 3ISU/3T2 142 J5 73 86 C4 SWDIO/ GPIO59/ EXTINT59/ DMDIN1 143 H7 - 87 E5 EXD2/ GPIO48/ EXTINT48 B/ B/ I schmitt 3-State 2/4/8mA PD Vdd2 3ISD/3T2(4)(8) 144 J6 - 88 A4 EXD3/ GPIO49/ EXTINT49 B/ B/ I schmitt 3-State 2/4/8mA PD Vdd2 3ISD/3T2(4)(8) 145 E3 74 89 B4 Vdd1 P 146 F3 - - 147 G3 - 90 148 K6 - 149 K5 150 Vdd2 P Vss G - EXA15/ GPIO40/ EXTINT40 O/ B/ I schmitt 3-State 2/4/8mA PD Vdd2 3ISD/3T2(4)(8) - - EXA16/ GPIO41/ EXTINT41 O/ B/ I schmitt 3-State 2/4/8mA PD Vdd2 3ISD/3T2(4)(8) L5 - - EXA17/ GPIO42/ EXTINT42 O/ B/ I schmitt 3-State 2/4/8mA PD Vdd2 3ISD/3T2(4)(8) 151 M4 - - EXA18/ GPIO43/ EXTINT43 O/ B/ I schmitt 3-State 2/4/8mA PD Vdd2 3ISD/3T2(4)(8) 152 K4 - - Vss G 153 E2 - - 154 F2 75 91 A5 155 G2 76 92 156 E1 77 93 157 F1 78 158 G1 79 159 H2 160 J1 161 162 D5 DVddUSBPHY1 P AVddUSBPHY1 P C5 AVssUSBPHY G B5 USBDM B 3A 3A - - AVddUSBPHY2 3A 94 B6 USBDP B 3A 3A - - AVddUSBPHY2 3A 95 C6 AVssUSBPHY G 80 96 D6 AVddUSBPHY2 P 81 97 E6 AVssUSBPHY G H1 82 98 B7 USBEXT12 O - 3A - - AVddUSBPHY2 3A J2 83 99 C7 AVddUSBPHY2 P 163 H3 84 100 D7 AVddUSBPHY1 P 164 J3 85 101 E7 AVssUSBPHY G 165 K3 - - DVddUSBPHY1 P 166 L1 - - Vss G 167 K2 86 102 B8 VddXT1 P 168 K1 87 103 A8 XIN1 I X - - - VddXT1 X 169 L2 88 104 D8 VssXT1 G 170 L3 89 105 C8 XOUT1 O - X - - VddXT1 X 171 L4 90 106 E8 172 M3 - - 173 M2 91 107 A9 AVddPLL1 P 174 M1 92 108 B9 VCNT1 O - 1A - - AVddPLL1 1A 175 N1 93 109 C9 AVssPLL1 G A10 EXD4/ GPIO4A/ EXTINT4A B/ B/ I schmitt 3-State 2/4/8mA PD Vdd2 3ISD/3T2(4)(8) Vdd1 P Vss G 176 N3 - 110 177 N2 - - Vss G 178 P1 - - Vdd2 P www.onsemi.com 30 LC823450 179 P2 - 111 B10 EXD5/ GPIO4B/ EXTINT4B B/ B/ I schmitt 3-State 2/4/8mA PD Vdd2 3ISD/3T2(4)(8) 180 R1 - 112 D9 EXD6/ GPIO4C/ EXTINT4C B/ B/ I schmitt 3-State 2/4/8mA PD Vdd2 3ISD/3T2(4)(8) 181 R2 - - EXA19/ GPIO44/ EXTINT44 O/ B/ I schmitt 3-State 2/4/8mA PD Vdd2 3ISD/3T2(4)(8) 182 R3 - - EXA20/ GPIO45/ EXTINT45 O/ B/ I schmitt 3-State 2/4/8mA PD Vdd2 3ISD/3T2(4)(8) 183 P3 - 113 A11 EXD7/ GPIO4D/ EXTINT4D B/ B/ I schmitt 3-State 2/4/8mA PD Vdd2 3ISD/3T2(4)(8) B/ I/ I/ B/ I schmitt 3-State 1/2/4mA PU/PD Vdd2 3ISUD/3T1(2)(4) G 184 N4 94 114 F7 TIOCB00/ DMDIN0/ DIN1/ GPIO02/ EXTINT02 185 R4 - 115 B11 Vss 186 P4 95 116 A12 Vdd2 P C10 DOUT1/ GPIO15/ EXTINT15 O/ B/ I schmitt 3-State 1/2/4mA PU/PD Vdd2 3ISUD/3T1(2)(4) 187 M6 96 117 188 N5 - - EXD8/ GPIO4E/ EXTINT4E B/ B/ I schmitt 3-State 2/4/8mA PD Vdd2 3ISD/3T2(4)(8) 189 M5 - - EXD9/ GPIO4F/ EXTINT4F B/ B/ I schmitt 3-State 2/4/8mA PD Vdd2 3ISD/3T2(4)(8) 190 L6 - 118 BCK1/ GPIO13/ EXTINT13 B/ B/ I schmitt 3-State 1/2/4mA PU/PD Vdd2 3ISUD/3T1(2)(4) 191 M7 - - EXD10/ GPIO50/ EXTINT50 B/ B/ I schmitt 3-State 2/4/8mA PD Vdd2 3ISD/3T2(4)(8) 192 N7 - 119 G7 LRCK1/ GPIO14/ EXTINT14 B/ B/ I schmitt 3-State 1/2/4mA PU/PD Vdd2 3ISUD/3T1(2)(4) 193 N6 97 120 B12 MCLK0/ MCLK1/ GPIO18/ EXTINT18 B/ B/ B/ I schmitt 3-State 1/2/4mA PU/PD Vdd2 3ISUD/3T1(2)(4) 194 L7 - - EXD11/ GPIO51/ EXTINT51 B/ B/ I schmitt 3-State 2/4/8mA PD Vdd2 3ISD/3T2(4)(8) 195 M8 98 121 BCK0/ DMCKO1/ GPIO19/ EXTINT19 B/ O/ B/ I schmitt 3-State 1/2/4mA PU/PD Vdd2 3ISUD/3T1(2)(4) 196 K7 - - EXD12/ GPIO52/ EXTINT52 B/ B/ I schmitt 3-State 2/4/8mA PD Vdd2 3ISD/3T2(4)(8) 197 P5 99 122 C11 Vdd2 P 198 J7 - 123 D10 XTALINFO1 B schmitt 3-State 2/4/8mA PU Vdd2 3ISU/3T2(4)(8) 199 P6 100 124 C12 Vss G EXD13/ GPIO53/ EXTINT53 B/ B/ I schmitt 3-State 2/4/8mA PD Vdd2 3ISD/3T2(4)(8) LRCK0/ DMDIN1/ GPIO1A/ EXTINT1A B/ I/ B/ I schmitt 3-State 1/2/4mA PU/PD Vdd2 3ISUD/3T1(2)(4) 200 L8 - - 201 K8 101 125 G6 H7 E9 www.onsemi.com 31 LC823450 EXD14/ GPIO54/ EXTINT54 B/ B/ I schmitt 3-State 2/4/8mA PD Vdd2 3ISD/3T2(4)(8) DIN0/ DMDIN0/ GPIO1B/ EXTINT1B I/ I/ B/ I schmitt 3-State 1/2/4mA PU/PD Vdd2 3ISUD/3T1(2)(4) EXD15/ GPIO55/ EXTINT55 B/ B/ I schmitt 3-State 2/4/8mA PD Vdd2 3ISD/3T2(4)(8) E10 DOUT0/ DMCKO0/ GPIO1C/ EXTINT1C O/ O/ B/ I schmitt 3-State 1/2/4mA PU/PD Vdd2 3ISUD/3T1(2)(4) 128 D11 NRES I schmitt - - - Vdd2 3IS 202 J8 - - 203 N9 102 126 204 M9 - - 205 N8 103 127 206 P7 104 F8 207 L9 105 129 D12 BMODE0 B schmitt 3-State 2mA PU/PD Vdd2 3ISUD/3T2 208 K9 106 130 F9 BMODE1 B schmitt 3-State 2mA PU/PD Vdd2 3ISUD/3T2 schmitt - - Vdd2 3IS - 1A - - AVddDAMPR 1A - 1A - - AVddDAMPL 1A - 3A - - AVddPLL3 3A - 1A - - AVddPLL2 1A PU/PD Vdd2 3ISUD/3T2(4)(8) Vdd2 3T2(4)(8) Vdd2 3ISUD/3T1(2)(4) 209 J9 107 131 F10 TEST I 210 P8 108 132 E11 Vdd2 P 211 H8 109 133 E12 Vss G 212 P9 110 134 G10 Vdd1 P 213 R5 111 135 F11 AVssDAMPR G O/ O P 214 R6 112 136 F12 ROUT/ GPROUT 215 R7 113 137 G11 AVddDAMPR 216 R8 114 138 G12 AVddDAMPL P O/ O G 217 R9 115 139 H12 LOUT/ GPLOUT 218 R10 116 140 H11 AVssDAMPL 219 P10 - - 220 N11 117 141 H10 142 J12 AVddPLL3 P 143 J11 VCNT3 O (*3) Vdd1 P Vss G (*2) 221 P12 118 144 J10 AVssPLL2 G 222 R12 119 145 K11 VCNT2 O 223 R13 120 146 K12 AVddPLL2 P 224 P11 121 147 G9 Vdd1 P G 225 R11 - - Vss 226 N12 - - Vdd2 P GPIO2D/ EXTINT2D/ DMCKO0/ SDRADDR11 B/ I/ O/ O schmitt 3-State 2/4/8mA SDRADDR0 O - 3-State 2/4/8mA GPIO2E/ EXTINT2E B/ I schmitt 3-State 1/2/4mA 227 M10 122 148 228 L10 - - 229 K10 123 149 H9 G8 PU/PD 230 J10 - - SDRADDR1 O - 3-State 2/4/8mA Vdd2 3T2(4)(8) 231 N10 - - SDRADDR2 O - 3-State 2/4/8mA Vdd2 3T2(4)(8) GPIO2F/ EXTINT2F B/ I schmitt 3-State 1/2/4mA PU/PD Vdd2 3ISUD/3T1(2)(4) schmitt 3-State 1/2/4mA PU/PD Vdd2 3ISUD/3T1(2)(4) schmitt 3-State 1/2/4mA PU/PD Vdd2 3ISUD/3T1(2)(4) 232 M11 124 150 L12 233 P13 125 151 L11 Vss G O/ B/ I 234 L11 126 152 K10 SCL1/ GPIO2B/ EXTINT2B 235 R14 127 153 M12 Vdd2 P 236 K11 128 154 J9 SDA1/ GPIO2C/ EXTINT2C B/ B/ I www.onsemi.com 32 LC823450 237 M12 - - SDRDATA0 B CMOS 3-State 2/4/8mA PD Vdd2 3ICD/3T2(4)(8) 238 N13 - - SDRDATA1 B CMOS 3-State 2/4/8mA PD Vdd2 3ICD/3T2(4)(8) Vdd2 3T2(4)(8) Vdd2 3T2(4)(8) 239 P14 - - SDRADDR3 O - 3-State 2/4/8mA 240 R15 - - SDRADDR4 O - 3-State 2/4/8mA (*1) RTCINT (open drain Output) 3.6V tolerant (*2) Pin assignment for PLL3 of package TQFP128L is as below PLL3 118 AVddPLL3 119 VCNT3 120 AVssPLL2 (*3) PLL3 is unusable in package XBGA240. www.onsemi.com 33 LC823450 3-2 Input/Output Circuit Attribute : 3IS Attribute : 1IS VddIO * 1 VddIO * 1 PAD PAD Vss Vss Attribute : 1IC Attribute : 1ISD VddIO * 1 VddIO * 1 PAD PAD Vss Vss Attribute : 3T2(4)(8) Attribute : OD3 VddIO * 1 2/4/8mA PAD PAD Out/Hiz Vss Vss Attribute : 3ICUD/3T6(8)(10) Attribute : 3ICD/3T2(4)(8) VddIO * 1 VddIO * 1 ON/OFF DRVcnt * 2 PAD DRVcnt * 2 Out/Hiz Out/Hiz ON/OFF ON/OFF PAD Vss Vss Attribute : 3ISUD/3T1(2)(4) , /3T2(4)(8), /3T6(8)(10) Attribute : 3ISUD/3T2 VddIO * 1 ON/OFF ON/OFF DRVcnt * 2 VddIO * 1 PAD PAD Out/Hiz Out/Hiz ON/OFF ON/OFF Vss Vss Level Shifter www.onsemi.com 34 LC823450 Attribute : 3ISD/3T2(4)(8) Attribute : 3ISU/3T2 VddIO * 1 VddIO * 1 ON/OFF DRVcnt * 2 PAD Out/Hiz PAD Out/Hiz ON/OFF Vss Vss Attribute : 3ISU/3T2(4)(8) Attribute : 3A,1A VddIO * 1 AVdd* ON/OFF DRVcnt * 2 AVdd* PAD(Output) PAD Out/Hiz PAD(Input) AVss* AVss* Vss Attribute : X VddXT1/VddRTC PAD(Input) PAD(Output) Vss Level Shifter * 1 : Vdd2, VddSD0, VddSD1, VddSD2, VddQSPI (IO Pwr Grp of 3-1 Pin Assignment) * 2 : DRVcnt : 1/2/4mA, 2/4/8mA. 4/8/10mA, etc. Drivability switch control signal www.onsemi.com 35 LC823450 3-3 Port state table (*1) Default Function (NRES=Low) (*2) Port status NRES=Low(i) (*2) Port status NRES=High(ii) TCLKA0/ BCK1/ GPIO00/ EXTINT00 GPIO00 Hiz Hiz TCLKB0/ LRCK1/ GPIO01/ EXTINT01 GPIO01 Hiz Hiz TIOCB00/ DMDIN0 DIN1/ GPIO02/ EXTINT02/ GPIO02 Hiz Hiz GPIO03 PU PU(*3) XBGA240 TQFP128L WLP154 PIN NAME TIOCB01/ DMCKO0/ QSCS/ GPIO03/ EXTINT03 TXD1/ SDAT20/ GPIO04/ EXTINT04 GPIO04 Hiz Hiz RXD1/ SDAT21/ GPIO05/ EXTINT05 GPIO05 Hiz Hiz NCS0/ GPIO06/ EXTINT06 GPIO06 Hiz Hiz SCL0/ GPIO07/ EXTINT07 GPIO07 Hiz Hiz SDA0/ GPIO08/ EXTINT08 GPIO08 Hiz Hiz TIOCA00/ SDCLK2/ PHI0/ GPIO09/ EXTINT09 GPIO09 Hiz Hiz TIOCA01/ SDCMD2/ PHI1/ GPIO0A/ EXTINT0A GPIO0A Hiz Hiz GPIO0B Hiz Hiz TXD2/ TIOCA10/ GPIO0B/ EXTINT0B RXD2/ TIOCA11/ GPIO0C/ EXTINT0C GPIO0C Hiz Hiz SCK1/ GPIO0D/ EXTINT0D GPIO0D Hiz Hiz SDI1(QIO0)/ GPIO0E/ EXTINT0E GPIO0E Hiz Hiz www.onsemi.com 36 LC823450 SDO1(QIO1)/ GPIO0F/ EXTINT0F GPIO0F Hiz Hiz NCS1/ RXD0/ GPIO10/ EXTINT10 GPIO10 Hiz Hiz SWP1(QIO2)/ GPIO11/ EXTINT11 GPIO11 Hiz Hiz SHOLD1(QIO3)/ GPIO12/ EXTINT12 GPIO12 Hiz Hiz BCK1/ GPIO13/ EXTINT13 GPIO13 Hiz Hiz LRCK1/ GPIO14/ EXTINT14 GPIO14 Hiz Hiz DOUT1/ GPIO15/ EXTINT15 GPIO15 Hiz Hiz NLBEXA0/ GPIO16/ EXTINT16 GPIO16 Hiz Hiz NRD/ GPIO17/ EXTINT17 GPIO17 Hiz Hiz GPIO18 Hiz Hiz MCLK0/ MCLK1/ GPIO18/ EXTINT18 BCK0/ DMCKO1/ GPIO19/ EXTINT19 GPIO19 Hiz Hiz LRCK0/ DMDIN1/ GPIO1A/ EXTINT1A GPIO1A Hiz Hiz GPIO1B Hiz Hiz DIN0/ DMDIN0/ GPIO1B/ EXTINT1B DOUT0/ DMCKO0/ GPIO1C/ EXTINT1C GPIO1C Hiz Hiz SCK0/ GPIO1D/ EXTINT1D GPIO1D Hiz Hiz SDI0/ GPIO1E/ EXTINT1E GPIO1E Hiz Hiz SDO0/ GPIO1F/ EXTINT1F GPIO1F Hiz Hiz TDI/ SDCD1/ SWO/ GPIO20/ EXTINT20 GPIO20 Hiz Hiz www.onsemi.com 37 LC823450 TDO/ SDWP1/ INS/ GPIO21/ EXTINT21 SDCLK1/ SCLK/ GPIO22/ EXTINT22 GPIO22 Hiz Hiz SDCMD1/ BS/ GPIO23/ EXTINT23 GPIO23 Hiz Hiz SDAT10/ DATA0/ GPIO24/ EXTINT24 GPIO24 Hiz Hiz GPIO25 Hiz Hiz GPIO21 Hiz Hiz SDAT11/ DATA1/ GPIO25/ EXTINT25 SDAT12/ DATA2/ GPIO26/ EXTINT26 GPIO26 Hiz Hiz SDAT13/ DATA3/ GPIO27/ EXTINT27 GPIO27 Hiz Hiz TMS/ SDWP2/ GPIO28/ EXTINT28 GPIO28 Hiz Hiz TCK/ SDCD2/ GPIO29/ EXTINT29 GPIO29 Hiz Hiz GPIO2A/ EXTINT2A/ SDRADDR12 GPIO2A Hiz Hiz SCL1/ GPIO2B/ EXTINT2B GPIO2B Hiz Hiz SDA1/ GPIO2C/ EXTINT2C GPIO2C Hiz Hiz GPIO2D Hiz Hiz GPIO2D/ EXTINT2D/ DMCKO0/ SDRADDR11 GPIO2E/ EXTINT2E GPIO2E Hiz Hiz(*4) GPIO2F/ EXTINT2F GPIO2F Hiz Hiz(*5) NWRENWRL/ GPIO30/ EXTINT30 GPIO30 Hiz Hiz NHBNWRH/ TXD0/ GPIO31/ EXTINT31 GPIO31 Hiz Hiz EXA1/ GPIO32/ EXTINT32 GPIO32 Hiz Hiz www.onsemi.com 38 LC823450 EXA2/ GPIO33/ EXTINT33 GPIO33 Hiz Hiz EXA3/ GPIO34/ EXTINT34 GPIO34 Hiz Hiz EXA4/ GPIO35/ EXTINT35 GPIO35 Hiz Hiz EXA5/ GPIO36/ EXTINT36 GPIO36 Hiz Hiz EXA6/ GPIO37/ EXTINT37 GPIO37 Hiz Hiz EXA7/ GPIO38/ EXTINT38 GPIO38 Hiz Hiz EXA8/ GPIO39/ EXTINT39 GPIO39 Hiz Hiz EXA9/ GPIO3A/ EXTINT3A GPIO3A Hiz Hiz EXA10/ GPIO3B/ EXTINT3B GPIO3B Hiz Hiz EXA11/ GPIO3C/ EXTINT3C GPIO3C Hiz Hiz EXA12/ GPIO3D/ EXTINT3D GPIO3D Hiz Hiz EXA13/ GPIO3E/ EXTINT3E GPIO3E Hiz Hiz EXA14/ GPIO3F/ EXTINT3F GPIO3F Hiz Hiz EXA15/ GPIO40/ EXTINT40 GPIO40 Hiz Hiz EXA16/ GPIO41/ EXTINT41 GPIO41 Hiz Hiz EXA17/ GPIO42/ EXTINT42 GPIO42 Hiz Hiz EXA18/ GPIO43/ EXTINT43 GPIO43 Hiz Hiz EXA19/ GPIO44/ EXTINT44 GPIO44 Hiz Hiz EXA20/ GPIO45/ EXTINT45 GPIO45 Hiz Hiz EXD0/ GPIO46/ EXTINT46 GPIO46 Hiz Hiz EXD1/ GPIO47/ EXTINT47 GPIO47 Hiz Hiz www.onsemi.com 39 LC823450 EXD2/ GPIO48/ EXTINT48 GPIO48 Hiz Hiz EXD3/ GPIO49/ EXTINT49 GPIO49 Hiz Hiz EXD4/ GPIO4A/ EXTINT4A GPIO4A Hiz Hiz EXD5/ GPIO4B/ EXTINT4B GPIO4B Hiz Hiz EXD6/ GPIO4C/ EXTINT4C GPIO4C Hiz Hiz EXD7/ GPIO4D/ EXTINT4D GPIO4D Hiz Hiz EXD8/ GPIO4E/ EXTINT4E GPIO4E Hiz Hiz EXD9/ GPIO4F/ EXTINT4F GPIO4F Hiz Hiz EXD10/ GPIO50/ EXTINT50 GPIO50 Hiz Hiz EXD11/ GPIO51/ EXTINT51 GPIO51 Hiz Hiz EXD12/ GPIO52/ EXTINT52 GPIO52 Hiz Hiz EXD13/ GPIO53/ EXTINT53 GPIO53 Hiz Hiz EXD14/ GPIO54/ EXTINT54 GPIO54 Hiz Hiz EXD15/ GPIO55/ EXTINT55 GPIO55 Hiz Hiz GPIO56 Hiz Hiz GPIO57 Hiz Hiz SDAT00 SDAT00 Hiz Hiz SDAT01 SDAT01 Hiz Hiz SDAT02 SDAT02 Hiz Hiz SDAT03 SDAT03 Hiz Hiz SDCLK0 SDCLK0 Low Low SDCMD0 SDCMD0 Hiz Hiz SDRADDR0 SDRADDR0 Low Low SDRADDR1 SDRADDR1 Low Low SDRADDR10 SDRADDR10 Low Low SDRADDR2 SDRADDR2 Low Low SDRADDR3 SDRADDR3 Low Low CTS1/ SDAT22/ RXD0/ GPIO56/ EXTINT56 RTS1/ SDAT23/ TXD0/ GPIO57/ EXTINT57 www.onsemi.com 40 LC823450 SDRADDR4 SDRADDR4 Low Low SDRADDR5 SDRADDR5 Low Low SDRADDR6 SDRADDR6 Low Low SDRADDR7 SDRADDR7 Low Low SDRADDR8 SDRADDR8 Low Low SDRADDR9 SDRADDR9 Low Low SDRBA0 SDRBA0 Low Low SDRBA1 SDRBA1 Low Low SDRCAS SDRCAS High High SDRCKE SDRCKE High High SDRCLK SDRCLK Low Low SDRCS SDRCS High High SDRDATA0 SDRDATA0 Hiz Hiz SDRDATA1 SDRDATA1 Hiz Hiz SDRDATA10 SDRDATA10 Hiz Hiz SDRDATA11 SDRDATA11 Hiz Hiz SDRDATA12 SDRDATA12 Hiz Hiz SDRDATA13 SDRDATA13 Hiz Hiz SDRDATA14 SDRDATA14 Hiz Hiz SDRDATA15 SDRDATA15 Hiz Hiz SDRDATA2 SDRDATA2 Hiz Hiz SDRDATA3 SDRDATA3 Hiz Hiz SDRDATA4 SDRDATA4 Hiz Hiz SDRDATA5 SDRDATA5 Hiz Hiz SDRDATA6 SDRDATA6 Hiz Hiz SDRDATA7 SDRDATA7 Hiz Hiz SDRDATA8 SDRDATA8 Hiz Hiz SDRDATA9 SDRDATA9 Hiz Hiz SDRDQM0 SDRDQM0 High High SDRDQM1 SDRDQM1 High High SDRRAS SDRRAS High High SDRWE SDRWE High High SWDCLK Hiz Hiz SWDIO Hiz Hiz NRES Hiz Hiz SWDCLK/ GPIO58/ EXTINT58/ DMCKO1 SWDIO/ GPIO59/ EXTINT59/ DMDIN1 NRES TEST TEST Hiz Hiz XTALINFO0 XTALINFO0 Hiz Hiz XTALINFO1 XTALINFO1 Hiz Hiz BMODE0 Hiz Hiz BMODE0 BMODE1 BMODE1 Hiz Hiz RTCMODE Hiz Hiz KEYINT0 KEYINT0 PD PD KEYINT1 KEYINT1 PD PD KEYINT2 KEYINT2 PD PD BACKUPB BACKUPB Hiz Hiz RTCINT -(Not Determined) -(Not Determined) RTCMODE RTCINT www.onsemi.com 41 LC823450 VDET VDET Hiz Hiz LOUT Hiz Hiz ROUT Hiz Hiz LOUT/ GPLOUT ROUT/ GPROUT USBDM USBDM Hiz Hiz USBDP USBDP Hiz Hiz USBEXT12 -(Not Applicable) -(Not Applicable) VCNT1 VCNT1 -(Not Applicable) -(Not Applicable) (*6) (*6) VCNT2 VCNT2 -(Not Applicable) -(Not Applicable) VCNT3 VCNT3 -(Not Applicable) -(Not Applicable) AN0 AN0 -(Not Applicable) -(Not Applicable) AN1 AN1 -(Not Applicable) -(Not Applicable) AN2 AN2 -(Not Applicable) -(Not Applicable) AN3 AN3 -(Not Applicable) -(Not Applicable) AN4 AN4 -(Not Applicable) -(Not Applicable) AN5 AN5 -(Not Applicable) -(Not Applicable) VR VR -(Not Applicable) -(Not Applicable) VRH VRH -(Not Applicable) -(Not Applicable) VRL VRL -(Not Applicable) -(Not Applicable) USBEXT12 XIN1 XIN32K XOUT1 XOUT32K XIN1 -(Not Applicable) -(Not Applicable) XIN32K -(Not Applicable) -(Not Applicable) XOUT1 -(Not Applicable) -(Not Applicable) XOUT32K -(Not Applicable) -(Not Applicable) [Note] means a port is available for each package. “PD” means pull down (*1) Default function is port function set by NRES=Low (*2) NRES=High(ii) occurs just after NRES=Low(i) (*3) This port is set to output port and PU is disabled to be used as QSCS for SPI I/F chip select during serial flash boot mode. (*4) This port is set to output port to be used as external power control during Internal ROM boot. (*5) This port is set to output port to be used as boot monitor port during Internal ROM boot. (*6) One of VCNT2 or VCNT3 is available www.onsemi.com 42 LC823450 4 Electrical Specification Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 4-1 Maximum Ratings (*1) *Vss* = 0V Item Symbol Maximum power Vdd1 supply voltage VddRTC VddXT1 AVddUSBPH Y1 DVddUSBPH Y1 AVddPLL1 AVddPLL2 AVddDAMPL AVddDAMPR Vdd2 VddSD0 VddSD1 VddSD2 VddQSPI AVddPLL3 AVddADC AVddUSBPH Y2 Input voltage VI VIUSB Operating ambient Topr temperature Ambient Tstg temperature of preservation Condition USBDP,USB DM terminal Ratings −0.5 to 1.8 Unit V −0.5 to 2.5 V −0.5 to 4.6 V −0.5 to *Vdd*+0.5 −0.5 to AVddUSBPHY2+0.5(<4.6) −20 to +65 V V °C −55 to +125 °C (*1) Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. www.onsemi.com 43 LC823450 4-2 Recommended Operating Conditions (*1) Ta = −20°C to +65°C Low voltage operation(*2) Item Symbol Condition Min Typ Max Power supply Vdd1 0.93 1.0 1.27 voltage VddXT1 (*3) 0.93 1.0 1.3 AVddPLL1 0.93 1.0 1.3 AVddPLL2 0.9 1.0 1.3 AVddPLL3 2.7 3.3 3.6 VddRTC 0.9 1.0 1.1 Vdd2 2.7 3.3 3.6 1.7 1.8 1.95 VddSD0 2.7 3.3 3.6 1.7 1.8 1.95 VddSD1 2.7 3.3 3.6 1.7 1.8 1.95 VddSD2 2.7 3.3 3.6 1.7 1.8 1.95 VddQSPI 2.7 3.3 3.6 1.7 1.8 1.95 AVddADC 2.7 3.3 3.6 AVddUSB (*4) 0.93 1.2 1.3 PHY1 (*5) 1.08 1.2 1.3 DVddUSB (*4) 0.93 1.2 1.3 PHY1 (*5) 1.08 1.2 1.3 AVddUSB (*4) 2.7 3.3 3.6 PHY2 (*5) 3.0 3.3 3.6 AVddDAM 0.93 1.2 1.65 PL (*6) 0.93 1.2 1.95 AVddDAM 0.93 1.2 1.65 PR (*6) 0.93 1.2 1.95 Input range VIN 0 *Vdd* High voltage operation(*2) Min Typ Max 1.1 1.2 1.27 0.93 1.2 1.3 1.1 1.2 1.3 0.9 1.2 1.3 same as left same as left same as left same as left same as left same as left same as left same as left same as left same as left same as left same as left same as left same as left same as left same as left same as left same as left same as left same as left same as left same as left same as left same as left Unit V V V V V V V V V V V V V V V V V V V V V V V V V V V V (*1) Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond the Recommended Operating Ranges limits may affect device reliability. (*2) Follow the operating frequency specifications because the operating frequency ranges are specified according to the operating voltage ranges. (*3) Regarding Xtal frequency range, refer to the detailed datasheet. (*4) While USB is not used. (*5) While USB is used (including USB suspend mode) (*6) While used as GPO (general purpose output) the output of which can be controlled by registers (*7) Power domains of Vdd1, AVddUSBPHY1=DVddUSBPHY1, AVddPLL1, AVddPLL2, AVddPLL3, VddXT1 are divided, and different voltage can be supplied. Power domains of Vdd2, VddSD0, VddSD1, VddSD2, VddQSPI, AVddADC, AVddUSBPHY2, AVddPLL3, AVddDAMPL=AVddDAMPR are divided, and difference voltage can be supplied. If power is supplied to one of the power supply pins above, all of other power supply pins should be supplied. VddRTC can be supplied if BACKUPB is set to low, while other power supply pins are not supplied. www.onsemi.com 44 LC823450 Item Xtal Input frequency Symbol Fxin1 FxinRTC Frc Time for Xtal stable Function System, Audio clock (XT1 oscillator) RTC clock (XTRTC oscillator) RC (RC oscillator) Low voltage operation Min Typ Max 12MHz or 20MHz tolerance : ±200ppm or less Jitter : ±50ps or less (*4) 32.768kHz Jitter : ±500ps or less 0.4 1 2 (*5) (*5) (*5) Farm Fahb Fapb Fdsp Faud(*1) Fdec Fenc Cortex-M3 AHB APB DSP AUDCLK(768fs) DECCLK(*2) (MP3 Decoder) ENCCLK(*3) (MP3 Encoder) 0 0 0 0 0 0 33.8688 16.9344 100 100 100 100 147.456 73.728 0 8.4672 36.864 Unit - (*4) - same as left same as left 3 (*7) 1000 (*7) Txin1 TxinRTC Internal clock frequency High voltage operation Min Typ Max 12MHz or 20MHz or 24MHz or 48MHz tolerance : ±200ppm or less Jitter : ±50ps or less 0 0 0 0 MHz same as left ms same as left ms 160(*6) 160(*6) 160(*6) 160(*6) same as left same as left MHz MHz MHz MHz MHz MHz same as left MHz (*1) Audio blocks run on 256 * Fs(sampling frequency) clock. However, Class-D AMP, etc run on 384 * Fs(sampling frequency). These clocks are generated from 768 * Fs(Base Clock) divided by 3 and 2 respectively. (*2)MP3 Decoder runs on clock of 384 * Fs(sampling frequency of MPEG1 mode). It runs on the clock of the same frequency as MPEG1 mode during MPEG2 / 2.5 mode. For example, even when operating in MPEG2 / 2.5 mode(Fs = 22.05 / 11.025KHz as an example), please supplies 16.9344MHz(= 384 * 44.1KHz) clock which is the same clock frequency as MPEG1 mode. (*3) MP3 Encoder runs on clock of 192 * Fs(sampling frequency of MPEG1 mode). It runs on the clock of the same frequency as MPEG1 mode during MPEG2 / 2.5 mode. For example, even when operating in MPEG2 / 2.5 mode(Fs = 22.05 / 11.025KHz as an example), please supplies 8.4672MHz(= 192 * 44.1KHz) clock which is the same clock frequency as MPEG1 mode. (*4) Refer to the detailed datasheet. If USB function is not used, the specification required may be relaxed. Please contact our representative in detail. (*5) Vdd1=0.93V to 1.27V, Ta=−20°C to 65°C (*6) When Farm, Fdsp are over 100MHz, 1 * Wait is required for Cortex-M3 and LPDSP32 to access internal ROM by the register described in the ProgrammersModel_SystemController as memory access control register4. (*7) These are just reference values under Ta=25°C, and need to be adjusted to customer board situation. www.onsemi.com 45 LC823450 4-3 DC Characteristics (*1) Vdd2 = 2.7V to 3.6V, VddRTC = 0.9V to 1.1V, VddSD0 = 2.7V to 3.6V, VddSD1 = 2.7V to 3.6V VddSD2 = 2.7V to 3.6V, VddQSPI = 2.7V to 3.6V Ta = −20°C to +65°C Item Sym bol Pin Condition Min Typ Max CMOS 0.7×Vdd2 Input H voltage VIH (1) 0.7×VddSD0 (2) 0.7×VddSD1 (3) 0.7×VddSD2 (4) schmitt 0.75×Vdd2 (5) 0.75×VddSD1 (21) 0.75×VddSD2 (6) 0.75×VddQSPI (7) CMOS 0.7×VddRTC (8) schmitt 0.7×VddRTC (9) CMOS 0.3×Vdd2 Input L voltage VIL (1) 0.3×VddSD0 (2) 0.3×VddSD1 (3) 0.3×VddSD2 (4) schmitt 0.25×Vdd2 (5) 0.25×VddSD1 (21) 0.25×VddSD2 (6) 0.25×VddQSPI (7) CMOS 0.2×VddRTC (8) schmitt 0.2×VddRTC (9) Output H VOH (10)(12) IOH=−1mA Vdd2−0.4 voltage (11) VddQSPI−0.4 (10)(13)(14) IOH=−2mA Vdd2−0.4 (11) VddQSPI−0.4 (15) VddSD1−0.4 (12) VddSD2−0.4 (10)(13) IOH=−4mA Vdd2−0.4 (11) VddQSPI−0.4 (12) VddSD2−0.4 (16) IOH=−6mA VddQSPI−0.4 (17) (18) (19) (13) VddSD0−0.4 VddSD1−0.4 VddSD2−0.4 Vdd2−0.4 V V V V (16) VddQSPI−0.4 V (17) VddSD0−0.4 V (18) VddSD1−0.4 V (19) (16) VddSD2−0.4 VddQSP−0.4 V V VddSD0-0.4 VddSD1-0.4 VddSD2-0.4 V V V (17) (18) (19) Output L voltage VOL Unit V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V (10)(12) (11) IOH=−8mA IOH= −10mA IOL=1mA www.onsemi.com 46 0.4 0.4 V V LC823450 (10)(13)(14) (11) (15) (12) (10)(13) (11) (12) (16) (17) (18) (19) (13) (16) (17) (18) (19) (16) (17) (18) (19) (20) Pull-up resister Rup Pull-down resister Rdn Input leak current IIL Output leak current IOZ (28) (29) (30) (25) (26) (27) (1)(2) (3)(4) (5)(6) (7)(8) (9)(21) (10)(11) (12)(13) (14)(15) (16)(17) (18)(19) (20) 0.4 0.4 0.4 0.4 0.4 0.4 0.4 0.4 0.4 0.4 IOL=2mA IOL=4mA IOL=6mA 0.4 0.4 0.4 0.4 0.4 0.4 0.4 IOL=8mA IOL=10mA 0.4 0.4 0.4 0.3 V V V V 25 10 18 25 10 10 −10 75 100 50 75 100 100 10 kΩ kΩ kΩ kΩ kΩ kΩ μA −10 10 μA IOL=0.3mA VI=Vdd*= Vss HiZ output V V V V V V V V V V V V V V V V V www.onsemi.com 47 LC823450 Vdd2 = 1.7V to 1.95V, VddSD0 = 1.7V to 1.95V, VddSD1 = 1.7V to 1.95V VddSD2 = 1.7V to 1.95V, VddQSPI = 1.7V to 1.95V AVddDAMPL = 0.93V to 1.95V, AVddDAMPR = 0.93V to 1.95V Ta = −20°C to +65°C Item Sym bol Pin Condition Min CMOS 0.7×Vdd2 Input H voltage VIH (1) 0.7×VddSD0 (2) 0.7×VddSD1 (3) 0.7×VddSD2 (4) schmitt 0.75×Vdd2 (5) 0.75×VddSD1 (21) 0.75×VddSD2 (6) 0.75×VddQSPI (7) CMOS Input L voltage VIL (1) (2) (3) (4) schmitt (5) (21) (6) (7) Output H VOH (10)(12) IOH= Vdd2−0.4 voltage −0.5mA (11) VddQSPI−0.4 (10)(13)(14) IOH=−1mA Vdd2−0.4 (11) VddQSPI−0.4 (15) VddSD1−0.4 (12) VddSD2−0.4 (10)(13) IOH=−2mA Vdd2−0.4 (11) VddQSPI−0.4 (12) VddSD2−0.4 (16) IOH=−3mA VddQSPI−0.4 (17) (18) (19) (13) Max 0.3×Vdd2 0.3×VddSD0 0.3×VddSD1 0.3×VddSD2 0.25×Vdd2 0.25×VddSD1 0.25×VddSD2 0.25×VddQSPI Unit V V V V V V V V V V V V V V V V V V V V V V V V V V VddSD0−0.4 VddSD1−0.4 VddSD2−0.4 Vdd2−0.4 V V V V (16) VddQSPI−0.4 V (17) VddSD0−0.4 V (18) VddSD1−0.4 V (19) VddSD2−0.4 V AVddDAMPL− 0.4 AVddDAMPR− 0.4 VddQSPI−0.4 V VddSD0−0.4 VddSD1−0.4 VddSD2−0.4 V V V (23) (24) (16) IOH=−4mA IOH=−8mA (*1) IOH=−8mA (*1) IOH=−5mA (17) (18) (19) Output L voltage VOL Typ (10)(11)(12) (10)(13)(14) (11) IOL=0.5mA IOL=1mA www.onsemi.com 48 V V 0.4 0.4 0.4 V V V LC823450 0.4 0.4 0.4 0.4 0.4 0.4 V V V V V V 0.4 0.4 0.4 0.4 V V V V (16) 0.4 V (17) 0.4 V (18) 0.4 V (19) 0.4 V 0.4 V 0.4 V 0.4 V 0.4 0.4 0.4 V V V kΩ kΩ kΩ kΩ kΩ μA (15) (12) (10)(13) (11) (12) (16) (17) (18) (19) (13) (23) (24) (16) IOL=2mA IOL=3mA IOL=4mA IOL=8mA (*2) IOL=8mA (*2) IOL=5mA (17) (18) (19) Pull-up resister Rup Pull-down resister Input leak current Rdn Output leak current IOZ IIL (28) (29) (30) (25) (26) (1)(2) (3)(4) (5)(6) (7)(8) (9)(21) (10)(11) (12)(13) (14)(15) (16)(17) (18)(19) (23)(24) 25 30 18 25 30 VI=Vdd*= Vss −10 75 200 50 75 200 10 HiZ output −10 10 μA −10 10 μA (*1) Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. (*2) Set DAMPCTL register as below. DZCTL : DSLEEP=1. (don’t care DSL value) DZINP : DZINP14=1, other DZINPx=0 This DC characteristics can be applied while Class-D AMP used as GPO. www.onsemi.com 49 LC823450 (1) SDRDATA15,SDRDATA14,SDRDATA13,SDRDATA12,SDRDATA11,SDRDATA10,SDRDATA9,SDRDATA8,SDRDATA 7,SDRDATA6,SDRDATA5,SDRDATA4,SDRDATA3,SDRDATA2,SDRDATA1,SDRDATA0 (2) SDCMD0,SDAT03,SDAT02,SDAT01,SDAT00 (3) SDCLK1(GPIO22),SDCMD1(GPIO23),SDAT10(GPIO24),SDAT11(GPIO25),SDAT12(GPIO26),SDAT13(GPIO27) (4) TXD1(GPIO04),RXD1(GPIO05),TIOCA01(GPIO0A),CTS1(GPIO56),RTS1(GPIO57) (5) TEST,NRES,BMODE1,BMODE0,TCLKA0(GPIO00),TCLKB0(GPIO01),TIOCB00(GPIO02),NCS0(GPIO06),SCL0(G PIO07),SDA0(GPIO08),NCS1(GPIO10),BCK1(GPIO13),LRCK1(GPIO14),DOUT1(GPIO15),NLBEXA0(GPIO16),N RD(GPIO17),MCLK0(GPIO18),BCK0(GPIO19),LRCK0(GPIO1A),DIN0(GPIO1B),DOUT0(GPIO1C),SCK0(GPIO1D ),SDI0(GPIO1E),SDO0(GPIO1F),SDRADDR12(GPIO2A),SCL1(GPIO2B),SDA1(GPIO2C),SDRADDR11(GPIO2D), EXTINT2E(GPIO2E),EXTINT2F(GPIO2F),NWRENWRL(GPIO30),NHBNWRH(GPIO31),EXA1(GPIO32),EXA2(GPI O33),EXA3(GPIO34),EXA4(GPIO35),EXA5(GPIO36),EXA6(GPIO37),EXA7(GPIO38),EXA8(GPIO39),EXA9(GPIO 3A),EXA10(GPIO3B),EXA11(GPIO3C),EXA12(GPIO3D),EXA13(GPIO3E),EXA14(GPIO3F),EXA15(GPIO40),EXA1 6(GPIO41),EXA17(GPIO42),EXA18(GPIO43),EXA19(GPIO44),EXA20(GPIO45),EXD0(GPIO46),EXD1(GPIO47),E XD2(GPIO48),EXD3(GPIO49),EXD4(GPIO4A),EXD5(GPIO4B),EXD6(GPIO4C),EXD7(GPIO4D),EXD8(GPIO4E),E XD9(GPIO4F),EXD10(GPIO50),EXD11(GPIO51),EXD12(GPIO52),EXD13(GPIO53),EXD14(GPIO54),EXD15(GPI O55),SWDCLK(GPIO58),SWDIO(GPIO59),XTALINFO1,XTALINFO0 (6) TIOCA00(GPIO09),TMS(GPIO28),TCK(GPIO29) (7) SCK1(GPIO0D),SDI1(GPIO0E),SDO1(GPIO0F),SWP1(GPIO11),SHOLD1(GPIO12),TIOCB01(GPIO03),TXD2(GPIO 0B),RXD2(GPIO0C) (8) VDET,RTCMODE (9) BACKUPB,KEYINT2,KEYINT1,KEYINT0 (10) TCLKA0(GPIO00),TCLKB0(GPIO01),TIOCB00(GPIO02),SCL0(GPIO07),SDA0(GPIO08),BCK1(GPIO13),LRCK1( GPIO14),DOUT1(GPIO15),MCLK0(GPIO18),BCK0(GPIO19),LRCK0(GPIO1A),DIN0(GPIO1B),DOUT0(GPIO1C),S CK0(GPIO1D),SDI0(GPIO1E),SDO0(GPIO1F),SCL1(GPIO2B),SDA1(GPIO2C),EXTINT2E(GPIO2E),EXTINT2F(G PIO2F),SWDCLK(GPIO58) (11) TXD2(GPIO0B),RXD2(GPIO0C) (12) TMS(GPIO28),TCK(GPIO29) (13) SDRWE,SDRRAS,SDRDQM1,SDRDQM0,SDRDATA9,SDRDATA8,SDRDATA7,SDRDATA6,SDRDATA5,SDRDATA 4,SDRDATA3,SDRDATA2,SDRDATA15,SDRDATA14,SDRDATA13,SDRDATA12,SDRDATA11,SDRDATA10,SDRD ATA1,SDRDATA0,SDRCS,SDRCLK,SDRCKE,SDRCAS,SDRBA1,SDRBA0,SDRADDR9,SDRADDR8,SDRADDR7 ,SDRADDR6,SDRADDR5,SDRADDR4,SDRADDR3,SDRADDR2,SDRADDR10,SDRADDR1,SDRADDR0,NCS0(G PIO06),NCS1(GPIO10),NLBEXA0(GPIO16),NRD(GPIO17),SDRADDR12(GPIO2A),SDRADDR11(GPIO2D),NWRE NWRL(GPIO30),NHBNWRH(GPIO31),EXA1(GPIO32),EXA2(GPIO33),EXA3(GPIO34),EXA4(GPIO35),EXA5(GPI O36),EXA6(GPIO37),EXA7(GPIO38),EXA8(GPIO39),EXA9(GPIO3A),EXA10(GPIO3B),EXA11(GPIO3C),EXA12(G PIO3D),EXA13(GPIO3E),EXA14(GPIO3F),EXA15(GPIO40),EXA16(GPIO41),EXA17(GPIO42),EXA18(GPIO43),E XA19(GPIO44),EXA20(GPIO45),EXD0(GPIO46),EXD1(GPIO47),EXD2(GPIO48),EXD3(GPIO49),EXD4(GPIO4A), EXD5(GPIO4B),EXD6(GPIO4C),EXD7(GPIO4D),EXD8(GPIO4E),EXD9(GPIO4F),EXD10(GPIO50),EXD11(GPIO5 1),EXD12(GPIO52),EXD13(GPIO53),EXD14(GPIO54),EXD15(GPIO55),XTALINFO1,XTALINFO0 (14) BMODE1,BMODE0,SWDIO(GPIO59) (15) TDI(GPIO20),TDO(GPIO21) (16) TIOCB01(GPIO03),SCK1(GPIO0D),SDI1(GPIO0E),SDO1(GPIO0F),SWP1(GPIO11),SHOLD1(GPIO12) (17) SDCMD0,SDCLK0,SDAT03,SDAT02,SDAT01,SDAT00 (18) SDCLK1(GPIO22),SDCMD1(GPIO23),SDAT10(GPIO24),SDAT11(GPIO25),SDAT12(GPIO26),SDAT13(GPIO27) (19) TXD1(GPIO04),RXD1(GPIO05),TIOCA00(GPIO09),TIOCA01(GPIO0A),CTS1(GPIO56),RTS1(GPIO57) (20) RTCINT (21) TDI(GPIO20),TDO(GPIO21) (23) LOUT(used as GPLOUT) (24) ROUT(used as GPROUT) (25) BMODE1,BMODE0 www.onsemi.com 50 LC823450 (26) SDRDATA9,SDRDATA8,SDRDATA7,SDRDATA6,SDRDATA5,SDRDATA4,SDRDATA3,SDRDATA2,SDRDATA15,S DRDATA14,SDRDATA13,SDRDATA12,SDRDATA11,SDRDATA10,SDRDATA1,SDRDATA0,SDCMD0,SDAT03,SDA T02,SDAT01,SDAT00,TCLKA0(GPIO00),TCLKB0(GPIO01),TIOCB00(GPIO02),TIOCB01(GPIO03),TXD1(GPIO04) ,RXD1(GPIO05),SCL0(GPIO07),SDA0(GPIO08),TIOCA00(GPIO09),TIOCA01(GPIO0A),TXD2(GPIO0B),RXD2(GP IO0C),SCK1(GPIO0D),SDI1(QIO0)(GPIO0E),SDO1(QIO1)(GPIO0F),SWP1(QIO2)(GPIO11),SHOLD1(QIO3)(GPIO 12),BCK1(GPIO13),LRCK1(GPIO14),DOUT1(GPIO15),NLBEXA0(GPIO16),NRD(GPIO17),MCLK0(GPIO18),BCK0 (GPIO19),LRCK0(GPIO1A),DIN0(GPIO1B),DOUT0(GPIO1C),SCK0(GPIO1D),SDI0(GPIO1E),SDO0(GPIO1F),TDI (GPIO20),TDO(GPIO21),SDCLK1(GPIO22),SDCMD1(GPIO23),SDAT10(GPIO24),SDAT11(GPIO25),SDAT12(GPI O26),SDAT13(GPIO27),TMS(GPIO28),TCK(GPIO29),SDRADDR12(GPIO2A),SCL1(GPIO2B),SDA1(GPIO2C),SD RADDR11(GPIO2D),EXTINT2E(GPIO2E),EXTINT2F(GPIO2F),NWRENWRL(GPIO30),NHBNWRH(GPIO31),EXA 1(GPIO32),EXA2(GPIO33),EXA3(GPIO34),EXA4(GPIO35),EXA5(GPIO36),EXA6(GPIO37),EXA7(GPIO38),EXA8( GPIO39),EXA9(GPIO3A),EXA10(GPIO3B),EXA11(GPIO3C),EXA12(GPIO3D),EXA13(GPIO3E),EXA14(GPIO3F), EXA15(GPIO40),EXA16(GPIO41),EXA17(GPIO42),EXA18(GPIO43),EXA19(GPIO44),EXA20(GPIO45),EXD0(GPI O46),EXD1(GPIO47),EXD2(GPIO48),EXD3(GPIO49),EXD4(GPIO4A),EXD5(GPIO4B),EXD6(GPIO4C),EXD7(GPI O4D),EXD8(GPIO4E),EXD9(GPIO4F),EXD10(GPIO50),EXD11(GPIO51),EXD12(GPIO52),EXD13(GPIO53),EXD1 4(GPIO54),EXD15(GPIO55),CTS1(GPIO56),RTS1(GPIO57),SWDCLK(GPIO58) (27) KEYINT2,KEYINT1,KEYINT0 (28) SDCMD0,SDAT03,SDAT02,SDAT01,SDAT00,BMODE1,BMODE0,TXD1(GPIO04),RXD1(GPIO05),TIOCA00(GPIO 09),TIOCA01(GPIO0A),SDCLK1(GPIO22),SDCMD1(GPIO23),SDAT10(GPIO24),SDAT11(GPIO25),SDAT12(GPIO 26),SDAT13(GPIO27),CTS1(GPIO56),RTS1(GPIO57) (29) TCLKA0(GPIO00),TCLKB0(GPIO01),TIOCB00(GPIO02),TIOCB01(GPIO03),NCS0(GPIO06),SCL0(GPIO07),SDA0 (GPIO08),TXD2(GPIO0B),RXD2(GPIO0C),SCK1(GPIO0D),SDI1(QIO0)(GPIO0E),SDO1(QIO1)(GPIO0F),NCS1(G PIO10),SWP1(QIO2)(GPIO11),SHOLD1(QIO3)(GPIO12),BCK1(GPIO13),LRCK1(GPIO14),DOUT1(GPIO15),MCL K0(GPIO18),BCK0(GPIO19),LRCK0(GPIO1A),DIN0(GPIO1B),DOUT0(GPIO1C),SCK0(GPIO1D),SDI0(GPIO1E),S DO0(GPIO1F),TDI(GPIO20),TDO(GPIO21),TMS(GPIO28),TCK(GPIO29),SDRADDR12(GPIO2A),SCL1(GPIO2B), SDA1(GPIO2C),SDRADDR11(GPIO2D),EXTINT2E(GPIO2E),EXTINT2F(GPIO2F),SWDCLK(GPIO58),SWDIO(GP IO59),XTALINFO1,XTALINFO0 (30) SDCMD0,SDAT03,SDAT02,SDAT01,SDAT00 (Note) DC characteristics for the pins below are not included VR, VRH, VRL, USBDM, USBDP, USBEXT12, VCNT1, VCNT2, VCNT3, AN0, AN1, AN2, AN3, AN4, AN5, XIN1, XIN32K, XOUT1, XOUT32K, LOUT (Class-D AMP), ROUT (Class-D AMP) www.onsemi.com 51 LC823450 5 Application Diagram AVddPLL2 AVddPLL1 + Vdd1 + VddSD1 VddQSPI VddXT1 AVddUSBPHY2 VddSD0 VddSD2 AVddADC AVddUSBPHY1 Vdd2 OPEN L9 L4 J1 B4 E8 G10 G9N12 N2 H1 A2 A12C11E11M12 N1 N5 L1 L8 E2 D1 B8 D8 D7 E7 A5 E6 C7 C6 D6 C5 A9 B9 C9 K12K11 J10 J11 J12 AVddPLL3 VCNT3 AVssPLL2 VCNT2 AVddPLL2 AVssPLL1 VCNT1 AVddPLL1 AVssUSBPHY AVddUSBPHY2 AVssUSBPHY AVddUSBPHY2 AVssUSBPHY AVddUSBPHY1 B1 F10 AVssUSBPHY C2 TCLKB0/LRCK1/GPIO01/EXTINT01 AVddUSBPHY1 C1 VssXT1 D3 Analog Input VddXT1 D2 AvssADC J6 E3 AVddADC M5 TCLKA0/BCK1/GPIO00/EXTINT00 VddQSPI L6 K6 VddSD2 M6 VddSD1 N6 VddSD0 J7 Vdd2 K7 Vdd2 L7 Vdd2 M7 Vdd2 K8 Vdd2 M8 Digital I/O Vdd2 N8 Vdd2 J8 Vdd2 N9 Vdd1 M9 Vdd1 N10 Vdd1 M10 Vdd1 N11 Vdd1 K9 Vdd1 Vdd1 H8 L10 EXTINT2C/GPIO2C/SDA1 EXTINT2B/GPIO2B/SCL1 NHBNWRH/GPIO31/EXTINT31/TXD0 NCS1/GPIO10/EXTINT10/RXD0 EXTINT2F/GPIO2F NCS0/GPIO06/EXTINT06 EXTINT2E/GPIO2E NRD/GPIO17/EXTINT17 EXTINT2D/GPIO2D/SDRADDR11/DMCKO0 DOUT0/GPIO1C/EXTINT1C/DMCKO0 NWRENWRL/GPIO30/EXTINT30 DIN0/GPIO1B/EXTINT1B/DMDIN0 EXD0/GPIO46/EXTINT46 LRCK0/GPIO1A/EXTINT1A/DMDIN1 SCK1/GPIO0D/EXTINT0D XTALINFO1/GPIOS03 TIOCB01/GPIO03/EXTINT03/DMCKO0/QSCS SDO1(QIO1)/GPIO0F/EXTINT0F BCK0/GPIO19/EXTINT19/DMCKO1 SDI1(QIO0)/GPIO0E/EXTINT0E MCLK0/MCLK1/GPIO18/EXTINT18 LRCK1/GPIO14/EXTINT14 SWP1(QIO2)/GPIO11/EXTINT11 SHOLD1(QIO3)/GPIO12/EXTINT12 BCK1/GPIO13/EXTINT13 TXD2/TIOCA10/GPIO0B/EXTINT0B DOUT1/GPIO15/EXTINT15 RXD2/TIOCA11/GPIO0C/EXTINT0C TIOCB00/GPIO02/EXTINT02/DMDIN0/DIN1 M3 K5 L3 K4 M1 SDAT11/DATA1/GPIO25/EXTINT25 LC823450 WLCSP154 SDAT12/DATA2/GPIO26/EXTINT26 AN5 AN4 AN3 AN2 XOUT32K AN0 SDCLK0 XOUT1 H7 B12 G7 G6 C10 F7 Vdd1 F2 Vdd2 Vdd level detection VddRTC Vdd level detection Digial Output G3 G1 C8 SDCMD0 SDAT00 XIN1 A8 SDAT01 AVddDAMPL,R SDAT02 SDAT03 LOUT/GPLOUT AVssDAMPL AVddDAMPR ROUT/GPROUT EXD7/GPIO4D/EXTINT4D EXD6/GPIO4C/EXTINT4C EXD3/GPIO49/EXTINT49 EXD5/GPIO4B/EXTINT4B EXD4/GPIO4A/EXTINT4A EXD2/GPIO48/EXTINT48 SDI0/GPIO1E/EXTINT1E SWDIO/GPIO59/EXTINT59/DMDIN1 SWDCLK/GPIO58/EXTINT58/DMCKO1 SDO0/GPIO1F/EXTINT1F SCK0/GPIO1D/EXTINT1D SCL0/GPIO07/EXTINT07 SDA0/GPIO08/EXTINT08 EXD1/GPIO47/EXTINT47 XTALINFO0/GPIOS02 Vss Vss Vss Vss Vss Vss Vss Vss Vss Vss Vss Vss Vss Vss NLBEXA0/GPIO16/EXTINT16 BMODE1/GPIOS01 TIOCA00/GPIO09/EXTINT09/SDCLK2/PHI0 BMODE0/GPIOS00 TCK/GPIO29/EXTINT29/SDCD2 NRES TMS/GPIO28/EXTINT28/SDWP2 USBEXT12 RTS1/GPIO57/EXTINT57/SDAT23/TXD0 USBDM CTS1/GPIO56/EXTINT56/SDAT22/RXD0 USBDP TXD1/GPIO04/EXTINT04/SDAT20 F9 Digital I/O D10 TEST RXD1/GPIO05/EXTINT05/SDAT21 D12 E9 AN1 Vdd2 D11 F8 VddRTC H2 F1 VDET H3 RTCMODE F3 Keyint0 F4 Keyint1 E1 Keyint2 G4 RTCINT G2 VssRTC SDAT10/DATA0/GPIO24/EXTINT24 SDCLK1/SCLK/GPIO22/EXTINT22 B7 E10 SDCMD1/BS/GPIO23/EXTINT23 TIOCA01/GPIO0A/EXTINT0A/SDCMD2/PHI1 B5 H9 BACKUPB SDAT13/DATA3/GPIO27/EXTINT27 D- B6 G8 TDO/SDWP1/INS/GPIO21/EXTINT21 AVddDAMPL USB Connector D+ L12 + J5 K10 TDI/SDCD1/SWO/GPIO20/EXTINT20 XIN32K SD Connector J9 M11 N7 L5 N3 M2 K2 H4 D4 D5 B11C12E12H10 L11 N4 M4 K3 L2 J4 H6 K1 J3 H5 J2 G5 F5 E4 A1 B2 C3 B3 A3 F6 C4 E5 A4 A10B10 D9 A11 Digital I/O www.onsemi.com 52 AVssDAMPR G12 H12 + H11 G11 F12 F11 + LC823450 PACKAGE DIMENSIONS unit : mm [LC823450TA-2H] TQFP128 14x14 / TQFP128L CASE 932BA ISSUE A GENERIC MARKING DIAGRAM* XXXXXXXXXXX XXXXXXXXXXX AWLYYWWG A WL YY WW G = Assembly Location = Wafer Lot = Year = Work Week = Pb-Free Package *This information is generic. Please refer to device data sheet for actual part marking. www.onsemi.com 53 LC823450 PACKAGE DIMENSIONS unit : mm [LC823450XATBG, LC823450XBTBG, LC823450XCTBG, LC823450XDTBG] * The diameter of footprint of the solder ball is as follows. Package Code Size of the footprint 0.20 0.22 XA, XB XC, XD WLCSP154, 5.52x5.33 CASE 567LD ISSUE A E A NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. COPLANARITY APPLIES TO SPHERICAL CROWNS OF THE SOLDER BALLS. B PIN A1 REFERENCE BACK COAT DIM A A1 A3 b D E e A3 D A 2X 0.03 C 0.03 C 2X DETAIL A TOP VIEW DETAIL A 0.10 C A RECOMMENDED SOLDERING FOOTPRINT* 0.05 C NOTE 3 A1 MILLIMETERS MIN MAX 0.73 0.18 0.24 0.04 REF 0.23 0.29 5.52 BSC 5.33 BSC 0.40 BSC SIDE VIEW C SEATING PLANE A1 PACKAGE OUTLINE e e/2 N M L K J H G F E D C B A 0.40 PITCH e 154X 0.22 0.20 154X 1 3 5 7 9 11 2 4 6 8 10 12 BOTTOM VIEW b 0.05 C A B 0.03 C 0.40 PITCH DIMENSIONS: MILLIMETERS *For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. www.onsemi.com 54 LC823450 ORDERING INFORMATION Package Shipping (Qty / Packing) LC823450TA-2H Device TQFP128 14x14 / TQFP128L (Pb-Free / Halogen Free) 450 / Tray JEDEC LC823450XATBG WLCSP154, 5.52x5.33 (Pb-Free / Halogen Free) 1000 / Tape & Reel LC823450XBTBG WLCSP154, 5.52x5.33 (Pb-Free / Halogen Free) 1000 / Tape & Reel LC823450XCTBG WLCSP154, 5.52x5.33 (Pb-Free / Halogen Free) 1000 / Tape & Reel LC823450XDTBG WLCSP154, 5.52x5.33 (Pb-Free / Halogen Free) 1000 / Tape & Reel XBGA240 (Under planning) Under planning LC823450RAH-xx (Under planning) † For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. http://www.onsemi.com/pub_link/Collateral/BRD8011-D.PDF ARM, the ARM logo, AMBA, and Cortex are registered trademarks of ARM Limited (or its subsidiaries) in the EU and/or elsewhere. ON Semiconductor and the ON logo are registered trademarks of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries. SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent-Marking.pdf . SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. www.onsemi.com 55