LC898123XC

LC898123XC
CMOS LSI
Optical Image Stabilization (OIS) /
Auto Focus (AF)
Controller & Driver
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Overview
LC898123XC is a system LSI integrating an on-chip 32bit DSP, a Flash
Memory and peripherals including analog circuits for Optical Image
Stabilization (OIS) / Auto Focus (AF) control and H-bridge and constant
current drivers.
WLCSP35 3.39x2.3
Features
 On-chip 32-bit DSP
 Built-in software digital servo filter
 Built-in Gyro filter
 Flash Memory
 12k Byte Flash memory to store data and DSP program
 Motor Driver
 OIS
Constant current linear driver (2ch, Ifull=195mA)
H-bridge driver (2ch, Io max=220mA)
 OP-AF (unidirection)
Constant current linear driver (1ch, Ifull=135mA)
 OP-AF (bidirection)
Constant current linear driver (1ch, Ifull=130mA)
 Package
 WLCSP35 (3.39mm  2.3mm)
 Pb-Free / Halogen Free
 Peripherals
 AD converter
 12bit
 Input 4ch
 Equipped with a sample-hold circuit
 DA converter
 8bit
 Power Supply Voltage
 Output 3ch
 AD/DA/VGA/LDO/OSC : AVDD30=2.6V to 3.6V
 Built-in Serial I/F circuit (2-wire Bus) (1MHz)
 Digital I/O : DVDD30=2.6V to 3.6V
 Built-in Hall Bias circuit
 Driver
: VM=2.6V to 3.6V
 Built-in Hall Amp
 Core Logic : Generation by on-chip LDO
(Gain of Op-amp : 6, 12, 50, 75, 100, 150, 200)
DVDD15=1.5V (typ) output
 Built-in OSC (Oscillator)
 Typ. 41MHz (with Frequency adjustment function)
 Built-in LDO (Low Drop-Out regulator)
 Digital Gyro I/F for various types of gyro (SPI Bus)
ORDERING INFORMATION
See detailed ordering and shipping information on page 12 of this data sheet.
© Semiconductor Components Industries, LLC, 2015
April 2015 - Rev. 2
1
Publication Order Number :
LC898123XC/D
LC898123XC
Block Diagram
EXCLK
8bit DAC
HLXBO
DSPCLK
32bit LPDSP
PRG
HLYBO
CLK
GEN
DATA
ROM
(12kB)
OSC 41MHz
FLASH
(12kB)
SRAM
(12kB)
HLAFBO
ADCLK
PWMCLK
DVDD15
POR
SRAM
(4kB)
LDO
I2CCK
2-wire I/F
Slave
I2CDT
Timer
DGSCLK
OPINPX
OPINMX
DGSSB
SPI
Master
PORT
H ll X
Hall
Host
DGDATA
Digital
Gyro
DGDIN
VGAX
TXD
UART
RXD
OPINPY
EIRQ0
DAC I/F
Hall Y
OPINMY
EIRQ1
OUT1
VGAY
OUT2
OPINPAF
Hall AF
Driver
Control
ADC
C I/F
/
OPINMAF
OUT3
H-Bridge
Driver
VGAAF
OUT4
VCM for
OIS Y
OUT5
AVDD30
AVSS
12bit ADC
DVSS
VCM for
OIS X
OUT6
SW
IOP
MON1
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2
MON2
VM
PGND
VCM for
AF
LC898123XC
Package Dimensions
unit : mm
WLCSP35, 3.39x2.3
CASE 567JG
ISSUE O
E
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. COPLANARITY APPLIES TO SPHERICAL
CROWNS OF SOLDER BALLS.
A B
PIN A1
REFERENCE
DIM
A
A1
b
D
E
e
D
MILLIMETERS
MIN
MAX
0.45
0.03
0.13
0.15
0.25
3.39 BSC
2.30 BSC
0.40 BSC
0.10 C
2X
0.10 C
2X
TOP VIEW
A
0.10 C
A1
0.08 C
C
SIDE VIEW
NOTE 3
RECOMMENDED
SOLDERING FOOTPRINT*
SEATING
PLANE
A1
e
35X
b
0.05 C A B
0.03 C
PACKAGE
OUTLINE
G
F
e
E
0.40
PITCH
D
35X
C
0.20
B
0.40
PITCH
A
DIMENSIONS: MILLIMETERS
1
2
3
4
*For additional information on our Pb - Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
5
BOTTOM VIEW
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LC898123XC
Pin Assignment
Bottom View
5
OUT5
OUT3
4
OUT6
DGDATA DGSSB
3
HLAFBO DGSCLK DVSS
2
HLYBO
HLXBO
1
OPINP
AF
G
OUT4
PGND
OUT2
OUT1
RXD
VM
I2CDT
I2CCK
TXD
NC
EXCLK
DGDIN
EIRQ1
OPINM
AF
OPINMX OPINMY EIRQ0
MON2
OPINPX
OPINPY
AVSS
F
E
D
Driver
VDD/VSS
Internal Digital VDD Output
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AVDD30 DVDD15 MON1
C
B
A
LC898123XC
Pin Description
I/O
Pin Specification
I
O
B
Input
Output
Bidirection
3IC
3IS
3ICUD
3V CMOS Input
3V CMOS Schmitt Input
3V CMOS Input with PullUp/PullDown
P
Power
3ISUD
3ICD
3ISD
3V CMOS Schmitt Input with PullUp/PullDown
3V CMOS Input with PullDown
3V CMOS Schmitt Input with PullDown
3O2
3T2
3OD
3V 2mA Output
3V 2mA TriState Output
3V 2mA Open Drain Output
3IA
3OA
3V Analog Input
3V Analog Output
Z/U/D
H/L
HiZ/PullUp/PullDown
HIGH/LOW
PAD
3IC
PAD
3V CMOS Input
3O2
3V 2mA Output
3T2
3V 2mA
TriState
Output
3OD
3V 2mA
Open Drain
Output
EN
PAD
3IS
3V Schmitt Input
3ICUD
3V CMOS Input
with PullUp/
Pulldown
PAD
PAD CTL
CTL
3ISUD
3V Schmitt Input
with PullUp/
Pulldown
PAD
CTL
CTL
PAD
3ICD
3V CMOS Input
with Pulldown
CTL
PAD
3ISD
3V Schmitt Input
with Pulldow
CTL
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PAD
LC898123XC
Pin
A1
A2
A3
A4
MON1
MON2
EIRQ1
TXD
I/O
B
B
B
B
A5
RXD
B
B1
DVDD15
P
I/O Spec
3ICUD
3T2
3OA
3ICUD
3T2
3OA
3ISUD
3T2
3OA
3ICUD
3ICUD
3T2
3T2
Primary Function
(Debugger Data Input)
(Debugger Data Output)
External IRQ
External Clock Input
UART Data Output
Sub Functions
I2C Data I/O for DAC Monitor
Servo Monitor Analog Out
Internal Signal Monitor
I2C Data I/O for DAC Monitor
Servo Monitor Analog Out
Internal Signal Monitor
I2C Data I/O for DAC Monitor
UART Data Input(RXD)
Internal Signal Monitor
Servo Monitor Analog Input
I2C Data I/O for DAC Monitor
I2C Data for I2C Master
Internal Signal Monitor
I2C Data I/O for DAC Monitor
I2C Clock for I2C Master
Internal Signal Monitor
UART Data Input
Internal LDO Power Output
B2
EIRQ0
B
3ICD
3OD
External IRQ0
B3
DGDIN
B
3ICUD
3T2
Digital Gyro Data Input (4 Wired)
B4
I2CCK
B
3IS
3OD
B5
OUT1
O
C1
AVDD30
P
I2C Clock
OIS Driver Output
(H-Bridge or Linear)
Analog Power (2.6 to 3.6V)
C2
OPINMY
I
3OA
3IA
OIS Hall Y Opamp Input Minus
External Clock Input
External IRQ1
I2C Data
OIS Driver Output
(H-Bridge or Linear)
Analog GND
Init
Z
Z
Z
Z
Z
-
I2C Data I/O for DAC Monitor
UART Data Output(TXD)
Internal Signal Monitor
I2C Data I/O for DAC Monitor
Internal Signal Monitor
Z
U
Z
-
I2C Data I/O for DAC Monitor
Internal Signal Monitor
C3
EXCLK
B
3ISD
3OD
C4
I2CDT
B
3IS
3OD
C5
OUT2
O
D1
AVSS
P
D2
OPINMX
I
D3
NC
DVSS
D4
VM
P
Driver Power (2.6V to 3.6V)
-
D5
PGND
P
Driver GND
-
3OA
3IA
Z
Z
-
OIS Hall X Opamp Input Minus
-
-
No Connection
-
P
Logic GND
-
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LC898123XC
Pin
E1
OPINPY
E2
E3
I/O
I/O Spec
I
3IA
OPINMAF
I
3IA
DVSS
P
Primary Function
Sub Functions
OIS Hall Y Opamp Input Plus
-
AF Hall OpAmp Input Minus
-
Logic GND
3ICUD
3T2
Init
-
Digital Gyro I/F Chip Select Input
Digital Gyro I/F Chip Select Output
OIS Driver Output
(H-Bridge or Linear)
OIS Hall X Opamp Input Plus
Digital Gyro I/F Chip Select Output
Internal Signal Monitor
E4
DGSSB
B
E5
OUT4
O
F1
OPINPX
I
F2
HLXBO
O
F3
DGSCLK
B
F4
DGDATA
B
F5
OUT3
O
G1
OPINPAF
I
G2
HLYBO
O
3OA
OIS Hall Y Bias Output
-
G3
HLAFBO
O
3OA
AF Hall Bias Output
-
G4
OUT6
O
3OA
AF Driver Output(H-Bridge,Linear)
-
G5
OUT5
O
3OA
AF Driver Output(H-Bridge,Linear)
-
3OA
3IA
3OA
OIS Hall X Bias Output
3ICUD
3T2
Digital Gyro I/F Clock Input
Digital Gyro I/F Clock Output
3ICUD
3T2
3OA
3IA
Digital Gyro Data I/F Output
(4 Wired)
OIS Driver Output
(H-Bridge or Linear)
AF Hall Opamp Input Plus
Digital Gyro Clock Output
Internal Signal Monitor
Digital Gyro I/F Data I/O (3 Wired)
Internal Signal Monitor
Sub Functions
Function B
Function C
DGSSB, DGSCLK: CmMstMode selects A1 or A2.
EXCLK, EIRQ1: CmExtClkSel selects A1 or A2.
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U
-
One of Function A,B,C… can be selected by
CmIOPN [N=0,1,2,…10] register.
Primary Function
Function A1
Function A2
U
-
[How to select the function]
The initial function right after reset is set to be “Function A1” in the below table.
You can change the function by CmIOPN, CmMstMode, CmExtClkSel.
PINNAME
U
LC898123XC
Electrical Characteristics
Logic
Absolute Maximum Rating at VSS=0V
Parameter
Power supply voltage
Input/Output voltage
Symbol
Conditions
VAD30 max
VAI30, VAO30
Ta ≤ 25C
Ratings
0.3 to 4.6
Unit
V
Ta ≤ 25C
0.3 to VAD30+0.3
V
VDI30, VDO30
Ta ≤ 25C
0.3 to VDD30+0.3
V
Storage temperature
Tstg
55 to 125
C
Operating temperature
Topr
30 to 85
C
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed,
damage may occur and reliability may be affected.
Allowable Operating Ratings at Ta=30 to 85C, VSS=0V
3.0V Power Supply (AVDD30)
Parameter
Power supply voltage
Input voltage range
Symbol
Min
Typ
Max
Unit
VAD30
VIN
2.6
3.0
3.6
V
0
-
3.6
V
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond the Recommended
Operating Ranges limits may affect device reliability.
D.C. Characteristics at Input/Output VSS= 0V, AVDD=2.6 to 3.6V, Ta =30 to 85C
Parameter
Symbol
High-level input voltage
VIH
Low-level input voltage
VIL
High-level input voltage
VIH
Low-level input voltage
High-level output
voltage
Low-level output
voltage
Low-level output
voltage
Analog input voltage
Conditions
Min
CMOS
schmitt
1.48
Typ
Max
Unit
CMOS
supported
1.40
VIL
VOH
IOH=2mA
VOL
IOL= 2mA
0.4
V
VOL
IOL= 2mA
0.2
V
3OD
3IA
V
0.37
V
0.51
V
AVDD30
0.4
Applicable I/O
3IS, 3ISUD, 3ISD
3IC, 3ICUD, 3ICD
V
3O2, 3T2
VAI
AVSS
AVDD30
V
PullUp resistor
Rup
50
200
KΩ
PullDown resistor
Rdn
50
220
KΩ
3ICUD, 3ISUD
3ICUD, 3ISUD,
3ISD, 3ICD
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be
indicated by the Electrical Characteristics if operated under different conditions.
Non-volatile Memory Characteristics
Parameter
Endurance
Data retention
Symbol
EN
RT
Condition
Min
10
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8
Typ
Max
1000
Unit
Cycles
Years
LC898123XC
Driver
Absolute Maximum Ratings
Parameter
Power supply voltage
Output peak current
Output continuous
current
Symbol
Condition
Ratings
VM max
Iopeak
Iomax
OUT1 to 4
T ≤ 10ms,
ON-duty ≤ 20%
OUT5, OUT6
t ≤ 10ms,
ON-duty ≤ 20%
OUT1 to 4
OUT5, OUT6
Symbol
4.6
V
300
mA
200
mA
220
mA
150
mA
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed,
damage may occur and reliability may be affected.
Allowable Operating Range
Parameter
Symbol
Condition
Ratings
Symbol
Ambient temperature
Topg
30 to +85
C
Power supply voltage
VM
2.6 to 3.6
V
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond the Recommended
Operating Ranges limits may affect device reliability.
H-Bridge Driver Output Characteristics at Ta=25C, AVDD30=VM=3.0V
Parameter
Output ON resistance
OUT1 to OUT4
Output ON resistance
OUT5, OUT6
Symbol
Condition
Ratings (Ω)
Symbol
Ronu
Io=220mA (Pch)
1.1
Ω
Rond
Io=220mA (Nch)
1.3(*)
Ω
Ronu
Io=150mA (Pch)
1.5
Ω
Rond
Io=150mA (Nch)
1.4(*)
Ω
(*) include Constant current detect resistance
Constant Current Driver Output at Ta=25C, AVDD30=VM=2.8V
Parameter
Output Current
OUT1 to OUT4
Output Current
OUT5, OUT6
Compliance Voltage
OUT1 to OUT4
Compliance Voltage
OUT5,OUT6
Symbol
Ifull
Vcomp
Condition
OIS_DA[10:0]=7FFh
OIS_DB[10:0]=7FFh
OP-AF(unidirection)
AF_D[9:0]=3FFh
OP-AF(bidirection)
AF_D[9:0]=3FFh
OP-AF(unidirection)
OP-AF(bidirection)
Min
Typ
Max
Unit
175.5
195.0
214.5
mA
121.5
135.0
148.5
mA
117.0
130.0
143.0
mA
0.4
V
0.4
0.5
V
V
Total output current is less than 500mA.
OP-AF(unidirection)
VCM registance (Rvcm) = (VMVcomp)/Io [Ω]
OP-AF(bidirection)/OIS
VCM registance (Rvcm) = (VM(RonuIo+Vcomp))/Io [Ω]
Output ON resistance (Ron) = VM/Io – Rvcm [Ω]
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be
indicated by the Electrical Characteristics if operated under different conditions.
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LC898123XC
AC Characteristics
Power Sequence
Item
Symbol
Rise time
tR
Wait time
tW
Bottom Voltage
Min
Typ
Max
Units
5
ms
100
Vbot
ms
0.2
V
Don’t care about injection order between AVDD30 and VM.
I2CDT, I2CCK, EXCLK and EIRQ0 tolerate 3V input at the time of power off.
The data in the flash memory may be destroyed if you do not keep specifications.
And it is forbidden to power off during flash access. The data in the flash memory may be destroyed.
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10
LC898123XC
2-wire serial Interface Timing
The communication protocol is compatible with I2C (Fast mode Plus). This circuit has clock stretch function.
I2C interface timing definition
Item
SCL clock frequency
START condition
hold time
SCL clock
Low period
SCL clock
High period
Setup time for repetition
START condition
Symbol
Pin
name
Fscl
I2CCK
tHD,STA
I2CCK
I2CDT
0.26
s
tLOW
I2CCK
0.5
s
tHIGH
I2CCK
0.26
s
0.26
s
tSU,STA
Data hold time
tHD,DAT
Data setup time
tSU,DAT
SDA, SCL
rising time
SDA, SCL
falling time
STOP condition setup time
Bus free time between STOP
and START
tr
tf
tSU,STO
tBUF
I2CCK
I2CDT
I2CCK
I2CDT
I2CCK
I2CDT
I2CCK
I2CDT
I2CCK
I2CDT
I2CCK
I2CDT
I2CCK
I2CDT
Min
0 (*1)
Typ
Max
Units
1000
kHz
0.9
50
s
ns
120
ns
120
ns
0.26
s
0.5
s
(*1) Although the I2C specification defines a condition that 300 ns of hold time is required internally, LC898123 is
designed for a condition with typ. 100 ns of hold time. If SDA signal is unstable around falling point of SCL signal,
please implement an appropriate treatment on board, such as inserting a resistor.
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LC898123XC
ORDERING INFORMATION
Device
LC898123XC-VH
Package
Shipping (Qty / Packing)
WLCSP35, 3.39x2.3
(Pb-Free / Halogen Free)
4000 / Tape & Reel
† For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel
Packaging Specifications Brochure, BRD8011/D. http://www.onsemi.com/pub_link/Collateral/BRD8011-D.PDF
ON Semiconductor and the ON logo are registered trademarks of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States
and/or other countries. SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of
SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent-Marking.pdf . SCILLC reserves the right to make changes without
further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose,
nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including
without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can
and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each
customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are
not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or
sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers,
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directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was
negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all
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