ESD7C, SZESD7C SERIES Transient Voltage Suppressors Micro−Packaged Diodes for ESD Protection The ESD7CxxD Series is designed to protect voltage sensitive components from ESD. Excellent clamping capability, low leakage, and fast response time make these parts ideal for ESD protection on designs where board space is at a premium. Because of its small size, it is suited for use in cellular phones, portable devices, digital cameras, power supplies and many other portable applications. Specification Features: http://onsemi.com PIN 1. CATHODE 2. CATHODE 3. ANODE 1 3 2 • Low Capacitance 6.2 pF to 13 pF • Low Clamping Voltage • Small Body Outline Dimensions: • • • • • • • • MARKING DIAGRAM 0.047″ x 0.047″ (1.20 mm x 1.20 mm) Low Body Height: 0.020″ (0.5 mm) Stand−off Voltage: 3.3 V, 5 V Low Leakage Response Time < 1 ns ESD Rating of Class 3 (> 16 kV) per Human Body Model IEC61000−4−2 Level 4 ESD Protection SZ Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q101 Qualified and PPAP Capable These are Pb−Free Devices Epoxy Meets UL 94 V−0 LEAD FINISH: 100% Matte Sn (Tin) MOUNTING POSITION: Any QUALIFIED MAX REFLOW TEMPERATURE: 260°C MAXIMUM RATINGS IEC 61000−4−2 (ESD) Contact Air Value Unit ±8.0 ±15 kV 240 1.9 525 mW mW/°C °C/W Total Power Dissipation on FR−5 Board (Note 1) @ TA = 25°C Derate above 25°C Thermal Resistance Junction−to−Ambient RqJA Junction and Storage Temperature Range TJ, Tstg −55 to +150 °C TL 260 °C Lead Solder Temperature − Maximum (10 Second Duration) ⎪ PD = Specific Device Code = Date Code *Date Code orientation and/or position may vary depending upon manufacturing location. ORDERING INFORMATION Package Shipping† ESD7CxxDT5G SOT−723 (Pb−Free) 8000 / Tape & Reel SZESD7CxxDT5G SOT−723 (Pb−Free) 8000 / Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. Device Meets MSL 1 Requirements Symbol L5 M 1 Device Mechanical Characteristics: CASE: Void-free, transfer-molded, thermosetting plastic Rating L5 M SOT−723 CASE 631AA DEVICE MARKING INFORMATION See specific marking information in the device marking column of the table on page 2 of this data sheet. Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. FR−5 = 1.0 x 0.75 x 0.62 in. See Application Note AND8308/D for further description of survivability specs. © Semiconductor Components Industries, LLC, 2012 March, 2012 − Rev. 3 1 Publication Order Number: ESD7C3.3D/D ESD7C, SZESD7C SERIES ELECTRICAL CHARACTERISTICS I (TA = 25°C unless otherwise noted) Symbol IF Parameter IPP Maximum Reverse Peak Pulse Current VC Clamping Voltage @ IPP VRWM IR VBR Working Peak Reverse Voltage Breakdown Voltage @ IT IT Test Current IF Forward Current VF Forward Voltage @ IF Ppk Peak Power Dissipation C VC VBR VRWM Maximum Reverse Leakage Current @ VRWM V IR VF IT IPP Max. Capacitance @VR = 0 and f = 1 MHz *See Application Note AND8308/D for detailed explanations of datasheet parameters. Uni−Directional TVS ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted, VF = 1.1 V Max. @ IF = 10 mA) VRWM (V) IR (mA) @ VRWM VBR (V) @ IT (Note 3) IT C (pF) (Note 4) C (pF) (Note 4) VC Per IEC61000−4−2 (Note 5) Device (Note 2) Device Marking Max Max Min mA Typ Max ESD7C3.3DT5G L5 3.3 1.0 5.0 1.0 12 13 ESD7C5.0DT5G L4 5.0 0.5 11 1.0 6.0 6.2 2. 3. 4. 5. 6. Figures 1 and 2 See Below (Note 6) Include SZ−prefix devices where applicable. VBR is measured with a pulse test current IT at an ambient temperature of 25°C. Capacitance of one diode at f = 1 MHz, VR = 0 V, TA = 25°C. For test procedure see Figures 3 and 4 and Application Note AND8307/D. ESD7C5.0DT5G shown below. Other voltages available upon request. Figure 1. ESD Clamping Voltage Screenshot Positive 8 kV Contact per IEC61000−4−2 Figure 2. ESD Clamping Voltage Screenshot Negative 8 kV Contact per IEC61000−4−2 http://onsemi.com 2 ESD7C, SZESD7C SERIES IEC61000−4−2 Waveform IEC 61000−4−2 Spec. Ipeak Level Test Voltage (kV) First Peak Current (A) Current at 30 ns (A) Current at 60 ns (A) 1 2 7.5 4 2 2 4 15 8 4 3 6 22.5 12 6 4 8 30 16 8 100% 90% I @ 30 ns I @ 60 ns 10% tP = 0.7 ns to 1 ns Figure 3. IEC61000−4−2 Spec ESD Gun Oscilloscope TVS 50 W Cable 50 W Figure 4. Diagram of ESD Test Setup The following is taken from Application Note AND8308/D − Interpretation of Datasheet Parameters for ESD Devices. systems such as cell phones or laptop computers it is not clearly defined in the spec how to specify a clamping voltage at the device level. ON Semiconductor has developed a way to examine the entire voltage waveform across the ESD protection diode over the time domain of an ESD pulse in the form of an oscilloscope screenshot, which can be found on the datasheets for all ESD protection diodes. For more information on how ON Semiconductor creates these screenshots and how to interpret them please refer to AND8307/D. ESD Voltage Clamping For sensitive circuit elements it is important to limit the voltage that an IC will be exposed to during an ESD event to as low a voltage as possible. The ESD clamping voltage is the voltage drop across the ESD protection diode during an ESD event per the IEC61000−4−2 waveform. Since the IEC61000−4−2 was written as a pass/fail spec for larger http://onsemi.com 3 ESD7C, SZESD7C SERIES PACKAGE DIMENSIONS SOT−723 CASE 631AA ISSUE D NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL. 4. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. −X− D b1 A −Y− 3 E 1 2X HE 2 2X e b C 0.08 X Y SIDE VIEW TOP VIEW 3X 1 3X DIM A b b1 C D E e HE L L2 L MILLIMETERS MIN NOM MAX 0.45 0.50 0.55 0.15 0.21 0.27 0.25 0.31 0.37 0.07 0.12 0.17 1.15 1.20 1.25 0.75 0.80 0.85 0.40 BSC 1.15 1.20 1.25 0.29 REF 0.15 0.20 0.25 L2 BOTTOM VIEW RECOMMENDED SOLDERING FOOTPRINT* 2X 0.40 2X 0.27 PACKAGE OUTLINE 1.50 3X 0.52 0.36 DIMENSIONS: MILLIMETERS *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. 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