EMD5DXV6 D

EMD5DXV6T5G
Dual Bias Resistor
Transistors
NPN and PNP Silicon Surface Mount
Transistors with Monolithic Bias
Resistor Network
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(3)
The BRT (Bias Resistor Transistor) contains a single transistor with
a monolithic bias network consisting of two resistors; a series base
resistor and a base−emitter resistor. These digital transistors are
designed to replace a single device and its external resistor bias
network. The BRT eliminates these individual components by
integrating them into a single device. In the EMD5DXV6 series, two
complementary BRT devices are housed in the SOT−563 package
which is ideal for low power surface mount applications where board
space is at a premium.
(2)
R1
R2
Q1
Q2
R2
R1
(4)
(5)
6
(6)
54
Features
•
•
•
•
•
•
(1)
1
Simplifies Circuit Design
Reduces Board Space
Reduces Component Count
Available in 8 mm, 7 inch Tape and Reel
Lead Free Solder Plating
These Devices are Pb−Free and are RoHS Compliant
2
3
SOT−563
CASE 463A
MARKING DIAGRAM
1
U5 MG
G
U5 = Specific Device Code
M = Month Code
G
= Pb−Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
Device
EMD5DXV6T5G
Package
Shipping†
SOT−563
(Pb−Free)
8000 / Tape &
Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2014
August, 2014 − Rev. 1
1
Publication Order Number:
EMD5DXV6/D
EMD5DXV6T5G
MAXIMUM RATINGS (TA = 25°C unless otherwise noted, common for Q1 and Q2, − minus sign for Q1 (PNP) omitted)
Rating
Symbol
Value
Unit
Collector-Base Voltage
VCBO
50
Vdc
Collector-Emitter Voltage
VCEO
50
Vdc
IC
100
mAdc
Symbol
Max
Unit
PD
357
(Note 1)
2.9
(Note 1)
mW
Collector Current
THERMAL CHARACTERISTICS
Characteristic
(One Junction Heated)
Total Device Dissipation
TA = 25°C
Derate above 25°C
Thermal Resistance
Junction-to-Ambient
Characteristic
(Both Junctions Heated)
Total Device Dissipation
TA = 25°C
RqJA
350
(Note 1)
°C/W
Symbol
Max
Unit
PD
500
(Note 1)
4.0
(Note 1)
mW
Derate above 25°C
Thermal Resistance
Junction-to-Ambient
Junction and Storage Temperature
mW/°C
mW/°C
RqJA
250
(Note 1)
°C/W
TJ, Tstg
−55 to
+150
°C
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. FR−4 @ Minimum Pad
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2
EMD5DXV6T5G
ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted)
Symbol
Min
Typ
Max
Unit
Collector-Base Cutoff Current (VCB = 50 V, IE = 0)
ICBO
−
−
100
nAdc
Collector-Emitter Cutoff Current (VCB = 50 V, IB = 0)
ICEO
−
−
500
nAdc
Emitter-Base Cutoff Current (VEB = 6.0, IC = 5.0 mA)
IEBO
−
−
1.0
mAdc
Collector-Base Breakdown Voltage (IC = 10 mA, IE = 0)
V(BR)CBO
50
−
−
Vdc
Collector-Emitter Breakdown Voltage (IC = 2.0 mA, IB = 0)
V(BR)CEO
50
−
−
Vdc
hFE
20
35
−
VCE(SAT)
−
−
0.25
Vdc
Output Voltage (on) (VCC = 5.0 V, VB = 2.5 V, RL = 1.0 kW)
VOL
−
−
0.2
Vdc
Output Voltage (off) (VCC = 5.0 V, VB = 0.5 V, RL = 1.0 kW)
Characteristic
Q1 TRANSISTOR: PNP
OFF CHARACTERISTICS
ON CHARACTERISTICS
DC Current Gain (VCE = 10 V, IC = 5.0 mA)
Collector−Emitter Saturation Voltage (IC = 10 mA, IB = 0.3 mA)
VOH
4.9
−
−
Vdc
Input Resistor
R1
3.3
4.7
6.1
kW
Resistor Ratio
R1/R2
0.38
0.47
0.56
Collector-Base Cutoff Current (VCB = 50 V, IE = 0)
ICBO
−
−
100
nAdc
Collector-Emitter Cutoff Current (VCB = 50 V, IB = 0)
ICEO
−
−
500
nAdc
Emitter-Base Cutoff Current (VEB = 6.0, IC = 5.0 mA)
IEBO
−
−
0.1
mAdc
Collector-Base Breakdown Voltage (IC = 10 mA, IE = 0)
V(BR)CBO
50
−
−
Vdc
Collector-Emitter Breakdown Voltage (IC = 2.0 mA, IB = 0)
V(BR)CEO
50
−
−
Vdc
hFE
80
140
−
VCE(SAT)
−
−
0.25
Vdc
Output Voltage (on) (VCC = 5.0 V, VB = 2.5 V, RL = 1.0 kW)
VOL
−
−
0.2
Vdc
Output Voltage (off) (VCC = 5.0 V, VB = 0.5 V, RL = 1.0 kW)
VOH
4.9
−
−
Vdc
Input Resistor
R1
33
47
61
kW
Resistor Ratio
R1/R2
0.8
1.0
1.2
Q2 TRANSISTOR: NPN
OFF CHARACTERISTICS
ON CHARACTERISTICS
DC Current Gain (VCE = 10 V, IC = 5.0 mA)
Collector−Emitter Saturation Voltage (IC = 10 mA, IB = 0.3 mA)
PD , POWER DISSIPATION (MILLIWATTS)
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
250
200
150
100
50
0
-50
RqJA = 833°C/W
0
50
100
TA, AMBIENT TEMPERATURE (°C)
Figure 1. Derating Curve
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3
150
EMD5DXV6T5G
1000
1
VCE = 10 V
IC/IB = 10
TA=75°C
25°C
0.1
0.01
TA=75°C
hFE, DC CURRENT GAIN
VCE(sat) , MAXIMUM COLLECTOR VOLTAGE (VOLTS)
TYPICAL ELECTRICAL CHARACTERISTICS — EMD5DXV6 PNP TRANSISTOR
-25°C
10
20
30
50
40
60
100
IC, COLLECTOR CURRENT (mA)
Figure 2. VCE(sat) versus IC
Figure 3. DC Current Gain
1000
100
IC, COLLECTOR CURRENT (mA)
f = 1 MHz
IE = 0 mA
TA = 25°C
10
Cob , CAPACITANCE (pF)
10
1
IC, COLLECTOR CURRENT (mA)
12
8
6
4
SERIES 1
2
0
-25°C
10
1
0
25°C
100
75°C
10
1
VO = 5 V
0.1
0.01
0
5
15
25
35
10
20
30
VR, REVERSE BIAS VOLTAGE (VOLTS)
40
45
TA=-25°C
25°C
0
Figure 4. Output Capacitance
2
4
6
8
Vin, INPUT VOLTAGE (VOLTS)
10
Figure 5. Output Current versus Input Voltage
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4
12
EMD5DXV6T5G
10
1000
VCE = 10 V
IC/IB = 10
hFE, DC CURRENT GAIN
VCE(sat) , MAXIMUM COLLECTOR VOLTAGE (VOLTS)
TYPICAL ELECTRICAL CHARACTERISTICS — EMD5DXV6 NPN TRANSISTOR
1
25°C
TA=-25°C
75°C
0.1
TA=75°C
25°C
-25°C
100
0.01
0
10
50
20
40
IC, COLLECTOR CURRENT (mA)
10
IC, COLLECTOR CURRENT (mA)
1
Figure 6. VCE(sat) versus IC
Figure 7. DC Current Gain
1
100
f = 1 MHz
IE = 0 mA
TA = 25°C
IC, COLLECTOR CURRENT (mA)
0.4
0.2
0
0
25°C
75°C
0.6
TA=-25°C
10
1
0.1
0.01
VO = 5 V
0.001
50
10
20
30
40
VR, REVERSE BIAS VOLTAGE (VOLTS)
0
Figure 8. Output Capacitance
2
4
6
Vin, INPUT VOLTAGE (VOLTS)
VO = 0.2 V
TA=-25°C
10
25°C
75°C
1
0.1
0
10
8
Figure 9. Output Current versus Input Voltage
100
V in , INPUT VOLTAGE (VOLTS)
Cob , CAPACITANCE (pF)
0.8
100
20
30
40
50
IC, COLLECTOR CURRENT (mA)
Figure 10. Input Voltage versus Output Current
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5
10
EMD5DXV6T5G
PACKAGE DIMENSIONS
SOT−563, 6 LEAD
CASE 463A
ISSUE F
D
−X−
6
5
1
2
A
L
4
E
−Y−
3
b
e
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETERS
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD
FINISH THICKNESS. MINIMUM LEAD THICKNESS
IS THE MINIMUM THICKNESS OF BASE MATERIAL.
DIM
A
b
C
D
E
e
L
HE
HE
C
5 PL
6
0.08 (0.003)
M
X Y
MILLIMETERS
MIN
NOM MAX
0.50
0.55
0.60
0.17
0.22
0.27
0.08
0.12
0.18
1.50
1.60
1.70
1.10
1.20
1.30
0.5 BSC
0.10
0.20
0.30
1.50
1.60
1.70
INCHES
NOM MAX
0.021 0.023
0.009 0.011
0.005 0.007
0.062 0.066
0.047 0.051
0.02 BSC
0.004 0.008 0.012
0.059 0.062 0.066
MIN
0.020
0.007
0.003
0.059
0.043
SOLDERING FOOTPRINT*
0.3
0.0118
0.45
0.0177
1.35
0.0531
1.0
0.0394
0.5
0.5
0.0197 0.0197
SCALE 20:1
mm Ǔ
ǒinches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and the
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SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed
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or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and
specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets
and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each
customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended,
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For additional information, please contact your local
Sales Representative
EMD5DXV6/D