NLSV1T240 D

NLSV1T240
1-Bit Dual-Supply Inverting
Level Translator
The NLSV1T240 is a 1−bit configurable dual−supply voltage level
translator. The input An and output Bn ports are designed to track two
different power supply rails, VCCA and VCCB respectively. Both
supply rails are configurable from 0.9 V to 4.5 V allowing universal
low−voltage translation from the input An to the output Bn port.
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MARKING
DIAGRAM
Features
•
•
•
•
•
•
•
•
•
Wide VCCA and VCCB Operating Range: 0.9 V to 4.5 V
High−Speed w/ Balanced Propagation Delay
Inputs and Outputs have OVT Protection to 4.5 V
Non−preferential VCCA and VCCB Sequencing
Outputs at 3−State until Active VCC is Reached
Power−Off Protection
Outputs Switch to 3−State with VCCB at GND
Ultra−Small Packaging: 1.2 mm x 1.0 mm UDFN6
This is a Pb−Free Device
UDFN6
MU SUFFIX
CASE 517AA
3
M
G
= Specific Device Code
= Date Code
= Pb−Free Package
PIN ASSIGNMENT
Typical Applications
• Mobile Phones, PDAs, Other Portable Devices
Important Information
• ESD Protection for All Pins:
VCCA
1
6
VCCB
A
2
5
B
GND
3
4
OE
Human Body Model (HBM) > 2000 V
VCCA
(Top View)
VCCB
ORDERING INFORMATION
B
A
Device
NLSV1T240MUTBG
OE
February, 2012 − Rev. 4
Package
Shipping†
UDFN6 3000/Tape & Reel
(Pb−Free)
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
Figure 1. Logic Diagram
© Semiconductor Components Industries, LLC, 2012
3M
G
1
1
Publication Order Number:
NLSV1T240/D
NLSV1T240
PIN ASSIGNMENT
TRUTH TABLE
PIN
FUNCTION
VCCA
Input Port DC Power Supply
VCCB
Output Port DC Power Supply
GND
Ground
A
Input Port
B
Output Port
OE
Output Enable
Inputs
Outputs
OE
A
B
L
L
H
L
H
L
H
X
3−State
MAXIMUM RATINGS
Symbol
VCCA, VCCB
VI
VC
VO
Rating
Value
DC Supply Voltage
Condition
Unit
−0.5 to +5.5
V
A
−0.5 to +5.5
V
OE
−0.5 to +5.5
V
(Power Down)
B
−0.5 to +5.5
(Active Mode)
B
−0.5 to +5.5
V
(Tri−State Mode)
B
−0.5 to +5.5
V
DC Input Voltage
Control Input
DC Output Voltage
VCCA = VCCB = 0
V
IIK
DC Input Diode Current
−20
VI < GND
mA
IOK
DC Output Diode Current
−50
VO < GND
mA
IO
DC Output Source/Sink Current
±50
mA
ICCA, ICCB
DC Supply Current Per Supply Pin
±100
mA
IGND
DC Ground Current per Ground Pin
±100
mA
TSTG
Storage Temperature
−65 to +150
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
RECOMMENDED OPERATING CONDITIONS
Symbol
VCCA, VCCB
Parameter
Bus Input Voltage
VC
Control Input
VIO
Bus Output Voltage
Dt / DV
Max
Unit
0.9
4.5
V
GND
4.5
V
OE
GND
4.5
V
B
GND
4.5
V
(Active Mode)
B
GND
VCCB
V
(Tri−State Mode)
B
GND
4.5
V
−40
+85
°C
0
10
nS
Positive DC Supply Voltage
VI
TA
Min
(Power Down Mode)
Operating Temperature Range
Input Transition Rise or Rate
VI, from 30% to 70% of VCC; VCC = 3.3 V ±0.3 V
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2
NLSV1T240
DC ELECTRICAL CHARACTERISTICS
−405C to +855C
Symbol
VIH
VIL
VOH
Parameter
Test Conditions
Input HIGH Voltage
(A, OE)
Input LOW Voltage
(A, OE)
Output HIGH Voltage
Min
Max
Unit
3.6 – 4.5
0.9 – 4.5
V
2.2
−
2.7 – 3.6
2.0
−
2.3 – 2.7
1.6
−
1.4 − 2.3
0.65 * VCCA
−
0.9 – 1.4
0.9 * VCCA
−
0.9 – 4.5
−
0.8
2.7 – 3.6
−
0.8
2.3 – 2.7
−
0.7
1.4 − 2.3
−
0.35 * VCCA
0.9 – 1.4
−
0.1 * VCCA
IOH = −100 mA; VI = VIL
0.9 – 4.5
0.9 – 4.5
VCCB – 0.2
−
IOH = −0.5 mA; VI = VIL
0.9
0.9
0.75 * VCCB
−
IOH = −2 mA; VI = VIL
1.4
1.4
1.05
−
IOH = −6 mA; VI = VIL
1.65
1.65
1.25
−
2.3
2.3
2.0
−
2.3
2.3
1.8
−
2.7
2.7
2.2
−
2.3
2.3
1.7
−
IOH = −18 mA; VI = VIL
Output LOW Voltage
VCCB (V)
3.6 – 4.5
IOH = −12 mA; VI = VIL
VOL
VCCA (V)
3.0
3.0
2.4
−
IOH = −24 mA; VI = VIL
3.0
3.0
2.2
−
IOL = 100 mA; VI = VIH
0.9 – 4.5
0.9 – 4.5
−
0.2
IOL = 0.5 mA; VI = VIH
1.1
1.1
−
0.3
IOL = 2 mA; VI = VIH
1.4
1.4
−
0.35
IOL = 6 mA; VI = VIH
1.65
1.65
−
0.3
IOL = 12 mA; VI = VIH
2.3
2.3
−
0.4
2.7
2.7
−
0.4
2.3
2.3
−
0.6
3.0
3.0
−
0.4
IOL = 18 mA; VI = VIH
IOL = 24 mA; VI = VIH
V
V
V
3.0
3.0
−
0.55
Input Leakage Current
VI = VCCA or GND
0.9 – 4.5
0.9 – 4.5
−1.0
1.0
mA
IOFF
Power−Off Leakage Current
OE = 0 V
0
0.9 – 4.5
0.9 – 4.5
0
−1.0
−1.0
1.0
1.0
mA
ICCA
Quiescent Supply Current
VI = VCCA or GND;
IO = 0, VCCA = VCCB
0.9 – 4.5
0.9 − 4.5
−
1.0
mA
ICCB
Quiescent Supply Current
VI = VCCA or GND;
IO = 0, VCCA = VCCB
0.9 – 4.5
0.9 − 4.5
−
1.0
mA
ICCA + ICCB Quiescent Supply Current
VI = VCCA or GND;
IO = 0, VCCA = VCCB
0.9 – 4.5
0.9 – 4.5
−
2.0
mA
II
DICCA
Increase in ICC per Input Voltage,
Other Inputs at VCCA or GND
VI = VCCA – 0.6 V;
VI = VCCA or GND
4.5
3.6
4.5
3.6
−
10
5.0
mA
DICCB
Increase in ICC per Input Voltage,
Other Inputs at VCCA or GND
VI = VCCA – 0.6 V;
VI = VCCA or GND
4.5
3.6
4.5
3.6
−
10
5.0
mA
I/O Tri−State Output Leakage
Current
TA = 25°C, OE = 0 V
0.9 – 4.5
0.9 – 4.5
−1.0
1.0
mA
IOZ
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3
NLSV1T240
TOTAL STATIC POWER CONSUMPTION (ICCA + ICCB)
−405C to +855C
VCCB (V)
4.5
VCCA (V)
Min
3.3
Max
Min
2.8
Max
Min
1.8
Max
Min
0.9
Max
Min
Max
Unit
4.5
2
2
2
2
< 1.5
mA
3.3
2
2
2
2
< 1.5
mA
2.8
<2
<1
<1
< 0.5
< 0.5
mA
1.8
<1
<1
< 0.5
< 0.5
< 0.5
mA
0.9
< 0.5
< 0.5
< 0.5
< 0.5
< 0.5
mA
NOTE:
Connect ground before applying supply voltage VCCA or VCCB. This device is designed with the feature that the power−up
sequence of VCCA and VCCB will not damage the IC.
AC ELECTRICAL CHARACTERISTICS
−405C to +855C
VCCB (V)
4.5
Symbol
tPLH,
tPHL
(Note 1)
tPZH,
tPZL
(Note 1)
tPHZ,
tPLZ
(Note 1)
tOSHL,
tOSLH
(Note 1)
Min
3.3
Max
Min
2.8
Max
Min
1.8
Max
Max
Unit
2.1
2.3
nS
2.3
2.6
2.3
2.5
2.8
2.4
2.5
2.7
3.0
2.4
2.7
2.8
3.0
3.3
4.5
2.6
3.8
4.0
4.1
4.3
3.3
3.7
3.9
4.1
4.3
4.6
2.5
3.9
4.1
4.3
4.5
4.8
1.8
4.1
4.4
4.5
4.7
5.0
1.2
4.4
4.7
4.8
5.0
5.3
4.5
2.6
3.8
4.0
4.1
4.3
3.3
3.7
3.9
4.1
4.3
4.6
2.5
3.9
4.1
4.3
4.5
4.8
1.8
4.1
4.4
4.5
4.7
5.0
1.2
4.4
4.7
4.8
5.0
5.3
4.5
0.15
0.15
0.15
0.15
0.15
3.3
0.15
0.15
0.15
0.15
0.15
2.5
0.15
0.15
0.15
0.15
0.15
1.8
0.15
0.15
0.15
0.15
0.15
1.2
0.15
0.15
0.15
0.15
0.15
Parameter
VCCA (V)
Propagation
Delay,
4.5
1.6
1.8
2.0
3.3
1.7
1.9
2.1
A to B
2.8
1.9
2.1
1.8
2.1
1.2
Output
Enable,
OE to B
Output
Disable,
OE to B
Output to
Output
Skew,
Time
Min
1.2
Max
Min
nS
nS
nS
1. Propagation delays defined per Figure 2.
CAPACITANCE
Symbol
Parameter
Test Conditions
Typ (Note 2)
Unit
CIN
Control Pin Input Capacitance
VCCA = VCCB = 3.3 V, VI = 0 V or VCCA/B
3.5
pF
CI/O
I/O Pin Input Capacitance
VCCA = VCCB = 3.3 V, VI = 0 V or VCCA/B
5.0
pF
CPD
Power Dissipation Capacitance
VCCA = VCCB = 3.3 V, VI = 0 V or VCCA, f = 10 MHz
5.0
pF
2. Typical values are at TA = +25°C.
3. CPD is defined as the value of the IC’s equivalent capacitance from which the operating current can be calculated from:
ICC(operating) ^ CPD x VCC x fIN where ICC = ICCA + ICCB.
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4
NLSV1T240
VCC
Pulse
Generator
RL
DUT
CL
VCCO x 2
OPEN
GND
RL
Figure 2. AC (Propagation Delay) Test Circuit
Test
Switch
tPLH, tPHL
OPEN
tPLZ, tPZL
VCCO x 2
tPHZ, tPZH
GND
CL = 15 pF or equivalent (includes probe and jig capacitance)
RL = 2 kW or equivalent
ZOUT of pulse generator = 50 W
VIH
Input (A)
Vm
Vm
tPHL
tPLH
Output (B)
Vm
0V
VOH
Vm
VOL
Waveform 1 − Propagation Delays
tR = tF = 2.0 ns, 10% to 90%; f = 1 MHz; tW = 500 ns
VIH
OEn
Vm
Vm
tPZH
0V
tPHZ
Output (B)
VOH
VY
Vm
≈0V
tPZL
tPLZ
≈ VCC
Vm
Output (B)
VX
VOL
Waveform 2 − Output Enable and Disable Times
tR = tF = 2.0 ns, 10% to 90%; f = 1 MHz; tW = 500 ns
Figure 3. AC (Propagation Delay) Test Circuit Waveforms
VCC
Symbol
3.0 V – 4.5 V
2.3 V − 2.7 V
1.65 V − 1.95 V
1.4 V − 1.6 V
0.9 V − 1.3 V
VmA
VCCA/2
VCCA/2
VCCA/2
VCCA/2
VCCA/2
VmB
VCCB/2
VCCB/2
VCCB/2
VCCB/2
VCCB/2
VX
VOL x 0.1
VOL x 0.1
VOL x 0.1
VOL x 0.1
VOL x 0.1
VY
VOH x 0.9
VOH x 0.9
VOH x 0.9
VOH x 0.9
VOH x 0.9
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5
NLSV1T240
PACKAGE DIMENSIONS
UDFN6 1.2 x 1.0, 0.4P
CASE 517AA
ISSUE C
EDGE OF PACKAGE
PIN ONE
REFERENCE
2X
0.10 C
ÉÉ
ÉÉ
ÉÉ
L1
E
DETAIL A
Bottom View
(Optional)
TOP VIEW
2X
EXPOSED Cu
0.10 C
(A3)
0.10 C
A1
A
10X
0.08 C
ÉÉÉ
ÉÉÉ
A3
DETAIL B
Side View
(Optional)
5X
MILLIMETERS
MIN
MAX
0.45
0.55
0.00
0.05
0.127 REF
0.15
0.25
1.20 BSC
1.00 BSC
0.40 BSC
0.30
0.40
0.00
0.15
0.40
0.50
MOUNTING FOOTPRINT*
6X
6X
0.42
C
A1
DIM
A
A1
A3
b
D
E
e
L
L1
L2
MOLD CMPD
SEATING
PLANE
SIDE VIEW
1
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED TERMINAL
AND IS MEASURED BETWEEN 0.25 AND
0.30 mm FROM TERMINAL.
4. COPLANARITY APPLIES TO THE EXPOSED
PAD AS WELL AS THE TERMINALS.
A
B
D
0.22
L
3
L2
6X
b
0.10 C A B
0.05 C
6
0.40
PITCH
4
e
NOTE 3
1.07
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
BOTTOM VIEW
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are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
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NLSV1T240/D