NLSV2T244 2-Bit Dual-Supply Non-Inverting Level Translator The NLSV2T244 is a 2−bit configurable dual−supply voltage level translator. The input An and output Bn ports are designed to track two different power supply rails, VCCA and VCCB respectively. Both supply rails are configurable from 0.9 V to 4.5 V allowing universal low−voltage translation from the input An to the output Bn port. http://onsemi.com MARKING DIAGRAMS 8 Features • • • • • • • • • Wide VCCA and VCCB Operating Range: 0.9 V to 4.5 V High−Speed w/ Balanced Propagation Delay Inputs and Outputs have OVT Protection to 4.5 V Non−preferential VCCA and VCCB Sequencing Outputs at 3−State until Active VCC is Reached Power−Off Protection Outputs Switch to 3−State with VCCB at GND Small Packaging: UDFN8, SO−8, Micro8 This is a Pb−Free Device 1 UDFN8 MU SUFFIX CASE 517AJ UPM G UP = Specific Device Code M = Date Code G = Pb−Free Package 8 SO−8 D SUFFIX CASE 751 8 1 A L Y W G Typical Applications • Mobile Phones, PDAs, Other Portable Devices 2T244 ALYW G G 1 = Assembly Location = Wafer Lot = Year = Work Week = Pb−Free Package Important Information 8 • ESD Protection for All Pins: HBM (Human Body Model) > 5000 V Micro8 DM SUFFIX CASE 846A 1 244 AYW G G 1 A Y W G = Assembly Location = Year = Work Week = Pb−Free Package ORDERING INFORMATION Device Package Shipping† NLSV2T244MUTAG UDFN8 3000/Tape & Reel (Pb−Free) NLSV2T244DR2G SO−8 2500/Tape & Reel (Pb−Free) NLSV2T244DMR2G Micro8 4000/Tape & Reel (Pb−Free) †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D. © Semiconductor Components Industries, LLC, 2012 February, 2012 − Rev. 2 1 Publication Order Number: NLSV2T244/D NLSV2T244 VCCA VCCB A1 B1 A2 B2 OE Figure 1. Logic Diagram PIN ASSIGNMENTS VCCA 1 8 VCCB A1 2 7 B1 A2 3 6 B2 OE 5 4 GND VCCA 1 8 VCCB A1 2 7 A2 3 6 OE 4 UDFN8 (Top View) 5 VCCA 1 8 VCCB B1 A1 2 7 B1 B2 A2 3 6 B2 OE 4 5 GND GND Micro8 (Top View) SOIC−8 (Top View) TRUTH TABLE PIN ASSIGNMENT PIN FUNCTION VCCA Input Port DC Power Supply VCCB Inputs Outputs OE An Bn Output Port DC Power Supply L L L GND Ground L H H An Input Port H X 3−State Bn Output Port OE Output Enable http://onsemi.com 2 NLSV2T244 MAXIMUM RATINGS Symbol VCCA, VCCB VI VC VO Rating Value DC Supply Voltage Condition Unit −0.5 to +5.5 V An −0.5 to +5.5 V OE −0.5 to +5.5 V (Power Down) Bn −0.5 to +5.5 (Active Mode) Bn −0.5 to +5.5 V (Tri−State Mode) Bn −0.5 to +5.5 V DC Input Voltage Control Input DC Output Voltage VCCA = VCCB = 0 V IIK DC Input Diode Current −20 VI < GND mA IOK DC Output Diode Current −50 VO < GND mA IO DC Output Source/Sink Current ±50 mA ICCA, ICCB DC Supply Current Per Supply Pin ±100 mA IGND DC Ground Current per Ground Pin ±100 mA TSTG Storage Temperature −65 to +150 °C Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. RECOMMENDED OPERATING CONDITIONS Symbol VCCA, VCCB Parameter Bus Input Voltage VC Control Input VIO Bus Output Voltage Dt / DV Max Unit 0.9 4.5 V GND 4.5 V OE GND 4.5 V Bn GND 4.5 V (Active Mode) Bn GND VCCB V (Tri−State Mode) Bn GND 4.5 V −40 +85 °C 0 10 nS Positive DC Supply Voltage VI TA Min (Power Down Mode) Operating Temperature Range Input Transition Rise or Rate VI, from 30% to 70% of VCC; VCC = 3.3 V ±0.3 V http://onsemi.com 3 NLSV2T244 DC ELECTRICAL CHARACTERISTICS −405C to +855C Symbol VIH VIL VOH Parameter Test Conditions Input HIGH Voltage (An, OE) Input LOW Voltage (An, OE) Output HIGH Voltage Min Max Unit 3.6 – 4.5 0.9 – 4.5 V 2.2 − 2.7 – 3.6 2.0 − 2.3 – 2.7 1.6 − 1.4 − 2.3 0.65 * VCCA − 0.9 – 1.4 0.9 * VCCA − 0.9 – 4.5 − 0.8 2.7 – 3.6 − 0.8 2.3 – 2.7 − 0.7 1.4 − 2.3 − 0.35 * VCCA 0.9 – 1.4 − 0.1 * VCCA IOH = −100 mA; VI = VIH 0.9 – 4.5 0.9 – 4.5 VCCB – 0.2 − IOH = −0.5 mA; VI = VIH 0.9 0.9 0.75 * VCCB − IOH = −2 mA; VI = VIH 1.4 1.4 1.05 − IOH = −6 mA; VI = VIH 1.65 1.65 1.25 − 2.3 2.3 2.0 − 2.3 2.3 1.8 − 2.7 2.7 2.2 − 2.3 2.3 1.7 − IOH = −18 mA; VI = VIH Output LOW Voltage VCCB (V) 3.6 – 4.5 IOH = −12 mA; VI = VIH VOL VCCA (V) 3.0 3.0 2.4 − IOH = −24 mA; VI = VIH 3.0 3.0 2.2 − IOL = 100 mA; VI = VIL 0.9 – 4.5 0.9 – 4.5 − 0.2 IOL = 0.5 mA; VI = VIL 1.1 1.1 − 0.3 IOL = 2 mA; VI = VIL 1.4 1.4 − 0.35 IOL = 6 mA; VI = VIL 1.65 1.65 − 0.3 IOL = 12 mA; VI = VIL 2.3 2.3 − 0.4 2.7 2.7 − 0.4 2.3 2.3 − 0.6 3.0 3.0 − 0.4 IOL = 18 mA; VI = VIL IOL = 24 mA; VI = VIL V V V 3.0 3.0 − 0.55 Input Leakage Current VI = VCCA or GND 0.9 – 4.5 0.9 – 4.5 −1.0 1.0 mA IOFF Power−Off Leakage Current OE = 0 V 0 0.9 – 4.5 0.9 – 4.5 0 −1.0 −1.0 1.0 1.0 mA ICCA Quiescent Supply Current VI = VCCA or GND; IO = 0, VCCA = VCCB 0.9 – 4.5 0.9 − 4.5 − 1.0 mA ICCB Quiescent Supply Current VI = VCCA or GND; IO = 0, VCCA = VCCB 0.9 – 4.5 0.9 − 4.5 − 1.0 mA ICCA + ICCB Quiescent Supply Current VI = VCCA or GND; IO = 0, VCCA = VCCB 0.9 – 4.5 0.9 – 4.5 − 2.0 mA II DICCA Increase in ICC per Input Voltage, Other Inputs at VCCA or GND VI = VCCA – 0.6 V; VI = VCCA or GND 4.5 3.6 4.5 3.6 − 10 5.0 mA DICCB Increase in ICC per Input Voltage, Other Inputs at VCCA or GND VI = VCCA – 0.6 V; VI = VCCA or GND 4.5 3.6 4.5 3.6 − 10 5.0 mA I/O Tri−State Output Leakage Current TA = 25°C, OE = 0 V 0.9 – 4.5 0.9 – 4.5 −1.0 1.0 mA IOZ http://onsemi.com 4 NLSV2T244 TOTAL STATIC POWER CONSUMPTION (ICCA + ICCB) −405C to +855C VCCB (V) 4.5 VCCA (V) Min 3.3 Max Min 2.8 Max Min 1.8 Max Min 0.9 Max Min Max Unit 4.5 2 2 2 2 < 1.5 μA 3.3 2 2 2 2 < 1.5 μA 2.8 <2 <1 <1 < 0.5 < 0.5 μA 1.8 <1 <1 < 0.5 < 0.5 < 0.5 μA 0.9 < 0.5 < 0.5 < 0.5 < 0.5 < 0.5 μA NOTE: Connect ground before applying supply voltage VCCA or VCCB. This device is designed with the feature that the power−up sequence of VCCA and VCCB will not damage the IC. AC ELECTRICAL CHARACTERISTICS −405C to +855C VCCB (V) 4.5 Symbol tPLH, tPHL (Note 1) tPZH, tPZL (Note 1) tPHZ, tPLZ (Note 1) tOSHL, tOSLH (Note 1) Min 3.3 Max Min 2.8 Max Min 1.8 Max Unit 2.1 2.3 nS 2.1 2.3 2.6 2.1 2.3 2.5 2.8 2.1 2.4 2.5 2.7 3.0 1.2 2.4 2.7 2.8 3.0 3.3 4.5 2.6 3.8 4.0 4.1 4.3 3.3 3.7 3.9 4.1 4.3 4.6 2.5 3.9 4.1 4.3 4.5 4.8 1.8 4.1 4.4 4.5 4.7 5.0 1.2 4.4 4.7 4.8 5.0 5.3 4.5 2.6 3.8 4.0 4.1 4.3 3.3 3.7 3.9 4.1 4.3 4.6 2.5 3.9 4.1 4.3 4.5 4.8 1.8 4.1 4.4 4.5 4.7 5.0 1.2 4.4 4.7 4.8 5.0 5.3 4.5 0.15 0.15 0.15 0.15 0.15 3.3 0.15 0.15 0.15 0.15 0.15 2.5 0.15 0.15 0.15 0.15 0.15 1.8 0.15 0.15 0.15 0.15 0.15 1.2 0.15 0.15 0.15 0.15 0.15 VCCA (V) Propagation Delay, 4.5 1.6 1.8 2.0 3.3 1.7 1.9 An to Bn 2.8 1.9 1.8 Output Enable, OE to Bn Output Disable, OE to Bn Output to Output Skew, Time 1.2 Max Parameter Min Max Min nS nS nS 1. Propagation delays defined per Figure 2. CAPACITANCE Symbol Parameter Test Conditions Typ (Note 2) Unit CIN Control Pin Input Capacitance VCCA = VCCB = 3.3 V, VI = 0 V or VCCA/B 3.5 pF CI/O I/O Pin Input Capacitance VCCA = VCCB = 3.3 V, VI = 0 V or VCCA/B 5.0 pF CPD Power Dissipation Capacitance VCCA = VCCB = 3.3 V, VI = 0 V or VCCA, f = 10 MHz 20 pF 2. Typical values are at TA = +25°C. 3. CPD is defined as the value of the IC’s equivalent capacitance from which the operating current can be calculated from: ICC(operating) ^ CPD x VCC x fIN x NSW where ICC = ICCA + ICCB and NSW = total number of outputs switching. http://onsemi.com 5 NLSV2T244 VCC Pulse Generator RL DUT CL VCCO x 2 OPEN GND RL Figure 2. AC (Propagation Delay) Test Circuit Test Switch tPLH, tPHL OPEN tPLZ, tPZL VCCO x 2 tPHZ, tPZH GND CL = 15 pF or equivalent (includes probe and jig capacitance) RL = 2 kW or equivalent ZOUT of pulse generator = 50 W VIH Input (An) Vm Vm tPHL tPLH Output (Bn) Vm 0V VOH Vm VOL Waveform 1 − Propagation Delays tR = tF = 2.0 ns, 10% to 90%; f = 1 MHz; tW = 500 ns VIH OEn Vm Vm tPZH 0V tPHZ Output (Bn) VOH VY Vm ≈0V tPZL tPLZ ≈ VCC Vm Output (Bn) VX VOL Waveform 2 − Output Enable and Disable Times tR = tF = 2.0 ns, 10% to 90%; f = 1 MHz; tW = 500 ns Figure 3. AC (Propagation Delay) Test Circuit Waveforms VCC Symbol 3.0 V – 4.5 V 2.3 V − 2.7 V 1.65 V − 1.95 V 1.4 V − 1.6 V 0.9 V − 1.3 V VmA VCCA/2 VCCA/2 VCCA/2 VCCA/2 VCCA/2 VmB VCCB/2 VCCB/2 VCCB/2 VCCB/2 VCCB/2 VX VOL x 0.1 VOL x 0.1 VOL x 0.1 VOL x 0.1 VOL x 0.1 VY VOH x 0.9 VOH x 0.9 VOH x 0.9 VOH x 0.9 VOH x 0.9 http://onsemi.com 6 NLSV2T244 PACKAGE DIMENSIONS UDFN8 1.8 x 1.2, 0.4P CASE 517AJ ISSUE O PIN ONE REFERENCE ÉÉ ÉÉ 0.10 C NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN 0.15 AND 0.30 mm FROM TERMINAL TIP. 4. MOLD FLASH ALLOWED ON TERMINALS ALONG EDGE OF PACKAGE. FLASH MAY NOT EXCEED 0.03 ONTO BOTTOM SURFACE OF TERMINALS. 5. DETAIL A SHOWS OPTIONAL CONSTRUCTION FOR TERMINALS. A B D 0.10 C L1 E DETAIL A NOTE 5 TOP VIEW (A3) 0.05 C DIM A A1 A3 b b2 D E e L L1 L2 A 0.05 C SIDE VIEW e/2 A1 e (b2) 1 4 8 5 C SEATING PLANE DETAIL A 8X L (L2) BOTTOM VIEW MILLIMETERS MIN MAX 0.45 0.55 0.00 0.05 0.127 REF 0.15 0.25 0.30 REF 1.80 BSC 1.20 BSC 0.40 BSC 0.45 0.55 0.00 0.03 0.40 REF MOUNTING FOOTPRINT SOLDERMASK DEFINED 8X b 0.10 M C A B 0.05 M C 8X 0.66 7X 0.22 NOTE 3 1.50 1 0.32 0.40 PITCH DIMENSIONS: MILLIMETERS http://onsemi.com 7 NLSV2T244 PACKAGE DIMENSIONS SO−8 CASE 751−07 ISSUE AJ −X− NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. 751−01 THRU 751−06 ARE OBSOLETE. NEW STANDARD IS 751−07. A 8 5 S B 0.25 (0.010) M Y M 1 4 −Y− K G C N DIM A B C D G H J K M N S X 45 _ SEATING PLANE −Z− 0.10 (0.004) H D 0.25 (0.010) M Z Y S X M J S SOLDERING FOOTPRINT* 1.52 0.060 7.0 0.275 4.0 0.155 0.6 0.024 1.270 0.050 SCALE 6:1 mm Ǔ ǒinches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com 8 MILLIMETERS MIN MAX 4.80 5.00 3.80 4.00 1.35 1.75 0.33 0.51 1.27 BSC 0.10 0.25 0.19 0.25 0.40 1.27 0_ 8_ 0.25 0.50 5.80 6.20 INCHES MIN MAX 0.189 0.197 0.150 0.157 0.053 0.069 0.013 0.020 0.050 BSC 0.004 0.010 0.007 0.010 0.016 0.050 0 _ 8 _ 0.010 0.020 0.228 0.244 NLSV2T244 PACKAGE DIMENSIONS Micro8t CASE 846A−02 ISSUE H NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE. 5. 846A-01 OBSOLETE, NEW STANDARD 846A-02. D HE PIN 1 ID E e b 8 PL 0.08 (0.003) T B M S A S SEATING −T− PLANE 0.038 (0.0015) MILLIMETERS NOM MAX −− 1.10 0.08 0.15 0.33 0.40 0.18 0.23 3.00 3.10 3.00 3.10 0.65 BSC 0.40 0.55 0.70 4.75 4.90 5.05 DIM A A1 b c D E e L HE MIN −− 0.05 0.25 0.13 2.90 2.90 INCHES NOM −− 0.003 0.013 0.007 0.118 0.118 0.026 BSC 0.016 0.021 0.187 0.193 MIN −− 0.002 0.010 0.005 0.114 0.114 MAX 0.043 0.006 0.016 0.009 0.122 0.122 0.028 0.199 A A1 L c SOLDERING FOOTPRINT* 8X 1.04 0.041 0.38 0.015 3.20 0.126 6X 8X 4.24 0.167 0.65 0.0256 5.28 0.208 SCALE 8:1 mm Ǔ ǒinches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. 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