MJD6039, NJVMJD6039T4G Darlington Power Transistors DPAK For Surface Mount Applications Designed for general purpose power and switching such as output or driver stages in applications such as switching regulators, convertors, and power amplifiers. Features Lead Formed for Surface Mount Applications in Plastic Sleeves (No Suffix) Straight Lead Version in Plastic Sleeves (“−1” Suffix) Monolithic Construction With Built−in Base−Emitter Shunt Resistors High DC Current Gain − hFE = 2500 (Typ) @ IC = 4.0 Adc Epoxy Meets UL 94 V−0 @ 0.125 in ESD Ratings: Human Body Model, 3B > 8000 V Machine Model, C > 400 V NJV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q101 Qualified and PPAP Capable Pb−Free Package is Available* http://onsemi.com SILICON POWER TRANSISTORS 4 AMPERES, 80 VOLTS, 20 WATTS DPAK CASE 369C STYLE 1 COLLECTOR 2, 4 BASE 1 MAXIMUM RATINGS Rating EMITTER 3 Symbol Max Unit VCEO 80 Vdc Collector−Base Voltage VCB 80 Vdc Emitter−Base Voltage VEB 5 Vdc Collector−Emitter Voltage Collector Current Continuous Peak IC Base Current IB Total Power Dissipation @ TC = 25C Derate above 25C PD Total Power Dissipation (Note 1) @ TA = 25C Derate above 25C PD Operating and Storage Junction Temperature Range TJ, Tstg MARKING DIAGRAM AYWW J 6039G Adc 4 8 100 mAdc 20 0.16 W W/C 1.75 0.014 W W/C −65 to +150 C Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. These ratings are applicable when surface mounted on the minimum pad sizes recommended. A = Assembly Location Y = Year WW = Work Week J6039 = Device Code G = Pb−Free Package ORDERING INFORMATION Package Shipping† DPAK 2,500/Tape & Reel MJD6039T4G DPAK (Pb−Free) 2,500/Tape & Reel NJVMJD6039T4G DPAK (Pb−Free) 2,500/Tape & Reel Device MJD6039T4 †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. Semiconductor Components Industries, LLC, 2012 February, 2012 − Rev. 9 1 Publication Order Number: MJD6039/D MJD6039, NJVMJD6039T4G THERMAL CHARACTERISTICS Characteristic Symbol Max Unit Thermal Resistance, Junction−to−Case RqJC 6.25 C/W Thermal Resistance, Junction−to−Ambient (Note 2) RqJA 71.4 C/W ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ 2. These ratings are applicable when surface mounted on the minimum pad sizes recommended. ELECTRICAL CHARACTERISTICS (TC = 25C unless otherwise noted) Characteristic Symbol Min Max 80 − − 10 1000 500 − − − 2.5 − 2.8 25 − − 100 Unit OFF CHARACTERISTICS Collector−Emitter Sustaining Voltage (IC = 30 mAdc, IB = 0) VCEO(sus) Collector−Cutoff Current (VCE = 40 Vdc, IB = 0) ICEO Vdc mAdc ON CHARACTERISTICS (Note 3) DC Current Gain (IC = 1 Adc, VCE = 4 Vdc) (IC = 2 Adc, VCE = 4 Vdc) hFE Collector−Emitter Saturation Voltage (IC = 2 Adc, IB = 8 mAdc) VCE(sat) Base−Emitter On Voltage (IC = 2 Adc, VCE = 4 Vdc) VBE(on) − Vdc Vdc DYNAMIC CHARACTERISTICS Small−Signal Current Gain (IC = 0.75 Adc, VCE = 10 Vdc, f = 1 kHz) hfe Output Capacitance (VCB = 10 Vdc, IE = 0, f = 0.1 MHz) Cob − pF 3. Pulse Test: Pulse Width v 300 ms, Duty Cycle v 2%. RB & RC VARIED TO OBTAIN DESIRED CURRENT LEVELS D1, MUST BE FAST RECOVERY TYPE, e.g.: 1N5825 USED ABOVE IB 100 mA MSD6100 USED BELOW IB 100 mA VCC = 30 V IC/IB = 250 t, TIME (s) RB 51 25 ms tr, tf 10 ns DUTY CYCLE = 1% D1 8 k 120 IB1 = IB2 TJ = 25C ts 2 RC SCOPE TUT V2 APPROX +8 V 0 V1 APPROX -12 V 4 VCC -30 V tf 1 0.8 tr 0.6 0.4 +4V FOR td AND tr, D1 IS DISCONNECTED AND V2 = 0 0.2 0.04 0.06 FOR NPN TEST CIRCUIT REVERSE ALL POLARITIES. Figure 1. Switching Times Test Circuit PNP NPN 0.1 td @ VBE(off) = 0 0.2 0.4 0.6 1 IC, COLLECTOR CURRENT (AMP) Figure 2. Switching Times http://onsemi.com 2 2 4 MJD6039, NJVMJD6039T4G r(t), EFFECTIVE TRANSIENT THERMAL RESISTANCE (NORMALIZED) TYPICAL ELECTRICAL CHARACTERISTICS 1 0.7 0.5 D = 0.5 0.3 0.2 0.2 0.1 0.05 0.1 0.07 0.05 0.01 0.03 0.02 SINGLE PULSE 0.01 0.01 0.02 0.03 P(pk) RqJC(t) = r(t) RqJC RqJC = 6.25C/W D CURVES APPLY FOR POWER PULSE TRAIN SHOWN READ TIME AT t1 TJ(pk) - TC = P(pk) RqJC(t) 0.05 0.1 0.2 0.3 0.5 1 2 3 5 10 t, TIME OR PULSE WIDTH (ms) 20 t1 t2 DUTY CYCLE, D = t1/t2 50 100 200 300 1000 500 TA TC 2.5 25 10 7 5 0.1ms 0.5ms 3 PD, POWER DISSIPATION (WATTS) IC, COLLECTOR CURRENT (AMPS) Figure 3. Thermal Response 5ms 2 1ms 1 0.7 0.5 BONDING WIRE LIMIT THERMAL LIMIT SECOND BREAKDOWN LIM IT TJ = 150C CURVES APPLY BELOW RATED VCEO 0.3 0.2 dc 0.1 1 2 3 5 7 10 20 30 50 70 100 2 20 TC 1.5 15 1 10 0.5 5 0 0 TA SURFACE MOUNT 25 50 75 100 T, TEMPERATURE (C) VCE, COLLECTOR-TO-EMITTER VOLTAGE (VOLTS) Figure 4. Maximum Rated Forward Biased Safe Operating Area 125 150 Figure 5. Power Derating There are two limitations on the power handling ability of a transistor: average junction temperature and second breakdown. Safe operating area curves indicate IC − VCE limits of the transistor that must be observed for reliable operation; i.e., the transistor must not be subjected to greater dissipation than the curves indicate. The data of Figures 6 and 7 is based on TJ(pk) = 150C; TC is variable depending on conditions. Second breakdown pulse limits are valid for duty cycles to 10% provided TJ(pk) < 150C. TJ(pk) may be calculated from the data in Figure 5. At high case temperatures, thermal limitations will reduce the power that can be handled to values less than the limitations imposed by second breakdown. 200 TC = 25C C, CAPACITANCE (pF) 100 70 50 30 20 10 0.04 0.06 0.1 Cob Cib PNP NPN 0.2 0.4 0.6 1 2 4 6 VR, REVERSE VOLTAGE (VOLTS) Figure 6. Capacitance http://onsemi.com 3 10 20 40 MJD6039, NJVMJD6039T4G VCE , COLLECTOR-EMITTER VOLTAGE (VOLTS) TYPICAL ELECTRICAL CHARACTERISTICS 6k 4k hFE , DC CURRENT GAIN VCE = 3 V TJ = 125C 3k 25C 2k -55C 1k 800 600 400 300 0.04 0.06 0.1 0.2 0.4 0.6 1 2 4 TJ = 125C 3 2.6 2.2 IC = 0.5 A 1A 2A 0.5 1 4A 1.8 1.4 1 0.6 0.1 0.2 2 5 10 20 IB, BASE CURRENT (mA) Figure 7. DC Current Gain Figure 8. Collector Saturation Region V, TEMPERATURE COEFFICIENTS (mV/C) VBE(sat) @ IC/IB = 250 1.8 1.4 VBE @ VCE = 3 V 1 VCE(sat) @ IC/IB = 250 0.6 0.2 0.04 0.06 0.1 0.2 0.4 0.6 1 2 4 *APPLIED FOR IC/IB < hFE/3 0 25C to 150C - 0.8 - 1.6 - 2.4 qVC for VCE(sat) - 55C to 25C - 3.2 -4 25C to 150C qVC for VBE - 4.8 0.04 0.06 0.1 25C to 150C 0.2 0.4 0.6 1 IC, COLLECTOR CURRENT (A) REVERSE 2 IC, COLLECTOR CURRENT (AMP) IC, COLLECTOR CURRENT (AMP) Figure 9. “On” Voltages Figure 10. Temperature Coefficients 105 FORWARD 104 VCE = 30 V NPN MJD6039 TJ = 150C BASE COLLECTOR 102 101 100 100 + 0.8 TJ = 25C 103 50 IC, COLLECTOR CURRENT (AMP) 2.2 V, VOLTAGE (VOLTS) 3.4 8k 100C 25C 10-1 -0.6 -0.4 -0.2 0 +0.2 +0.4 +0.6 +0.8 +1 VBE, BASE-EMITTER VOLTAGE (VOLTS) +1.2 +1.4 60 EMITTER Figure 11. Collector Cut−Off Region Figure 12. Darlington Schematic http://onsemi.com 4 3 4 MJD6039, NJVMJD6039T4G PACKAGE DIMENSIONS DPAK CASE 369C−01 ISSUE D A E b3 c2 B Z D 1 L4 A 4 L3 b2 e 2 NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: INCHES. 3. THERMAL PAD CONTOUR OPTIONAL WITHIN DIMENSIONS b3, L3 and Z. 4. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR BURRS. MOLD FLASH, PROTRUSIONS, OR GATE BURRS SHALL NOT EXCEED 0.006 INCHES PER SIDE. 5. DIMENSIONS D AND E ARE DETERMINED AT THE OUTERMOST EXTREMES OF THE PLASTIC BODY. 6. DATUMS A AND B ARE DETERMINED AT DATUM PLANE H. C H DETAIL A 3 c b 0.005 (0.13) M H C L2 GAUGE PLANE C L SEATING PLANE A1 L1 DETAIL A ROTATED 905 CW 2.58 0.101 5.80 0.228 3.0 0.118 1.6 0.063 INCHES MIN MAX 0.086 0.094 0.000 0.005 0.025 0.035 0.030 0.045 0.180 0.215 0.018 0.024 0.018 0.024 0.235 0.245 0.250 0.265 0.090 BSC 0.370 0.410 0.055 0.070 0.108 REF 0.020 BSC 0.035 0.050 −−− 0.040 0.155 −−− MILLIMETERS MIN MAX 2.18 2.38 0.00 0.13 0.63 0.89 0.76 1.14 4.57 5.46 0.46 0.61 0.46 0.61 5.97 6.22 6.35 6.73 2.29 BSC 9.40 10.41 1.40 1.78 2.74 REF 0.51 BSC 0.89 1.27 −−− 1.01 3.93 −−− STYLE 1: PIN 1. BASE 2. COLLECTOR 3. EMITTER 4. COLLECTOR SOLDERING FOOTPRINT* 6.20 0.244 DIM A A1 b b2 b3 c c2 D E e H L L1 L2 L3 L4 Z 6.172 0.243 SCALE 3:1 mm Ǔ ǒinches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). 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