INTERSIL HS

HS-2400RH
Data Sheet
Radiation Hardened PRAM Four Channel
Programmable Operational Amplifier
HS-2400RH is a four-channel programmable amplifier
providing a level of versatility unsurpassed by any other
monolithic operational amplifier. Versatility is achieved by
employing four input amplifier channels, any one (or none) of
which may be electronically selected and connected to a
single output stage through DTL/TTL compatible address
inputs. The device formed by the output and the selected
pair of inputs is an op amp which delivers excellent slew rate,
gain bandwidth and power bandwidth performance. Other
advantageous features for these dielectrically isolated
amplifiers include high voltage gain and input impedance
coupled with low input offset voltage and offset current.
External compensation is not required on this device at
closed loop gains greater than 10.
Each channel of the HS-2400RH can be controlled and
operated with suitable feedback networks in any of the
standard op amp configurations. This specialization makes
these amplifiers excellent components for multiplexing signal
selection and mathematical function designs. With 20V/µs
slew rate, 20MHz gain bandwidth and low input bias currents
make these devices ideal building blocks for signal
generators, active filters and data acquisition designs.
Programmability, coupled with 9mV maximum offset voltage
and 50nA offset current, make these amplifiers outstanding
components for signal conditioning circuits.
Specifications for Rad Hard QML devices are controlled
by the Defense Supply Center in Columbus (DSCC). The
SMD numbers listed here must be used when ordering.
Detailed Electrical Specifications for these devices are
contained in SMD 5962-95684. A “hot-link” is provided
on our homepage for downloading.
http://www.intersil.com/spacedefense/space.htm
September 1999
File Number
4027.1
Features
• Electrically Screened to SMD # 5962-95684
• QML Qualified per MIL-PRF-38535 Requirements
• Total GAMMA Dose . . . . . . . . . . . . . . . . . . . .10k RAD(SI)
• Digital Programmability
• High Rate Slew
- Uncompensated . . . . . . . . . . . . . . . . . . . . . .20V/µs Min
- Compensated . . . . . . . . . . . . . . . . . . . . . . . . .6V/µs Min
• Wide Gain Bandwidth
- Uncompensated . . . . . . . . . . . . . . . . . . . . . .20MHz Min
- Compensated . . . . . . . . . . . . . . . . . . . . . . . . .4MHz Min
• High Gain . . . . . . . . . . . . . . . . . . . . . . . . . . . . .50kV/V Min
• Low Offset Current . . . . . . . . . . . . . . . . . . . . . . .50nA Max
• Single Capacitor Compensation for Unity Gain
• DTL/TTL Compatible Inputs
Applications
• Signal Selection/Multiplexing
• Operational Amplifier Gain Stage
• Oscillator Frequency
• Filter Characteristics
• Add-Subtract Functions
• Integrator Characteristics
• Comparator Levels
Pinout
16 LEAD CERAMIC DUAL-IN-LINE FRIT SEAL PACKAGE
(CERDIP) MIL-STD-1835 GDIP-T16
TOP VIEW
Ordering Information
ORDERING NUMBER
INTERNAL
MKT. NUMBER
TEMP. RANGE
(oC)
5962D9568401VEA
HS1-2400RH-Q
-55 to 125
+IN3 1
-IN3
2
+IN4 3
-IN4
4
-IN1
5
+IN1 6
-IN2
7
+IN2 8
1
+
33
-
16 D0
DECODE
CONTROL
15 D1
14 ENABLE
+
4
-
13 GND
12
1
+
11
COMP
V+
10 OUT
2
+
OUTPUT AMP
9
V-
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
www.intersil.com or 321-724-7143 | Copyright © Intersil Corporation 1999
HS-2400RH
Test Circuit
V2
0.002
V1
47pF
1µF
1µF
9
S31
1
S51
100
0.002
11
2
2
10K
47pF
1
1
5
S61
2
2
1
+
6
13
V6
1
2
S41
10K
100
14
0.002
2
2
S32
10K
1
15
S52
100
0.002
V7
1
1
1
7
S62
2
2
+2
8
16
1
2
V8
V9
S42
10K
15pF
100
0.002
1
DUT
2
2
S33
10K
1
S53
100
0.002
12
1
1
2
S63
2
2
3
+
1
1
2
S43
10K
100
0.002
V3
1
ACOUT
2
2
S34
10K
S54
100
0.002
-1
10
1
1
1
2
2
4
S64
2
4
+
3
1
2
50K
S14
500K
10
1
S11
S9
S44
10K
100
OPEN
1
S7
VIN
1
1
V5
200
2
1
2K
S8
2
2
1
2
1
50pF
(NOTE 2)
V4
(NOTE 1)
-1
+
A2
OPEN
S4
10
+
FB
2
X2
OPEN
2
1
S2
1
S1
2
OUT
NOTES:
OPEN
2
2
E
4.9K
1
S3
1. For loop stability, use Min value capacitor to prevent oscillation.
2. Includes stray capacitance.
3. All capacitors = ±10% (µF).
OPEN
4. All resistors = ±1% (Ω).
5. DUT pin numbers refer to 14 pin CERDIP Package.
HS-2400RH
Test Waveforms
+5.0V
+5.0V
+5.0V
+5.0V
∆V
INPUT
∆V
OUTPUT
-5.0V
-5.0V
-5.0V
-5.0V
+SR
-SR
∆T
SR =
∆T
∆T
∆T
SLEW RATE WAVEFORMS
VFINAL = +200mV
+200mV
0V
VPEAK
90%
INPUT
OUTPUT
0V
90%
-200mV
10%
0V
-200mV
tR , +OS
0V
10%
tF, -OS
VPEAK
tR
tF
OVERSHOOT, RISE AND FALL TIME WAVEFORMS
Burn-In Circuit
HS-2400RH CERDIP
1
2
3
4
5
6
7
8
16
+
33
-
DECODE
CONTROL
15
14
+
4
-
13
12
1
+
11
10
2
+
OUTPUT AMP
9
D0
f0
D1
f1
ENABLE
f2
GND
COMP
C3
D1
V+
V+
OUT
V-
VD2
R1
NOTES:
6. R1 = 100kΩ,/Socket, 5%, 1/4W (Min).
7. C1 = C2 = 0.01µF/Socket (Min) or 0.1µF/Row (Min).
8. C3 = 0.001µF/Socket, 10%.
9. D1 = D2 = 1N4002 or equivalent (per board).
10. |(V+) - (V-)| = 30V.
11. Duty Cycle 50% for: f0 = 100kHz, f1 = 50kHz, f2 = 25kHz.
3
C1
C2
HS-2400RH
Irradiation Circuit
R
1
16
2
15
3
14
4
13
5
12
6
11
R
R
V1
C
7
10
8
9
GND
V2
C
GND
GND
NOTES:
14. R = 1 Meg Ω.
12. V1 = +15V.
15. C = 0.1µF.
13. V2 = -15V.
Schematic Diagram
IN+
Q1 R2
2.4K
R3
1.8K
R1
1.6K
R12
1.6K
IN-
R13
0.8K
R18
2.0K
COMP
+VCC
Q82
Q81
Q79
R34
1.6K
Q84
Q3
Q5
VE
Q29
Q28
Q30
Q98
Q85
Q80
Q31
Q101
Q99
Q83
Q2
Q4
Q102
R4
22.9K
Q26
Q27
ENABLE
Q6
R5
8.0K
Q7
Q8 Q9
R6
2.0K
R35
1.6K
Q32
Q34
R14
10K
Q25
Q103
Q37
Q36
Q33
Q87
Q18
Q19
Q22
Q24
Q38
OUT
R31
36.5
Q92
Q93
Q94
Q95
Q96
V+
Q11
Q88
Q89
Q40
Q13
R32
34
Q41
Q23
VD
1.2K
Q100
Q97
C1
9.0pF
Q39
Q12
Q86
R30
R35
0.75K
Q20 Q21
R7
5.6K
Q10
GND
R33
4K
Q35
Q90
VC
Q91
Q14
TO ADDITIONAL
INPUT STAGES
Q17
VB
Q15
R8
4K
Q16
R9
1.5K
VA
R10
10K
R11
10K
R15
10K
Q42
R16
10K
R17
1.6K
D0
R19
1.6K
D1
NOTE:
16. Diagram Includes: One Input Stage, Decode Control, Bias Network, and Output Stage.
4
R29
0.4K
-VEE
HS-2400RH
Die Characteristics
DIE DIMENSIONS:
Substrate: Potential (Powered Up)
88 mils x 67 mils x 19 mils ±1 mils
2240µm x 1710µm x 483µm ±25.4µm
Unbiased
ADDITIONAL INFORMATION:
INTERFACE MATERIALS:
Worst Case Current Density:
Top Metallization:
< 2 x 105A/cm2
Type: Al, 1% Cu
Thickness: 16kÅ ±2kÅ
Transistor Count:
251
Glassivation:
Process:
Type: Nitride (Si3N4) over Silox (SiO2, 5% Phos.).
Silox Thickness: 12kÅ ±2kÅ
Nitride Thickness: 3.5kÅ ±1.5kÅ
Bipolar Dielectric Isolation
Metallization Mask Layout
HS-2400RH
-IN2
+IN1
-IN1
-IN4
+IN4
-IN3
+IN3
+IN2
V-
D0
OUT
V+
COMP GND ENABLE
D1
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site www.intersil.com
5