HS-2620RH, HS-2622RH Data Sheet Radiation Hardened, Very Wideband, High Input Impedance Uncompensated Operational Amplifiers HS-2620RH and HS-2622RH are radiation hardened bipolar operational amplifiers that feature very high input impedance coupled with wideband AC performance. The high resistance of the input stage is complemented by low offset voltage (4mV Max at 25oC for HS-2620RH) and low bias and offset current (15nA Max at 25oC for HS-2620RH) to facilitate accurate signal processing. Offset voltage can be reduced further by means of an external nulling potentiometer. Closed loop gains greater than 5, the 25V/µs minimum slew rate at 25oC and the 100kV/V minimum open loop gain at 25oC, enables the HS-2620RH to perform high gain amplification of very fast, wideband signals. These dynamic characteristics, coupled with fast settling times, make these amplifiers ideally suited to pulse amplification designs as well as high frequency or video applications. The frequency response of the amplifier can be tailored to exact design requirements by means of an external bandwidth control capacitor. Other high performance designs such as high gain, low distortion audio amplifiers, high-Q and wideband active filters and high speed comparators are excellent uses of this part. Specifications for Rad Hard QML devices are controlled by the Defense Supply Center in Columbus (DSCC). The SMD numbers listed here must be used when ordering. Detailed Electrical Specifications for these devices are contained in SMD 5962-95688. A “hot-link” is provided on our homepage for downloading. www.intersil.com/spacedefense/space.asp August 1999 File Number 4014.1 Features • Electrically Screened to SMD # 5962-95688 • QML Qualified per MIL-PRF-38535 Requirements • High Input Impedance (HS-2620RH) . . . . . . . 65MΩ (Min) • High Gain (HS-2620RH) . . . . . . . . . . . . . . . . 100kV/V (Min) 150kV/V (Typ) • High Slew Rate (HS-2620RH) . . . . . . . . . . . . . . 25V/µs (Min) 35V/µs (Typ) • Low Input Bias Current (HS-2620RH) . . . . . . . 15nA (Max) 5nA (Typ) • Low Input Offset Voltage (HS-2620RH) . . . . . . 4mV (Max) • Wide Gain Bandwidth Product (AV ≥ 5) . . . . . .100MHz (Typ) • Output Short Circuit Protection • Total Dose . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 x 104 RAD(Si) Applications • Video and RF Amplifiers • Pulse Amplifiers • Audio Amplifiers and Filters • High-Q Active Filters • High Speed Comparators Ordering Information INTERNAL MKT. NUMBER ORDERING NUMBER TEMP. RANGE (oC) 5962D9568801VGA HS2-2620RH-Q -55 to 125 5962D9568801VPA HS7-2620RH-Q -55 to 125 5962D9568801VPC HS7B-2620RH-Q -55 to 125 5962D9568802VGA HS2-2622RH-Q -55 to 125 5962D9568802VPA HS7-2622RH-Q -55 to 125 5962D9568802VPC HS7B-2622RH-Q -55 to 125 Pinouts HS7-2620RH, HS7-2622RH (CERDIP) GDIP1-T8 OR HS7B-2620RH, HS7B-2622RH (SBDIP) CDIP2-T8 TOP VIEW HS2-2620RH, HS2-2622RH (CAN) MACY1-X8 TOP VIEW COMP BAL 1 8 COMP -IN 2 7 V+ +IN 3 6 OUT V- 4 5 BAL + 8 BAL IN- 1 + 2 IN+ 7 V+ 6 5 3 OUT BAL 4 V- 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999 HS-2620RH, HS-2622RH Test Circuit 400 1.6K ACOUT -1/10 +VCC V1 0.1 100K 1 50pF (NOTE) 1 OPEN S7 OPEN 1 3 RAL 2 ADJ 2 2 S3A S1 2 1 S5A 1 OPEN 2 1 S2 S5B 1 + S8 100 100 S3B 1 OPEN OPEN 1 2 0.1 50 1 - + 2 1 2 2K VAC +1 S9 OPEN 3 OPEN 2 100K 2 50K 500K DUT 1 S6 FOR LOOP STABILITY, USE MIN VALUE CAPACITOR TO PREVENT OSCILLATION BUFFER V2 10K -VEE EOUT x2 5K 2 S4 1 ALL RESISTORS = ±1% (Ω) ALL CAPACITORS = ±10% (µF) 50K NOTE: Includes stray capacitances. FIGURE 1. TEST LOOP FOR THE HS-2620RH AND THE HS-2622RH Test Circuits and Waveforms VAC IN VAC OUT + - 50Ω 1.6K 50pF 400Ω FIGURE 2. SIMPLIFIED TEST CIRCUIT +5.0V +1.0V +1.0V INPUT +5.0V ∆V -5.0V -5.0V -1.0V -1.0V +SL ∆V OUTPUT -SL ∆T SR = ∆V ∆T ∆T FIGURE 3. SLEW RATE WAVEFORM VFINAL = +200mV +40mV 0V INPUT VPEAK 90% 0V 10% OUTPUT 10% 0V 0V 90% -40mV tr, +OS tf, -OS tr tf NOTE: Measured on both positive and negative transitions. Capacitance at Compensation pin should be minimized. FIGURE 4. OVERSHOOT, RISE AND FALL TIME WAVEFORMS 2 -200mV VPEAK HS-2620RH, HS-2622RH Burn-In Circuits HS7-2620RH CERDIP HS7-2622RH CERDIP 1 2 R1 3 VD2 HS2-2620RH (TO-99) METAL CAN HS2-2622RH (TO-99) METAL CAN 8 V+ 7 + 6 4 C3 C 8 D1 1 5 + 2 C2 7 6 5 3 4 R1 C2 V- NOTES: 1. R1 = 1MΩ, ±5%, 1/4W (Min) 2. C1 = C2 = 0.01µF/Socket (Min) of 0.1µF/Row (Min) 3. C3 = 0.01µF/Socket (10%) 4. D1 = D2 = IN4002 or Equivalent/Board 5. I(V+) - (V -)I = 31V ±1V Irradiation Circuit C 1 8 2 7 3 6 4 5 C R V2 C GND NOTES: 6. V1 = +15V ±10% 7. V2 = -15V ±10% 8. R = 1MΩ ±5% 9. C = 0.1µF ±10% 3 V1 D2 HS-2620RH, HS-2622RH Schematic Diagram COMPENSATION V+ R1 1K BAL R2 4.18K R3 1.56K R4 1.56K R5 600 C2 9pF BAL R6 30 Q60 Q1 Q40 Q2 Q3 Q61 Q39 Q41 Q38 Q4 Q42 Q37 Q6 Q5 Q7 +INPUT Q11 Q8 Q30 Q31 Q36 Q29 Q28 Q32 Q59 Q58 Q35 Q43 Q33 Q57 Q9 Q44 Q10 Q26 Q25 Q55 Q54 Q56 R18 30 Q53 R17 30 OUT Q13 Q12 Q17 Q18 Q16 Q45 Q24 Q27 Q15 Q47 Q46 R7 1.35 R19 2.5K Q52 R11 4.0K Q19 Q22 Q21 Q48 Q23 RP1 R8 1K Q49 Q50 R9 4.5K Q20 R10 2.0K Q51 C1 16pF R12 1.6K R13 1.6K R14 2.8K R15 800 R16 30 V- -INPUT 4 HS-2620RH, HS-2622RH Die Characteristics DIE DIMENSIONS: ASSEMBLY RELATED INFORMATION: 69 mils x 66 mils x 19 mils ±1 mil 1750µm x 1420µm x 483µm ±25.4µm Substrate Potential (Powered Up): Unbiased INTERFACE MATERIALS: ADDITIONAL INFORMATION: Glassivation: Worst Case Current Density: Type: Nitride (S13N4) over Silox (SiO2, 5% Phos.) Silox Thickness: 12kÅ ±2kÅ Nitride Thickness: 3.5kÅ ±1.5kÅ <2 x 105 A/cm2 Transistor Count: Top Metallization: HS-2620RH: 140 HS-2622RH: 140 Type: Al, 1% Cu Thickness: 18kÅ ±2kÅ Substrate: Linear Bipolar, DI Backside Finish: Silicon Metallization Mask Layout HS-2620RH, HS-2622RH COMP V+ BAL OUT -IN +IN BAL V- All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification. Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. 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