MC74ACT241 Octal Buffer/Line Driver with 3-State Outputs The MC74ACT241 is an octal buffer and line driver designed to be employed as a memory address driver, clock driver and bus oriented transmitter or receiver which provides improved PC board density. www.onsemi.com Features • 3−State Outputs Drive Bus Lines or Buffer Memory Address • • • Registers Outputs Source/Sink 24 mA TTL Compatible Inputs These are Pb−Free Devices MARKING DIAGRAMS 20 1 VCC OE2 YA1 DB4 YA2 DB3 YA3 DB2 YA4 DB1 20 19 18 17 16 15 14 13 12 11 SOIC−20W DW SUFFIX CASE 751D ACT241 AWLYYWWG 1 20 ACT 241 ALYWG G 1 1 2 3 4 5 6 7 8 9 10 OE1 DA1 YB4 DA2 YB3 DA3 YB2 DA4 YB1 GND TSSOP−20 DT SUFFIX CASE 948E A = Assembly Location WL, L = Wafer Lot YY, Y = Year WW, W = Work Week G or G = Pb−Free Package (Note: Microdot may be in either location) Figure 1. Pinout: 20−Lead Packages Conductors (Top View) TRUTH TABLE Inputs 1 Outputs OE1 D (Pins 12, 14, 16, 18) L L L L H H H X Z ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 5 of this data sheet. H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial Z = High Impedance TRUTH TABLE Inputs Outputs OE2 D (Pins 3, 5, 7, 9) H L L H H H L X Z H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial Z = High Impedance © Semiconductor Components Industries, LLC, 2015 February, 2015 − Rev. 6 1 Publication Order Number: MC74ACT241/D MC74ACT241 MAXIMUM RATINGS Symbol Parameter Value Unit −0.5 to +7.0 V VCC DC Supply Voltage (Referenced to GND) VIN DC Input Voltage (Referenced to GND) −0.5 to VCC +0.5 V DC Output Voltage (Referenced to GND) (Note 1) −0.5 to VCC +0.5 V VOUT IIK DC Input Diode Current ±20 mA IOK DC Output Diode Current ±50 mA IOUT DC Output Sink/Source Current ±50 mA ICC DC Supply Current, per Output Pin ±50 mA IGND DC Ground Current, per Output Pin ±100 mA TSTG Storage Temperature Range *65 to )150 _C TL Lead temperature, 1 mm from Case for 10 Seconds 260 _C TJ Junction Temperature Under Bias 140 _C qJA Thermal Resistance (Note 2) 65.8 110.7 _C/W MSL Moisture Sensitivity FR Flammability Rating VESD ILatchup SOIC TSSOP Level 1 Oxygen Index: 30% − 35% ESD Withstand Voltage Latchup Performance UL 94 V−0 @ 0.125 in Human Body Model (Note 3) Machine Model (Note 4) Charged Device Model (Note 5) Above VCC and Below GND at 85_C (Note 6) > 2000 > 200 > 1000 V ±100 mA Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. IOUT absolute maximum rating must be observed. 2. The package thermal impedance is calculated in accordance with JESD 51−7. 3. Tested to EIA/JESD22−A114−A. 4. Tested to EIA/JESD22−A115−A. 5. Tested to JESD22−C101−A. 6. Tested to EIA/JESD78. RECOMMENDED OPERATING CONDITIONS Symbol VCC VIN, VOUT Parameter Min DC Input Voltage (Referenced to GND) DC Input Voltage, Output Voltage (Referenced to GND) Max Unit 4.5 Typ 5.5 V 0 VCC V −40 25 +85 °C 0 0 10 8.0 10 8.0 ns/V Output Current − High − − −24 mA Output Current − Low − − 24 mA TA Operating Temperature, All Package Types tr, tf Input Rise and Fall Time (Note 8) IOH IOL VCC = 4.5 V VCC = 5.5 V Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond the Recommended Operating Ranges limits may affect device reliability. 7. Unused Inputs may not be left open. All inputs must be tied to a high voltage level or low logic voltage level. 8. Vin from 0.8 V to 2.0 V; refer to individual Data Sheets for devices that differ from the typical input rise and fall times. www.onsemi.com 2 MC74ACT241 DC CHARACTERISTICS Symbol Parameter TA = +255C VCC (V) Typ TA = −405C to +855C Guaranteed Limits Unit Conditions VIH Minimum High Level Input Voltage 4.5 5.5 1.5 1.5 2.0 2.0 2.0 2.0 V V VOUT = 0.1 V or VCC − 0.1 V VIL Maximum Low Level Input Voltage 4.5 5.5 1.5 1.5 0.8 0.8 0.8 0.8 V V VOUT = 0.1 V or VCC − 0.1 V VOH Minimum High Level Output Voltage 4.5 5.5 4.49 5.49 4.4 5.4 4.4 5.4 V V IOUT = −50 mA 4.5 5.5 − 3.86 4.86 3.76 4.76 V V *VIN = VIL or VIH IOH 4.5 5.5 0.001 0.001 0.1 0.1 0.1 0.1 V V IOUT = 50 mA 4.5 5.5 − 0.36 0.36 0.44 0.44 V V *VIN = VIL or VIH IOL Maximum Input Leakage Current 5.5 − ±0.1 ±1.0 mA VI = VCC, GND Additional Maximum ICC/Input 5.5 0.6 − 1.5 mA VI = VCC − 2.1 V Maximum 3−State Current 5.5 − ±0.5 ±5.0 mA VI (OE) = VIL, VIH VI = VCC, GND VO = VCC, GND IOLD IOHD †Minimum Dynamic Output Current 5.5 5.5 − − 75 −75 mA mA VOLD = 1.65 V Max VOHD = 3.85 V Min ICC Maximum Quiescent Supply Current 5.5 − 8.0 80 mA VIN = VCC or GND VOL IIN DICCT IOZ Maximum Low Level Output Voltage −24 mA −24 mA 24 mA 24 mA Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. *All outputs loaded; thresholds on input associated with output under test. †Maximum test duration 2.0 ms, one output loaded at a time. AC CHARACTERISTICS tr = tf = 3.0 ns (For Figures and Waveforms, See Figures 2, 3, and 4.) Parameter Symbol TA = +255C CL = 50 pF TA = −405C to +855C CL = 50 pF VCC* (V) Min Typ Max Min Max Unit tPLH Propagation Delay Data to Output 5.0 1.5 6.5 9.0 1.5 10.0 ns tPHL Propagation Delay Data to Output 5.0 1.5 7.0 9.0 1.5 10.0 ns tPZH Output Enable Time 5.0 1.5 6.0 9.0 1.0 10.0 ns tPZL Output Enable Time 5.0 1.5 7.0 10.0 1.5 11.0 ns tPHZ Output Disable Time 5.0 1.5 8.0 10.5 1.5 11.5 ns tPLZ Output Disable Time 5.0 2.0 7.0 10.5 1.5 11.5 ns *Voltage Range 5.0 V is 5.0 V ±0.5 V CAPACITANCE Symbol Value Typ Unit Test Conditions CIN Input Capacitance Parameter 4.5 pF VCC = 5.0 V CPD Power Dissipation Capacitance 45 pF VCC = 5.0 V www.onsemi.com 3 MC74ACT241 SWITCHING WAVEFORMS tf tr 3.0 V 50% INPUT DATA GND tw 1/fmax tPHL tPLH OUTPUT 50% Figure 2. 3.0 V OE1 1.3 V GND 3.0 V OE2 1.3 V GND tPZL tPLZ OUTPUT Y (12, 14, 16, 18) HIGH IMPEDANCE 1.3 V 10% VOL 90% VOH tPZH tPHZ OUTPUT Y (3, 5, 7, 9) 1.3 V HIGH IMPEDANCE Figure 3. 450 W INPUT OUTPUT DEVICE UNDER TEST 50 W SCOPE TEST POINT CL * *Includes all probe and jig capacitance Figure 4. Test Circuit www.onsemi.com 4 MC74ACT241 ORDERING INFORMATION Package Shipping† MC74ACT241DWG SOIC−20 (Pb−Free) 38 Units / Rail MC74ACT241DWR2G SOIC−20 (Pb−Free) 1000 / Tape & Reel MC74ACT241DTR2G TSSOP−20 (Pb−Free) 2500 / Tape & Reel Device †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. www.onsemi.com 5 MC74ACT241 PACKAGE DIMENSIONS TSSOP−20 DT SUFFIX CASE 948E−02 ISSUE C 20X 0.15 (0.006) T U 2X K REF 0.10 (0.004) S L/2 20 M T U S V K K1 ÍÍÍÍ ÍÍÍÍ ÍÍÍÍ S J J1 11 B L SECTION N−N −U− PIN 1 IDENT 0.25 (0.010) N 1 10 M 0.15 (0.006) T U S A −V− N F DETAIL E C G D H DETAIL E 0.100 (0.004) −T− SEATING NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE. 5. DIMENSION K DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE K DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 7. DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE −W−. MILLIMETERS INCHES DIM MIN MAX MIN MAX A 6.40 6.60 0.252 0.260 B 4.30 4.50 0.169 0.177 C --1.20 --0.047 D 0.05 0.15 0.002 0.006 F 0.50 0.75 0.020 0.030 G 0.65 BSC 0.026 BSC −W− H 0.27 0.37 0.011 0.015 J 0.09 0.20 0.004 0.008 J1 0.09 0.16 0.004 0.006 K 0.19 0.30 0.007 0.012 K1 0.19 0.25 0.007 0.010 L 6.40 BSC 0.252 BSC M 0_ 8_ 0_ 8_ PLANE SOLDERING FOOTPRINT* 7.06 1 0.65 PITCH 16X 0.36 16X 1.26 DIMENSIONS: MILLIMETERS *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. www.onsemi.com 6 MC74ACT241 PACKAGE DIMENSIONS SOIC−20W DW SUFFIX CASE 751D−05 ISSUE G 20 11 X 45 _ h H M E 0.25 10X NOTES: 1. DIMENSIONS ARE IN MILLIMETERS. 2. INTERPRET DIMENSIONS AND TOLERANCES PER ASME Y14.5M, 1994. 3. DIMENSIONS D AND E DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE. 5. DIMENSION B DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE PROTRUSION SHALL BE 0.13 TOTAL IN EXCESS OF B DIMENSION AT MAXIMUM MATERIAL CONDITION. q A B M D 1 10 20X B B 0.25 M T A S B S L A 18X e A1 DIM A A1 B C D E e H h L q MILLIMETERS MIN MAX 2.35 2.65 0.10 0.25 0.35 0.49 0.23 0.32 12.65 12.95 7.40 7.60 1.27 BSC 10.05 10.55 0.25 0.75 0.50 0.90 0_ 7_ SEATING PLANE C T ON Semiconductor and the are registered trademarks of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries. SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada Email: [email protected] N. American Technical Support: 800−282−9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81−3−5817−1050 www.onsemi.com 7 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative MC74ACT241/D