MC74ACT640 Octal 3-State Inverting Transciever The MC74ACT640 octal bus transceiver is designed for asynchronous two-way communication between data buses. The device transmits data from bus A to bus B when T/R = HIGH, or from bus B to bus A when T/R = LOW. The enable input can be used to disable the device so the buses are effectively isolated. www.onsemi.com Features • • • • SOIC−20W DW SUFFIX CASE 751D Bidirectional Data Path A and B Outputs Sink 24 mA/Source −24 mA TTL Compatible Inputs These are Pb−Free Devices 1 ORDERING INFORMATION VCC OE B0 B1 B2 B3 B4 B5 B6 B7 20 19 18 17 16 15 14 13 12 11 See detailed ordering and shipping information in the package dimensions section on page 5 of this data sheet. DEVICE MARKING INFORMATION See general marking information in the device marking section on page 5 of this data sheet. 1 2 3 4 5 6 7 8 9 10 T/R A0 A1 A2 A3 A4 A5 A6 A7 GND Figure 1. Pinout: 20−Lead Packages Conductors (Top View) PIN ASSIGNMENT PIN FUNCTION A0−A7 Side A Inputs or 3-State Outputs OE Output Enable Input T/R Transmit/Receive Input B0−B7 Side B Inputs or 3-State Outputs TRUTH TABLE Valid Direction I/P→O/P Output X OE T/R Applied Inputs H X X X L H H A to B L L H L A to B H L L H B to A L L L L B to A H H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial © Semiconductor Components Industries, LLC, 2015 March, 2015 − Rev. 4 1 Publication Order Number: MC74ACT640/D MC74ACT640 MAXIMUM RATINGS Symbol Parameter Value Unit −0.5 to +7.0 V VCC DC Supply Voltage (Referenced to GND) VIN DC Input Voltage (Referenced to GND) −0.5 to VCC +0.5 V DC Output Voltage (Referenced to GND) (Note 1) −0.5 to VCC +0.5 V VOUT IIK DC Input Diode Current ±20 mA IOK DC Output Diode Current ±50 mA IOUT DC Output Sink/Source Current ±50 mA ICC DC Supply Current, per Output Pin ±50 mA IGND DC Ground Current, per Output Pin ±100 mA TSTG Storage Temperature Range *65 to )150 _C TL Lead temperature, 1 mm from Case for 10 Seconds 260 _C TJ Junction Temperature Under Bias 140 _C qJA Thermal Resistance (Note 2) 65.8 _C/W MSL Moisture Sensitivity FR Flammability Rating VESD ILatchup Level 1 Oxygen Index: 30% − 35% ESD Withstand Voltage Latchup Performance UL 94 V−0 @ 0.125 in Human Body Model (Note 3) Machine Model (Note 4) Charged Device Model (Note 5) Above VCC and Below GND at 85_C (Note 6) > 2000 > 200 > 1000 V ±100 mA Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. IOUT absolute maximum rating must be observed. 2. The package thermal impedance is calculated in accordance with JESD 51−7. 3. Tested to EIA/JESD22−A114−A. 4. Tested to EIA/JESD22−A115−A. 5. Tested to JESD22−C101−A. 6. Tested to EIA/JESD78. RECOMMENDED OPERATING CONDITIONS Symbol VCC Vin, Vout Parameter Min DC Input Voltage (Referenced to GND) DC Input Voltage, Output Voltage (Referenced to GND) Typ Max Unit 4.5 5.5 V 0 VCC V −40 25 +85 °C 0 0 10 8.0 10 8.0 ns/V Output Current − High −24 mA Output Current − Low 24 mA TA Operating Temperature, All Package Types tr, tf Input Rise and Fall Time (Note 8) IOH IOL VCC = 4.5 V VCC = 5.5 V Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond the Recommended Operating Ranges limits may affect device reliability. 7. Unused Inputs may not be left open. All inputs must be tied to a high voltage level or low logic voltage level. 8. Vin from 0.8 V to 2.0 V; refer to individual Data Sheets for devices that differ from the typical input rise and fall times. www.onsemi.com 2 MC74ACT640 DC CHARACTERISTICS Symbol Parameter TA = −405C to +855C TA = +255C VCC (V) Typ Guaranteed Limits Unit Conditions VIH Minimum High Level Input Voltage 4.5 5.5 1.5 1.5 2.0 2.0 2.0 2.0 V V VOUT = 0.1 V or VCC − 0.1 V VIL Maximum Low Level Input Voltage 4.5 5.5 1.5 1.5 0.8 0.8 0.8 0.8 V V VOUT = 0.1 V or VCC − 0.1 V VOH Minimum High Level Output Voltage 4.5 5.5 4.49 5.49 4.4 5.4 4.4 5.4 V V IOUT = −50 mA 3.86 4.86 3.76 4.76 V V *VIN = VIL or VIH IOH 0.1 0.1 0.1 0.1 V V IOUT = 50 mA 4.5 5.5 0.36 0.36 0.44 0.44 V V *VIN = VIL or VIH IOH Maximum Input Leakage Current 5.5 ±0.1 ±1.0 mA VI = VCC, GND DICCT Additional Max. ICC/Input 5.5 1.5 mA VI = VCC − 2.1 V IOZ Maximum 3−State Current 5.5 ±0.5 ±5.0 mA VI (OE) = VIL, VIH VI = VCC, GND VO = VCC, GND IOLD IOHD †Minimum Dynamic Output Current 5.5 5.5 75 −75 mA mA VOLD = 1.65 V Max ICC Maximum Quiescent Supply Current 5.5 80 mA VIN = VCC or GND 4.5 5.5 VOL IIN Maximum Low Level Output Voltage 4.5 5.5 0.001 0.001 0.6 8.0 −24 mA −24 mA −24 mA −24 mA *All outputs loaded; thresholds on input associated with output under test. †Maximum test duration 2.0 ms, one output loaded at a time. AC CHARACTERISTICS tr = tf = 3.0 ns (For Figures and Waveforms, See Figures 2 and 3.) VCC* (V) TA = +255C CL = 50 pF TA = −405C to +855C CL = 50 pF Min Max Min Max Unit tPLH Propagation Delay An to Bn or Bn to An 5.0 1.5 8.0 1.0 8.5 ns tPHL Propagation Delay An to Bn or Bn to An 5.0 1.5 8.0 1.0 9.0 ns tPZH Output Enable Time OE to An or Bn 5.0 1.5 10.0 1.0 11.0 ns tPZL Output Enable Time OE to An or Bn 5.0 1.5 10.0 1.0 11.0 ns tPHZ Output Disable Time T/R or OE to An or Bn 5.0 1.5 10.0 1.0 11.0 ns tPLZ Output Disable Time T/R or OE to An or Bn 5.0 1.5 10.0 1.0 11.0 ns Symbol Parameter *Voltage Range 5.0 V is 5.0 V ±0.5 V CAPACITANCE Symbol Value Typ Unit Test Conditions CIN Input Capacitance Parameter 4.5 pF VCC = 5.0 V CI/O Input/Output Capacitance 15 pF VCC = 5.0 V CPD Power Dissipation Capacitance 45 pF VCC = 5.0 V www.onsemi.com 3 MC74ACT640 SWITCHING WAVEFORMS 3.0 V T/R tr INPUT A or B 3.0 V 90% 50% 10% tPHL 3.0 V GND tTHL 50% OE tPLH GND tPZL tPLZ 90% 50% 10% OUTPUT A or B GND tf 50% A OR B 10% VOL 90% VOH tPZH tPHZ tTLH 50% A OR B Figure 2. HIGH IMPEDANCE Figure 3. 450 W INPUT HIGH IMPEDANCE OUTPUT DEVICE UNDER TEST 50 W SCOPE TEST POINT CL * *Includes all probe and jig capacitance Figure 4. Test Circuit www.onsemi.com 4 MC74ACT640 ORDERING INFORMATION Package Shipping† MC74ACT640DWG SOIC−20 (Pb−Free) 38 Units / Rail MC74ACT640DWR2G SOIC−20 (Pb−Free) 1000 / Tape & Reel Device †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. MARKING DIAGRAMS SOIC−20W 20 ACT640 AWLYYWWG 1 A WL YY, Y WW G = Assembly Location = Wafer Lot = Year = Work Week = Pb−Free Package www.onsemi.com 5 MC74ACT640 PACKAGE DIMENSIONS SOIC−20W DW SUFFIX CASE 751D−05 ISSUE G 20 11 X 45 _ h H M E 0.25 10X NOTES: 1. DIMENSIONS ARE IN MILLIMETERS. 2. INTERPRET DIMENSIONS AND TOLERANCES PER ASME Y14.5M, 1994. 3. DIMENSIONS D AND E DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE. 5. DIMENSION B DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE PROTRUSION SHALL BE 0.13 TOTAL IN EXCESS OF B DIMENSION AT MAXIMUM MATERIAL CONDITION. q A B M D 1 10 20X B B 0.25 M T A S B S L A 18X e A1 DIM A A1 B C D E e H h L q MILLIMETERS MIN MAX 2.35 2.65 0.10 0.25 0.35 0.49 0.23 0.32 12.65 12.95 7.40 7.60 1.27 BSC 10.05 10.55 0.25 0.75 0.50 0.90 0_ 7_ SEATING PLANE C T ON Semiconductor and the are registered trademarks of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries. SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. 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