Demo Note for the A8582 Evaluation Board 4.7VIN – 40VIN, 3.3VOUT, 2.0A, 2MHz Asynchronous Buck Regulator Page 1 of 10 April 29, 2011 GENERAL SPECIFICATIONS Specification Absolute Maximum Input Voltage Operating Input Voltage Range VIN START Threshold, VIN rising VIN STOP Threshold, VIN falling Output Voltage (FB: 5.23K/16.5K, ±1%) Steady-State Output Current (12VIN) Pulse-by-pulse Current Limit @ 30% Enable/Synchronization Input Min –0.3 4.7 − − 3.20 − 2.6 –0.3 Nom − 12 4.2 3.8 3.32 2.0 − − Max 40 36 4.6 4.2 3.44 2.5 3.4 5.5 Units Volts Volts Volts Volts Volts A A Volts OPERATING INSTRUCTIONS Input Power Connection: Connect a 12V power supply from Vin to GND that is capable of at least 2A. Once operational, VIN can fall as low as 3.8VTYP (4.2VMAX) before the A8582 is reset. Enable Input Connection: Connect an Enable signal from EN/SYNC to GND. If the EN/SYNC input voltage is higher than 1.8V the A8582 will be enabled. If the EN/SYNC input voltage is lower than 0.8V the A8582 will be disabled. Also, EN/SYNC may be used to simultaneously enable the A8582 and synchronize the PWM switching frequency by applying a square wave above 2.2MHz. Note: Continuously applying more than 5.5V to the EN/SYNC pin may damage the A8582. Output Load Connections: Connect a load from VOUT to GND. The steady-state load current can be as high as 2.0A. Pulseby-pulse current limit and/or thermal shutdown will occur if the load is greater than 4.75A. DEMO BOARD PICTURE Page 2 of 10 April 29, 2011 DEMO BOARD SCHEMATIC TP1 Vin U1 A8582 VIN SW SW BOOT FBX TP3 EN/SYNC 7 EN/Sync TP4 SS TP14 GND TP15 GND TP16 GND TP17 GND CSS 22nF 0603 11.5K = 2MHz 4 TP5 FSET 8 TP6 COMP 11 RFSET 11.5K CP 10pF 0603 RZ 13 15.4K 14 TP8 BOOT 10 TP9 FBX EN/SYNC SS Cboot 100nF 50V 0603 Rboot Empty FB RFB1 16.5K 9 TP10 FB FSET CFBX 120pF 50V 0603 NC CO3 Empty xxV 8mm SW RS2 5.23K Bode Empty Snubber on bottom of PCB Rsnub 4.7 Csnub 470pF 0603 RFB2 5.23K 6 CO1 10uF 16V 1206 TP13 GND RPU 100K POK CO2 Empty 16V 1206 RS1 16.5K COMP TP11 Vout VOUT D1 B340A SMA TP12 POK RPD Empty 0 CZ 820pF 0603 SW 16 15 1 Vin Vin Vin GND GND AC C1 47uF 50V 8mm 1 2 3 5 12 CIN2 Empty 50V 1210 LO 2.2uH 5.2mm x 5.5mm IHLP2020BZER3R3M01 2 TP2 GND CIN1 3.3uF 50V 1210 TP7 SW RPD should be used if Vout > 5.5V A8582 Evaluation PCB 12Vin / 3.3Vout: RFB1 = 16.5K, RFB2 = 5.23K 15.4K, 820pF, 4.7pF: 120KHz BW, 72deg PM Note: C1 is an optional, bulk, electrolytic capacitor for general supply filtering DEMO BOARD BILL-OF-MATERIALS Page 3 of 10 April 29, 2011 DEMO BOARD PERFORMANCE Page 4 of 10 April 29, 2011 Page 5 of 10 April 29, 2011 12Vin, 2.0A Load: 0dB at 140KHz, PM=59.8deg, GM=13.7dB Iout (A) A8582 (deg C) D1 (deg C) Lo (deg C) 0.25 31.3 31.0 29.5 0.5 34.8 35.4 32.5 1.0 39.9 42.9 37.2 1.5 44.9 50.6 42.8 2.0 50.9 58.6 49.3 2.5 57.7 67.8 57.3 Shorted Vout 30.0 34.9 29.0 Component Temperatures vs Load Current 12Vin, 3.3Vout, 2MHz, TAMB=25deg C No Airflow (still air) Page 6 of 10 April 29, 2011 Startup 12Vin, 2.2A (1.5Ω) load CH1=Vout, CH2=COMP, CH3=EN, CH4=SS Shutdown 12Vin, 2.2A (1.5Ω) load CH1=Vout, CH2=COMP, CH3=EN, CH4=SS Output Voltage Ripple 12Vin, 2.2A (1.5Ω) load CH1=Vout (20mV/DIV) Transient Response 12Vin, 0.4A to 1.5A (1.1A step) CH1=Vout, CH2=COMP, CH4=Iout Page 7 of 10 April 29, 2011 SWN Voltage at 12Vin, 150mA load CH1=SWN (5V/DIV), 200ns/DIV SWN Voltage at 12Vin, 2.2A load CH1=SWN (5V/DIV), 200ns/DIV Input Voltage Ripple at 12Vin, 2.2A load CH1=Vin across CIN1 (50mV/DIV) Output Shorted, Hiccup Mode Operation CH1=Vout, CH2=COMP, CH3=SS, CH4=IL Page 8 of 10 April 29, 2011 DEMO PCB LAYOUT: Top Layer and Top Silk Layer 2 and Top Silk Page 9 of 10 April 29, 2011 Layer 3 and Top Silk Bottom Layer and Top Silk Page 10 of 10 April 29, 2011