Demo Note for the A8583 Evaluation Board 4.7VIN – 40VIN, 3.3VOUT, 3.5A, 2MHz Asynchronous Buck Regulator Page 1 of 10 September 24, 2010 GENERAL SPECIFICATIONS Specification Absolute Maximum Input Voltage Operating Input Voltage Range VIN START Threshold, VIN rising VIN STOP Threshold, VIN falling Output Voltage (FB: 5.23K/16.5K, ±1%) Steady-State Output Current (12VIN) Pulse-by-pulse Current Limit Enable/Synchronization Input Min –0.3 4.7 − − 3.20 − 4.75 –0.3 Nom − 12 4.2 3.8 3.32 3.5 − − Max 40 36 4.6 4.2 3.44 4.0 6.25 5.5 Units Volts Volts Volts Volts Volts A A Volts OPERATING INSTRUCTIONS Input Power Connection: Connect a 12V power supply from Vin to GND that is capable of at least 3A. Once operational, VIN can fall as low as 3.8VTYP (4.2VMAX) before the A8583 is reset. Enable Input Connection: Connect an Enable signal from EN/SYNC to GND. If the EN/SYNC input voltage is higher than 1.8V the A8583 will be enabled. If the EN/SYNC input voltage is lower than 0.8V the A8583 will be disabled. Also, EN/SYNC may be used to simultaneously enable the A8583 and synchronize the PWM switching frequency by applying a square wave above 2.2MHz. Note: Continuously applying more than 5.5V to the EN/SYNC pin may damage the A8583. Output Load Connections: Connect a load from VOUT to GND. The steady-state load current can be as high as 3.5A. Pulseby-pulse current limit and/or thermal shutdown will occur if the load is greater than 4.75A. DEMO BOARD PICTURE Page 2 of 10 September 24, 2010 DEMO BOARD SCHEMATIC 12Vin, 2MHz, 3.3Vout at 3.5A TP2 GND CIN1 3.3uF 50V 1210 C1 47uF 50V 8mm 1 2 3 5 12 CIN2 Empty 50V 1210 Vin Vin Vin GND GND SW SW BOOT FBX EN/Sync 7 TP4 SS TP14 GND TP15 GND TP16 GND TP17 GND CSS 22nF 0603 11.5K = 2MHz 4 TP5 FSET 8 TP6 COMP 11 RFSET 11.5K CP 4.7pF 0603 RZ 13 18.2K CZ 1.2nF 0603 14 TP8 BOOT 10 TP9 FBX FB 9 TP11 Vout VOUT CO3 Empty xxV 8mm D1 SSB44 SMB CO2 10uF 16V 1206 CO1 10uF 16V 1206 TP13 GND RS1 16.5K SW CFBX 120pF 50V 0603 EN/SYNC SS Cboot 100nF 50V 0603 TP10 FB RFB1 16.5K RS2 5.23K Bode Empty RFB2 5.23K FSET RPU 100K COMP NC POK 6 TP12 POK RPD Empty 0 TP3 EN/SYNC SW 16 15 LO 1.5uH 6.5mm x 7.0mm IHLP2525CZER1R5M01 TP7 SW 2 VIN A8583 C A U1 1 TP1 Vin A8583 Evaluation PCB 12Vin / 3.3Vout: RFB1 = 16.5K, RFB2 = 5.23K 18.2K, 1.2nF, 4.7pF: 150KHz BW, 68deg PM Note: C1 is an optional, bulk, electrolytic capacitor for general supply filtering DEMO BOARD BILL-OF-MATERIALS Page 3 of 10 September 24, 2010 DEMO BOARD PERFORMANCE Page 4 of 10 September 24, 2010 Page 5 of 10 September 24, 2010 12Vin, 3.5A Load: 0dB at 145KHz, PM=64deg, GM=8dB Iout (A) A8583 (deg C) D1 (deg C) Lo (deg C) 0.5 32.3 32.9 30.4 1.0 36.2 39.5 34.2 1.5 40.6 46.5 38.6 2.0 47.2 55.3 44.5 2.5 54.4 66.3 51.4 3.5 73.5 91.1 67.3 Shorted Vout 30.8 34.7 29.5 Component Temperatures vs Load Current 12Vin, 3.3Vout, 2MHz, TAMB=25deg C No Airflow (still air) Page 6 of 10 September 24, 2010 Startup 12Vin, 2.2A (1.5Ω) load CH1=Vout, CH2=COMP, CH3=SS, CH4=POK Shutdown 12Vin, 2.2A (1.5Ω) load CH1=Vout, CH2=COMP, CH3=SS, CH4=POK Output Voltage Ripple 12Vin, 2.2A (1.5Ω) load CH1=Vout (20mV/DIV) Transient Response 12Vin, 0.35A to 1.9A (1.55A step) CH1=Vout, CH2=COMP, CH4=Iout Page 7 of 10 September 24, 2010 SWN Voltage at 12Vin, 150mA load CH1=SWN (5V/DIV), 200ns/DIV SWN Voltage at 12Vin, 2.2A load CH1=SWN (5V/DIV), 100ns/DIV Input Voltage Ripple at 12Vin, 2.2A load CH1=Vin across CIN1 (50mV/DIV) Output Shorted, Hiccup Mode Operation CH1=Vout, CH2=COMP, CH3=SS, CH4=Iin Page 8 of 10 September 24, 2010 DEMO PCB LAYOUT: Top Layer and Top Silk Layer 2 and Top Silk Page 9 of 10 September 24, 2010 Layer 3 and Top Silk Bottom Layer and Top Silk Page 10 of 10 September 24, 2010