NCP1249A/B + NCP4355B Very Low No-load Power Consumption Flyback Converter with Peak Power Excursion Evaluation Board User'sManual EVAL BOARD USER’S MANUAL Overview The device switches at 65 kHz which represents a good trade−off between switching losses and flyback transformer size. The adapter consists of several important sections. The first is an input EMI filter to reduce the conducted EMI to the ac line at the input of the adapter. The EMI filter is formed by common−mode inductor L4 and capacitors C22, C12, C13 and C11 with differential mode inductor L2. The varistor R33 is used protect the adapter against the line overvoltage peaks. When the power supply is disconnected from the AC mains, X capacitors C22, C11 and Y capacitors C12 and C13 are discharged through HV pin via the following path: rectifying diodes D1, D4, surge protection resistive network R1, R2. This feature replaces commonly used discharging resistors and saves approximately 25 mW of input power consumption at 230 V(AC) line. A following block is the rectifier with a bulk capacitor. The main power stage of the flyback converter utilizes the low RDSon MOSFET SPP11N60C3 along with a custom designed transformer TR1 KA5038−BL, from the Coilcraft company. The detailed design procedure of flyback adapter can be found in the application notes AND8461/D and AN9115/D at ON Semiconductor website: http://www.onsemi.com. The secondary side rectification is done by a low forward voltage drop Schottky diode NTST30100SG from ON Semiconductor. A simple RC snubber (R12 and C5) across the secondary rectifier damps any high frequency ringing caused the unclamped leakage inductance of the transformer secondary side. The secondary−side controller NCP4355B provides the output voltage regulation. Output voltage is set by voltage divider R26, R32, R37 and R41. Regulation output is coupled via the optocoupler (OK1) to the primary side controller NCP1249. The secondary controller also detects a very light load via D19, R42, C27, R43 and R44 via OFFDET pin. When light load condition is detected, primary controller is switched into the OFF mode operation via optocoupler OK2 through the ONOFF pin. The NCP4355 controls the primary controller with an “Active ON” signal, meaning that it only drives optocoupler current during the ON mode to minimize consumption during the OFF mode operation. The built−in LED driver of the NCP4355 indicates primary side operation (when SMPS is not in OFF mode). The LED driver switches with a 1 kHz frequency and 12% duty cycle in order to optimize LED efficiency. The presented design demonstrates a switching mode AC/DC adapter with an extraordinary stand−by consumption (<10 mW) and high−efficiency operation. The design utilizes a primary flyback controller NCP1249A/B and the secondary side controller NCP4355B. The NCP1249 is a fixed frequency current mode controller featuring a peak power excursion. More over the NCP1249 supports a high−voltage start−up, OFF mode and an integrated X2 cap discharging feature that significantly reduces the input power at very light load or no load conditions. The NCP1249 architecture is arranged to authorize a transient peak power excursion when the peak current hits the nominal current limit. At the point where the current reaches the current limit the switching frequency is increased from 65 kHz to 130 kHz until the peak power requirement disappears. The NCP1249 controller also includes frequency fold−back and skip mode feature to provide high efficiency in light load. The secondary side controller, NCP4355B, provides output voltage regulation, very light−load condition detection, OFF mode control and indication LED driver. The NCP4355 communicates with a primary controller featuring OFF mode detection at the REM pin. Key Features • • • • • • Constant voltage regulation Very low input power at light and no load High−voltage start−up Peak power excursion Overpower protection Universal mains operation Circuit Description The primary side uses a flyback topology, providing the advantage of a cost effective power stage design. The design operates in both CCM (continuous conduction mode) and DCM (discontinuous conduction mode), allowing it to accept a wide universal input voltage range. The CCM operation provides desired full load performance with a good efficiency and low ripple of the primary current. The DCM operation permits an increased efficiency under light load conditions by decreasing the switching losses. © Semiconductor Components Industries, LLC, 2014 April, 2014 − Rev. 0 http://onsemi.com 1 Publication Order Number: EVBUM2221/D NCP1249A/B + NCP4355B Symbol Value Unit Input Voltage VIN 85 – 265 VAC Input Frequency fIN 30 – 80 Hz VOUT 19.0 V IOUTNOM 3.4 A Efficiency IOUT> 3% IOUTMAX η >84 % Efficiency IOUT > 25% IOUTMAX η >89 % No-Load Power Consumption VIN = 115 V/ 60 Hz PIN 6.1 mW No-Load Power Consumption VIN = 230 V/ 50 Hz PIN 9.1 mW VOUT_PK−PK 45 mV LOADREG 18.7 mV/A Maximal Load Resistance to Stay in On-Mode ROUTON 4.4 kW Minimal Load Resistance to Activate Off-Mode ROUTOFF 5.5 kW 156x59x27 mm Parameter Output Voltage Nominal Output Current Output Voltage Ripple IOUT = 3.5 A Load Regulation IOUT = 50 mA to 3.5 A Board Dimension http://onsemi.com 2 NCP1249A/B + NCP4355B Schematic Figure 1. Demo Board Schematic http://onsemi.com 3 NCP1249A/B + NCP4355B No Load Power Consumption Load Regulation Power consumption was measured by a Yokogawa WT210. The input power was integrated for 60 minutes and averaged from 3 measurements. The output voltage regulation is affected by a voltage drop on an output common mode inductor. Therefore output voltage is measured in front of that inductor. Input voltage [V; Hz] Input power [mW] 85 V; 60 Hz 2.9 115 V; 60 Hz 6.1 230 V; 50 Hz 9.1 265 V; 50 Hz 11.5 Figure 2. Load Regulation is 18.7 mV/A http://onsemi.com 4 NCP1249A/B + NCP4355B Efficiency vs. Load NCP1249A/B + NCP4355 Adapter Efficiency 95.0% 90.0% yc n e ic if fE 85.0% 80.0% 0.0% 10.0% 20.0% 30.0% 40.0% 50.0% 60.0% 70.0% Pout/Poutmax Efficiency@115V/60Hz Efficiency@230V/50Hz Figure 3. Converter Efficiency for Low and High Line http://onsemi.com 5 80.0% 90.0% 100.0% NCP1249A/B + NCP4355B Output Voltage Ripple Figure 4. VIN = 230 VAC, IOUT = 100 mA, primary controller is in skip mode, DVOUTPK−PK = 55 mV http://onsemi.com 6 NCP1249A/B + NCP4355B Figure 5. VIN = 230 VAC, IOUT = 500 mA, DVOUTPK−PK = 45 mV http://onsemi.com 7 NCP1249A/B + NCP4355B Figure 6. VIN = 230 VAC, IOUT = 1.0 A, DVOUTPK−PK = 48 mV http://onsemi.com 8 NCP1249A/B + NCP4355B Figure 7. VIN = 230 VAC, IOUT = 3.5 A, DVOUTPK−PK = 45 mV http://onsemi.com 9 NCP1249A/B + NCP4355B Full−load Operation at High−line and Low Line Figure 8. Full Load Operation at High−line, DCM Operation, VIN = 230 VAC, IOUT = 3.5 A http://onsemi.com 10 NCP1249A/B + NCP4355B Figure 9. Full Load Operation at Low−line, CCM Operation, VIN = 115 VAC, IOUT = 3.5 A http://onsemi.com 11 NCP1249A/B + NCP4355B Figure 10. CCM operation starts at IOUT = 2.4 A at low−line, VIN = 115 VAC http://onsemi.com 12 NCP1249A/B + NCP4355B High Voltage Start−up plugged into mains the HV pin detects if the input voltage is in a brown−out condition. If the input voltage is higher than V_BO_on then the start−up current source is enabled. The VCC capacitors are charged in two steps. To protect HV current source from a short circuit at VCC pin the VCC capacitor is charged with a reduced current Istart1 until the voltage on the Vcc capacitors reach VCC_inhibit. Then the source toggles to a full charging current Istart2. Once the VCC_ON level is reached the primary controller is turned on and the soft−start sequence is performed. As previously mentioned, the HV startup/X2 discharge of the NCP1249 allows for very low stand−by power consumption levels that cannot be obtained with a classical resistive start−up network. During start up the primary controller NCP1249A/B features a high−voltage current source, which charges the VCC capacitors (C15, C14) at the device start−up. The HV−pin is wired to a full−wave rectified ac input through diodes (D1, D4) and surge protection resistive network R1, R2. Once the device is VCC_ON level reached Driver pulses enabled VCC_inhibit level reached Figure 11. High−Voltage Start−up Source http://onsemi.com 13 NCP1249A/B + NCP4355B Peak Power Excursion The switching frequency continues to linearly increase from 65 kHz up to 130 kHz if feedback pin voltage is in an overload region VFB = 3.2 V to 4.1 V. The maximum current peak continues to be limited to 0.8/Rsense which prevents the fly−back transformer core from saturating. This peak− power operation is limited by an over−load timer (Timer1 = 200 ms). Figure 12 shows a response of the controller to a short−term power demand. The output current is increased from 3 A to 6.4 A for a period of 200 ms. The NCP1249 controller family excels in applications that require peak power delivery for a short period of time. In order to handle these peak power requirements the NCP1249 features frequency excursion. In the case that the application requires more power the feedback pin voltage (VFB) increases. When the over−power limit is reached, the feedback pin will have VFB = VOVL = 3.2 V, and the current peak is limited to 0.8/Rsense. In order to deliver more power to the output the switching frequency has to be increased. Load peak Controller switching frequency is increased upto 130 kHz Figure 12. Peak Power Excursion, IOUT Step from 3 A to 6.4 A for 200 ms http://onsemi.com 14 NCP1249A/B + NCP4355B Figure 13. Peak Power Excursion, Detail View, fsw=123 kHz http://onsemi.com 15 NCP1249A/B + NCP4355B OFF Mode pin is between the voltage divider created by R43 and R44. The capacitor C27 charging current is limited by R42 to avoid fully recharge by short and sporadic pulses in deep skip mode. When very light load is detected, ON/OFF pin stops sinking the current. The primary controller’s REM pin voltage increases and the primary IC goes in to OFF mode. The OFF mode is interrupted when VOUT is below VMIN level that is detected by VMIN comparator or NCP4355B VCC falls below ULO threshold (3.5 V). ONOFF current starts to flow causing the primary controller’s REM voltage decreases via the optocoupler (OK2). When primary REM is bellow V_REM_on level, the primary controller regains operation. The output capacitor is then recharged to the nominal output voltage. The OFF Mode of the NCP4355 is advantageous for systems that require very low no−load power consumption. The OFF mode detection is based on the comparison of the output voltage (on VCC) and the voltage loaded on with fixed resistors (D19, R42, C27, R43 and R44). When the output voltage is loaded with very low current the primary controller goes into skip mode and it stops switching for some time. While the output capacitors are discharged very slowly a fixed load R43 and R44 discharge C27 faster than the load current discharges the output voltage on the output capacitors. The OFF-mode operation is activated in the case that the output current is below a predetermined set level. In this design, the off mode threshold is set to approximately 3.5 mA. This condition is detected by OFFDET comparator built−in NCP4355B secondary side controller. The OFFDET OFF Mode Duration is 171 sec Figure 14. Off Mode Hicup with Iout = 0 A http://onsemi.com 16 NCP1249A/B + NCP4355B Load Detection Speed Up Circuit When there is no additional speed up circuit, shown in Figure 15, and the SMPS is in OFF mode and a load is connected to its output, the converter output voltage drops to VMIN level then the primary side is switched on and the output voltage is recharged to its nominal level. The output capacitor discharging may take some time that can be, in some applications, unwanted. Alternatively the OFF mode can be easily end by an OFFDET comparator feature. When OFFDET voltage goes above 10% of VCC voltage it breaks the OFF mode before VMIN voltage is reached. The load detection circuit consists of D16, R20, R40, C24, Q2 and no R22. When there is no load output capacitors C6, C7, C8 and C9 are discharged slower than the VCC capacitors C24 and C25. These VCC capacitors get recharged from the output capacitors to a voltage VOUT−VD16. In the no load condition transistor Q2 is doesn’t conduct. When the SMPS is loaded, the output capacitors are discharged by the load faster than VCC capacitors by the ICC current. This will create a reverse voltage drop on diode D16. The voltage on D16 biases Q2 so that it will start to conduct through resistor R40 and change the OFFDET divider. OFFDET voltage increases, then once it crosses 10% of VCC the OFF mode is ended. Figure 15. Speed Up Circuit Schematic http://onsemi.com 17 NCP1249A/B + NCP4355B Load connected here Off−mode is left 1.17s after load connection Speed−up circuit is disabled Figure 16. VIN = 230 VAC, IOUT = 0 A −> 10 mA, load is connected to the output in off mode, speed−up circuit is disabled http://onsemi.com 18 NCP1249A/B + NCP4355B Load connected here OFFDET is lifted above 10% VCC Speed−up circuit is enabled Off−mode is left 142ms after load connection Figure 17. VIN = 230 VAC, IOUT = 0 A −> 10 mA, load is connected to the output in off mode, speed−up circuit is enabled http://onsemi.com 19 NCP1249A/B + NCP4355B X2 Discharger The NCP1249 X2 discharge circuitry uses a dedicated pin (X2) together with an external charge pump sensing network to detect whether the application is plugged into the mains or not. The charge pump circuitry consist of resistors R3, R4, R8, R9, capacitors C2, C3 and diodes D5, and D6. If there is an AC voltage present at input terminals the capacitor C3 is being charged via the charge pump circuitry. Once the AC voltage disappears C3 is discharged via R9. Voltage on X2 pin falls below a threshold Vth_X2 and X2_Timer is enabled. Once the X2_Timer elapses the HV start−up current source is enabled, thus the discharge paths for X2 capacitor is created. X2_Timer Duration Figure 18. VIN = 230 VAC, IOUT = 1.0 A, when main is disconnected 132 ms hold−off time is started, after this time X2 cap is discharged. Discharging time is much shorter than is needed by norm (~150 ms << 1 s) http://onsemi.com 20 NCP1249A/B + NCP4355B Load Transient Response Current slew rate is 125 mA/1 ms for all transients. Figure 19. Load step−up from 20% to 100% IOUT, VIN = 230 VAC, VOUT_DROP = 250 mV http://onsemi.com 21 NCP1249A/B + NCP4355B Figure 20. Load step−down from 100% to 20% IOUT, VIN = 230 VAC, VOUT_OVERSHOOT = 256 mV http://onsemi.com 22 NCP1249A/B + NCP4355B Figure 21. Load step−up from 20% to 100% IOUT, VIN = 115 VAC, VOUT_DROP = 256 mV http://onsemi.com 23 NCP1249A/B + NCP4355B Figure 22. Load step−down from 100% to 20% IOUT, VIN = 115 VAC, VOUT_OVERSHOOT = 256 mV http://onsemi.com 24 NCP1249A/B + NCP4355B Gain Phase Characteristics • Crossover frequency is between 0.6 – 0.75 kHz • The phase−gain charts for various load conditions can Voltage Control Loop • Phase margin is never lower than 50° • Gain margin is never lower than 13 dB be seen in figures below. Figure 23. VIN = 115 VAC, IOUT = 100 mA Figure 24. VIN = 115 VAC, IOUT = 1.0 A Figure 25. VIN = 115 VAC, IOUT = 3.5 A http://onsemi.com 25 NCP1249A/B + NCP4355B Figure 26. VIN = 230 VAC, IOUT = 100 mA Figure 27. VIN = 230 VAC, IOUT = 1.0 A Figure 28. VIN = 230 VAC, IOUT = 3.5 A http://onsemi.com 26 NCP1249A/B + NCP4355B Conducted Emission Quasi−peak The design meets conducted electromagnetic interference international standards for domestic use. 90 Conducted Emission Quasi −peak dBΖV (Domestic) NCP1249 Demo Board 115V 80 LIMIT 70 60 ] V Ζ B 50 d [ l e v e L 40 30 20 10 100000 1000000 Frequency [Hz] 10000000 Figure 29. VIN = 115 VAC, IOUT = 3.5 A 90 Conducted Emission Quasi −peak dBmV (Domestic) NCP1249 Demo Board 115V 80 LIMIT 70 60 ] V ă B 50 d [ l e v e L 40 30 20 10 100000 1000000 Frequency [Hz] 10000000 Figure 30. VIN = 230 VAC, IOUT = 3.5 A Result Summary excursion feature perfectly fits applications where it is necessary to cover short peak power demand like printers, game stations, and others. Special thanks go to companies Coilcraft, Epcos and Würth that provided samples of their components for this demoboard. NCP1249A/B and NCP4355B controllers allow building cost effective, easy to design, high efficiency power supplies with very low no load input consumption. The presented demo board offers both an extraordinary no−load consumption and superb efficiency. The frequency http://onsemi.com 27 NCP1249A/B + NCP4355B Top Side Assembly Bottom Side Assembly http://onsemi.com 28 NCP1249A/B + NCP4355B Demo Board Photo http://onsemi.com 29 NCP1249A/B + NCP4355B ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. 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