NCP4305FBDAPGEVB NCP4305FBDAP Evaluation Board User'sManual 65W Off-Line Adapter with Synchronous Rectification and Featuring Very Low No-Load Power Consumption Overview The presented design demonstrates a switching mode AC/DC adapter with high efficiency through whole load range including no load consumption. The design utilizes a primary controller NCP1249C/D, secondary side CVCC and off-mode controller NCP4354A and last but not least synchronous rectification controller NCP4305. The NCP1249 is fixed frequency current mode flyback controller featuring a peak power excursion, high-voltage start-up, off-mode and X2 capacitor discharging feature. Secondary side controller NCP4354A features two OTAs that are used to provide constant voltage and constant current regulator, very light load condition detection, off-mode control and indication LED driver. NCP4354A communicates with primary controller featuring off-mode through regulation optocoupler. Secondary side synchronous controller NCP4305 is used to control a MOSFET transistor that is used in place of a rectification diode on the secondary side. The NCP4035 controller turns the synchronous rectifier transistor on in time for current to flow from the transformer to adapter output. Since the voltage drop on the transistor is lower than the voltage drop over a diode this leads to a higher overall efficiency adapter. The NCP4305 monitors the voltage across the synchronous rectification transistor and according to its magnitude and value; it turns the transistor on and off. This controller also includes feature light load detection that is used to modulate the driver output for smooth transitions between medium and light loads. In very light loads the light load detection feature will disable the controller to eliminate switching losses. ON Semiconductor’s newest synchronous rectifier has a 4 A drive and an 8 A sink driver. The strong and robust driver of the NCP4305 allows for a very fast, controlled and accurate turn on and turn off to maximize conduction period. The strong sink on the NCP4305 allows this controller to operate in CCM. To further improve efficiency the NCP4305 has incorporated an ultra fast trigger. The trigger pin can be used to help reduce cross conduction, and improve efficiency, during CCM. Information about primary side turn-on can be transferred to NCP4305’s TRIG pin on the secondary side that immediately turns-off the SR transistor. www.onsemi.com EVAL BOARD USER’S MANUAL Figure 1. Evaluation Board Photo Key Features • Synchronous Rectification • Constant Voltage Constant Current Regulation (CCCV) • Very Low Input Power at Light and No Load • High Efficiency Across the Entire Load Range • Overpower Protection • Universal Mains Operation © Semiconductor Components Industries, LLC, 2015 December, 2015 − Rev. 0 1 Publication Order Number: EVBUM2340/D NCP4305FBDAPGEVB Circuit Description The primary side uses a flyback topology, providing the advantage of a cost effective power stage design. The power stage operates in both CCM (continuous conduction mode) and DCM (discontinuous conduction mode), allowing it to accept a wide universal input voltage range. The CCM operation provides desired full load performance with good efficiency and low ripple of primary current. The DCM operation then permits an increase of efficiency under the light load conditions, by decreasing the switching losses. The device switches at 65 kHz which represents a good trade-off between switching losses and magnetic core size. The adapter’s primary side consists of several important sections. The first is an input EMI filter to reduce the conducted EMI to the ac line at the input of the adapter. The EMI filter is formed by common-mode inductor L2 and capacitors C1, C4, C5 and C12 with differential mode inductor L1. The varistor R7 is used to protect the adapter against the line overvoltage peaks. When the power supply is disconnected from the AC mains, X capacitors C4, C12 and Y capacitors C1 and C5 are discharged through HV pin via the following path: rectifying diodes D108, D110 and limiting and surge protection R100 and R101. This feature replaces commonly used discharging resistors and saves approximately 25 mW of input power consumption at 230 Vac. The next block is the rectifier with bulk capacitor. The main power stage of the flyback converter utilizes the low RDSon MOSFET SPP11N60C3 along with a custom designed transformer TR1 KA5037−BL from Coilcraft. The detailed design procedure of a flyback adapter can be found in the application note AND8461/D. The secondary side rectification is done in with a MOSFET Q2 controlled by NCP4305. The voltage across the transistor is sensed through resistor R126 at the CS pin. The transistor is driven directly from ON Semiconductor’s new NCP4305. The NCP4305 is powered from the output voltage and charge is held by VCC capacitors C108 and C109. The minimum on and off times are set by resistors R112 and R115. The light load detection circuit, comprised of diode D116, resistors R125, R127, R128, and capacitors C105 and C110, compares the charge on capacitors C105 and C110 to the VCC capacitors and provides information about output power to LLD pin. Also the SR controller can be triggered from the primary side driver through solder jumper SJ100, R102, pulse transformer TR2, C100. A simple RC snubber R5 and C9 across the secondary synchronous rectifier transistor damps the high frequency ringing caused by the unclamped leakage inductance of the secondary side of the transformer and the rectification diode capacitance. There is also a small inductance C4 connected between transformer and SR transistor that helps fight against a high amplitude voltage peak on the SR transistor that is produced in CCM. Another IC on the secondary side is the NCP4354A controller which provides the output voltage and output current regulation. The output voltage is set by voltage divider R133, R137, R147 and R152, and the output current is sensed at sense resistor R146. The regulation output is coupled to the primary side controller via the optocoupler. The NCP4354 secondary controller also detects very light load condition via R145, R148, R151 and C118. The signal from the transformer has to be inverted to this network because the secondary side rectifier is not in the positive path, but in the return path. This inversion is accomplished by diodes D118, Q101, R135 and R136. When light load condition is detected, the primary controller is switched into OFF mode by an ON/OFF current sink to the DRIVE pin via an optocoupler. The built in LED driver indicates that the primary side operation (when SMPS is not in OFF mode). The LED driver switches with 1 kHz frequency and 12% duty to further improve efficiency. Table 1. GENERAL PARAMETERS Symbol Value Unit Input Voltage Parameter VIN 85–265 VAC Input Frequency fIN 30–80 Hz Output Voltage VOUT 12.0 V Nominal Output Current IOUTNOM 5.5 A Output Current Limit IOUTLIM 5.9 A η > 85 % Efficiency IOUT> 3% IOUTMAX Efficiency IOUT > 25% IOUTMAX No-Load Power Consumption VIN = 115 V/60 Hz No-Load Power Consumption VIN = 230 V/50 Hz Output Voltage Ripple IOUT = 5.5 A Load Regulation IOUT = 50 mA – 5.5 A η > 89 % PIN 11.1 mW PIN 20.5 mW VOUT_PK−PK 30 mV LOADREG 12.5 mV/A Maximal Load Resistance to Stay in On-Mode ROUTON 1.3 kW Minimal Load Resistance to Activate Off-Mode ROUTOFF Board Dimension www.onsemi.com 2 1.9 kW 165 × 60 × 27 mm NCP4305FBDAPGEVB Evaluation Board Schematic Figure 2. Evaluation Board Schematic www.onsemi.com 3 NCP4305FBDAPGEVB No Load Input Power Consumption Input power consumption was measured by Yokogawa WT210 power meter. Input power was integrated for 20 minutes and averaged from 4 measurements. Table 2. NO LOAD INPUT POWER CONSUMPTION Input Voltage Input Power 115 V; 60 Hz 7.0 mW 230 V; 50 Hz 12.2 mW Load Regulation The main impact on load regulation is the current sense resistor R146 that makes drop of 62.5 mV at full load and 0 mV at no load. Figure 3. Load Regulation is 12.5 mV/A Load Characteristic The following load characteristic shows how current limitation works. When the output current reaches 5.9 A, the output voltage starts to become limited to keep the current at a level given by the sense resistor R146 and voltage threshold of 62.5 mV at current OTA sensing pin ISNS. Figure 4. Load Characteristic www.onsemi.com 4 NCP4305FBDAPGEVB Efficiency Figure 5. Adapter Efficiency for Low and High Line with or without Triggering Driver Output Voltage Modulation Region SR Controller Wakes Up from Disable Mode Figure 6. Adapter Efficiency for Low and High Line at Very Low Output Currents, Drop at Efficiency is Caused by Wake Up of Synchronous Rectification Controller www.onsemi.com 5 NCP4305FBDAPGEVB Operation at Full Power 1 – Primary DRV 2 – CS 3 – SR DRV 4 − Sec Wind. Current Figure 7. VIN = 230 VAC, IOUT = 5.8 A, DCM Operation 1 – Primary DRV 2 – CS 3 – SR DRV 4 − Sec Wind. Current Figure 8. VIN = 115 VAC, IOUT = 5.8 A, CCM Operation www.onsemi.com 6 NCP4305FBDAPGEVB Output Voltage Ripple 1 – VOUT (AC) 4 – IOUT Figure 9. VIN = 230 VAC, IOUT = 100 mA, Primary Controller is in Skip Mode, DVOUTPK−PK = 30 mV 1 – VOUT (AC) 4 – IOUT Figure 10. VIN = 230 VAC, IOUT = 1 A, DVOUTPK−PK = 20 mV www.onsemi.com 7 NCP4305FBDAPGEVB 1 – VOUT (AC) 4 – IOUT Figure 11. VIN = 230 VAC, IOUT = 2.5 A, DVOUTPK−PK = 35 mV 1 – VOUT (AC) 4 – IOUT Figure 12. VIN = 230 VAC, IOUT = 5.5 A, DVOUTPK−PK = 30 mV www.onsemi.com 8 NCP4305FBDAPGEVB Synchronous Rectification Controller The synchronous rectification controller monitors the voltage across the SR transistor (drain to source). When the drain voltage is negative, current flows from the source to the drain through transistor’s body diode and the SR controller should turn-on the SR transistor to minimize the voltage drop across it. Eventually the current through the transistor decreases and the voltage drop across the SR transistor falls to zero. When the voltage across the SR transistor is zero then the SR controller turns-off transistor. The SR transistor can also be turned off when the Trig signal is used. Guard Intervals (min-ton, min-toff times) There has to be applied guard intervals after the transistor turns-on or turns-off since ringing appears after these transitions. Guard intervals have to be longer than this ringing to assure correct operation. 1 – CS_limited 2 – CS 3 – SR DRV Figure 13. VIN = 230 VAC, IOUT = 5.8 A − Turn-on Ringing at SR MOSFET, this Time has to be Covered by Guard Interval of min-ton to Secure that SR MOSFET would be Not Turned-off Incorrectly. Application has Set min-ton to 1.5 ms that is Long Enough www.onsemi.com 9 NCP4305FBDAPGEVB 1 – Primary DRV 2 – CS 3 – SR DRV 4 − ISEC Figure 14. VIN = 115 VAC, IOUT = 3 A, after Demagnetization Ringing Period is 1.8 ms. Min-toff has to be Set to Longer Time than this Period to Avoid Incorrect Turn-on when CS Voltage Drops below Turn-on Threshold. Evaluation Board has Set this Time to 2.2 ms 1 – Primary DRV 2 – CS 3 – SR DRV 4 − ISEC CS Voltage goes below Zero and Body Diode Conducts Figure 15. VIN = 115 VAC, IOUT = 0.1 A, after Demagnetization Ringing. If Incorrect min-toff is Set SR Transistor may be Turn-on for at Least min-ton that may Lead in to SR Oscillation www.onsemi.com 10 NCP4305FBDAPGEVB Start Up 1 – Primary DRV 2 – CS 3 – SR DRV 4 − VOUT Figure 16. VIN = 230 VAC, IOUT = 5.8 A, Start-up, SR Controller Starts to Operate Immediately after UVLO Level is Crossed Output Short 1 – Primary DRV 2 – CS 3 – SR DRV 4 − VOUT Figure 17. VIN = 230 VAC, IOUT = 5.8 A to Short, SR Controller Operates Correctly until it has Enough VCC Voltage www.onsemi.com 11 NCP4305FBDAPGEVB Synchronization (Triggering) option that transfers information about primary switch turn-on to secondary side where the SR controller immediately turns off SR transistor before zero current is detected. This improves efficiency and decreases voltage peak at SR transistor. It may be advantageous to send information to the secondary side about primary turn-on in advance, but this information is not easily accessible. One way is to postpone the pulse to the primary switch and send an un-delayed pulse to the secondary side. This evaluation board includes an option for SR controller synchronization (triggering) with the primary side that may be helpful in CCM operation. The primary switch is turned on sooner than secondary side current drops to the zero in CCM. Typically the SR controller detects zero voltage drop (zero current) through SR transistor to turn the SR transistor off, but in CCM this happens very fast, right after the primary switch is turned on (current changes its direction). To prevent cross−conduction from happening there exists an 1 – Primary DRV 2 – CS 3 – SR DRV Delay between Primary Turn-on and SR Turn-off Figure 18. VIN = 180 VAC, IOUT = 5.8 A, SR Transistor is Turned-off after Primary Side is Turned-on and Shot through Condition Occurs 1 – Primary DRV 2 – CS 3 – SR DRV 4 − TRIG Figure 19. VIN = 180 VAC, IOUT = 5.8 A, Information about Primary Turn-on is Transferred to Secondary Side through Small Pulse Transformer to TRIG Pin that Immediately Turns SR Off and Minimize Shot Through Time (Higher Efficiency, Lower Voltage Peak) www.onsemi.com 12 NCP4305FBDAPGEVB Driver Voltage Modulation 1 – VCC − VLLD 2 – CS 3 – SR DRV 4 − IOUT Figure 20. VIN = 230 VAC, IOUT = 22−202 mA, SR Controller Driver Output Voltage is Modulated Accordingly to Load Current through LLD Pin. Regulation Range is 1 to 2 V. NCP4305 Enters Disable Mode where its Consumption Significantly Decreases when VCC – VLLD is below 1 V 1 – VCC − VLLD 2 – CS 3 – SR DRV 4 − IOUT Figure 21. VIN = 115 VAC, IOUT = 22−202 mA, Thanks to Lower VIN Operation is Slightly Different so Driver Voltage is Higher at Same Load than for VIN = 230 V www.onsemi.com 13 NCP4305FBDAPGEVB OFF Mode Off-mode is activated, when the output current is below a set level. In this design, the off-mode threshold is set to approximately 3.5 mA. This condition is detected by OFFDET comparator through polarity inverter D118, Q101, R135, R136 with bulk capacitor (C118) and voltage divider (R148 and R151). C118 charging current is limited by R145 to avoid full recharge of C118 by short and sporadic pulses in deep skip mode. When very light load is detected, ONOFF current starts to be sunk by the DRIVE pin. The internal pull up current source is connected to VSNS pin and increases its voltage (Figure 23 A). Thanks to this current, voltage OTA starts to sink limited current to help ONOFF current pull the primary FB voltage below the off mode detection level (Figure 24 B). When the primary side detects off mode, FB pull up current is decreased to save energy. After that the FB pull down current through optocoupler can be lower. The secondary side stops sinking additional current by voltage OTA after VSNS voltage drops below VREF to save output capacitor energy (Figure 24 C). Off mode is interrupted when VOUT falls below the VMIN threshold that is detected by VMIN comparator (Figure 22 D). ONOFF current then disappears and primary side FB voltage increases. When primary FB voltage is within operation range, the primary controller starts to operate. The output capacitor is then recharged to nominal output voltage. Converter in Off-mode 1 – Primary DRV 2 – VOUT 3 – Primary FB 4 − DRIVE Low VOUT is Detected, Output Capacitor is Recharged D Figure 22. VIN = 230 VAC, IOUT = 0 A, Off-mode Period tOFFMODE = 77 s, VOUTMIN = 3 V www.onsemi.com 14 NCP4305FBDAPGEVB A 1 – Primary DRV 2 – VOUT 3 – OFFDET Pin 4 − DRIVE Pin Off-mode is Activated − IBIASV Starts to Flow Figure 23. VIN = 230 VAC, IOUT = 0 A, Off-mode is Detected when OFFDET Pin Voltage Drops below 1/10 of VCC = VOUT A B Voltage OTA Sinks Current C 1 – Primary DRV 2 – VOUT 3 – Primary FB 4 − DRIVE Very Light Load is Detected, Converter Goes in Off-mode Figure 24. VIN = 230 VAC, IOUT = 0 A, ON-mode to OFF-mode Transition. The Voltage Drop on the DRIVE Pin Indicates the Higher Voltage OTA Sink Current (1.5 mA). During this Time, the VSNS Pin is Connected to a 10 mA Pull Up Current Source, which Increases the Voltage at VSNS Pin. The OTA Stops Sinking Current 1,900 ms after Transition to Off-mode, because VSNS Voltage Drops below VREF. There is only ONOFF current sunk through OPTO after VSNS < VREF www.onsemi.com 15 NCP4305FBDAPGEVB Active X2 Capacitor Discharge Mains is Disconnected 125 ms AC Detect Timer X2 Cap Discharging 1 – Input Line 1 2 – Input Line 2 3 – Primary DRV Pin 4 − HV Pin Figure 25. VIN = 230 VAC, IOUT = 1.0 A, when the AC Mains is Disconnected, 125 ms Detection Timer is Started. After this Time, the X2 Cap is Discharged. Discharging Time is much Shorter than Required by Safety Standards (~150 ms << 1 s) www.onsemi.com 16 NCP4305FBDAPGEVB Transient Response Output Current Transients Current slew rate is 125 mA/1 ms for all transients. 1 – Primary DRV 2 – VOUT (AC) 3 – SR DRV 4 − IOUT Figure 26. VIN = 230 VAC, IOUT = 1.0−5.5 A, VOUT_DROP = 220 mV 1 – Primary DRV 2 – VOUT (AC) 3 – SR DRV 4 − IOUT Figure 27. VIN = 230 VAC, IOUT = 5.5−1.0 A, VOUT_OVERSHOOT = 250 mV www.onsemi.com 17 NCP4305FBDAPGEVB Output Voltage Transients Output Capacitor Discharging − Can’t be Controlled by NCP4354A 1 – Primary DRV Pin 2 – VOUT 3 – SR DRV 4 − IOUT Figure 28. VIN = 230 VAC, IOUT = 10.5−8.0 A 1 – Primary DRV 2 – VOUT (AC) 3 – SR DRV 4 − IOUT Figure 29. VIN = 230 VAC, IOUT = 8.0−10.5 A www.onsemi.com 18 NCP4305FBDAPGEVB Output Voltage to Current Transient Output Capacitor Discharging − Can’t be Controlled by NCP4354A 1 – Primary DRV Pin 2 – VOUT 3 – SR DRV 4 − IOUT Figure 30. VIN = 230 VAC, ROUT = 10 W to 1.5 W 1 – Primary DRV Pin 2 – VOUT 3 – SR DRV 4 − IOUT Figure 31. VIN = 230 VAC, ROUT = 1.5 W to 10 W www.onsemi.com 19 NCP4305FBDAPGEVB 1 – Primary DRV Pin 2 – VOUT 3 – SR DRV 4 − IOUT Figure 32. VIN = 230 VAC, ROUT = 1.5 W to 10 W − Detail Shows why SR is Not Turned On. It is Not Turned-on, because Primary On-time is Shorter than Secondary Side Min-off Time (in CCM they Correspond Each Other) Open Loop Transfer Characteristics Voltage Control Loop Transfer Characteristic 40 200 30 150 20 100 10 50 0 0 −10 −50 −20 −100 −30 −150 −40 −200 102 103 104 f/Hz TR1: Mag(Gain) TR2: Phase(Gain) Figure 33. VIN = 115 VAC, IOUT = 100 mA www.onsemi.com 20 105 TR2/5 TR1/dB • Phase Margin is Never Lower than 70° • Gain Margin is Never Lower than 10 dB • Crossover Frequency is between 0.75–1.5 kHz 40 200 30 150 20 100 10 50 0 0 −10 −50 −20 −100 −30 −150 −40 TR2/5 TR1/dB NCP4305FBDAPGEVB −200 102 103 104 105 f/Hz TR1: Mag(Gain) TR2: Phase(Gain) 40 200 30 150 20 100 10 50 0 0 −10 −50 −20 −100 −30 −150 −40 TR2/5 TR1/dB Figure 34. VIN = 115 VAC, IOUT = 2.0 A −200 102 103 104 105 f/Hz TR1: Mag(Gain) TR2: Phase(Gain) 40 200 30 150 20 100 10 50 0 0 −10 −50 −20 −100 −30 −150 −40 −200 102 103 104 f/Hz TR1: Mag(Gain) TR2: Phase(Gain) Figure 36. VIN = 230 VAC, IOUT = 100 mA www.onsemi.com 21 105 TR2/5 TR1/dB Figure 35. VIN = 115 VAC, IOUT = 5.5 A 40 200 30 150 20 100 10 50 0 0 −10 −50 −20 −100 −30 −150 −40 TR2/5 TR1/dB NCP4305FBDAPGEVB −200 102 103 104 105 f/Hz TR1: Mag(Gain) TR2: Phase(Gain) 40 200 30 150 20 100 10 50 0 0 −10 −50 −20 −100 −30 −150 −40 −200 102 103 104 f/Hz TR1: Mag(Gain) TR2: Phase(Gain) Figure 38. VIN = 230 VAC, IOUT = 5.5 A www.onsemi.com 22 105 TR2/5 TR1/dB Figure 37. VIN = 230 VAC, IOUT = 2.0 A NCP4305FBDAPGEVB Current Control Loop Transfer Characteristic 40 200 30 150 20 100 10 50 0 0 −10 −50 −20 −100 −30 −150 −40 TR2/5 TR1/dB • Phase Margin is Never Lower than 43° • Gain Margin is More than 40 dB • Crossover Frequency is between 65–100 Hz −200 101 102 103 104 f/Hz TR1: Mag(Gain) TR2: Phase(Gain) 40 200 30 150 20 100 10 50 0 0 −10 −50 −20 −100 −30 −150 −40 −200 101 102 103 104 f/Hz TR1: Mag(Gain) TR2: Phase(Gain) Figure 40. VIN = 230 VAC, IOUT = 5.9 A, VOUT = 10 V www.onsemi.com 23 TR2/5 TR1/dB Figure 39. VIN = 115 VAC, IOUT = 5.9 A, VOUT = 10 V 40 200 30 150 20 100 10 50 0 0 −10 −50 −20 −100 −30 −150 −40 TR2/5 TR1/dB NCP4305FBDAPGEVB −200 101 102 103 104 f/Hz TR1: Mag(Gain) TR2: Phase(Gain) 40 200 30 150 20 100 10 50 0 0 −10 −50 −20 −100 −30 −150 −40 TR2/5 TR1/dB Figure 41. VIN = 115 VAC, IOUT = 5.9 A, VOUT = 8 V −200 101 102 103 104 f/Hz TR1: Mag(Gain) TR2: Phase(Gain) Figure 42. VIN = 230 VAC, IOUT = 5.9 A, VOUT = 8 V Result Summary The NCP4305 with NCP1249 and NCP4354 controllers enables the future of cost effective, easy to design and high efficiency power supplies with very low standby power consumption. Special thanks go to the companies Coilcraft, Epcos and Würth that provided samples of their components for this demoboard. www.onsemi.com 24 NCP4305FBDAPGEVB Top Side Assembly Figure 43. Top Side Assembly www.onsemi.com 25 NCP4305FBDAPGEVB Bottom Side Assembly Figure 44. Bottom Side Assembly www.onsemi.com 26 NCP4305FBDAPGEVB Evaluation Board Photo Figure 45. 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