[AP4201] AP4201 27ch 100mA LED Driver IC 1. General Description The AP4201 is a 27 channel LED Driver that supports 2 types of serial interfaces (SCI serial interface or serial F/F cascade interface) to program LED lighting. The built-in 100mA drivable power MOSFET is used to shut off the LED current, and LEDs are controlled by a PWM method in accordance with the LED gradation data that is programmed into the device. Constant current output and Open drain output are selectable by DRSET setting pin. To reduce wirings in the system, voltage on anode side of LEDs can be communized. A maximum of 32 devices can be connected on a single BUS to a common master device; furthermore, each AP4201 retains its own programmed commands allowing continuous autonomous lighting. The internal UVLO function prevents the LEDs from incorrect operations when the supply voltage is 4V or less. An internal over current protection function and a thermal protection function are also integrated. 2. Features Power Supply Voltage 8.0V~24.0V 4.5V~5.5V (connect VIN pin and VDC1 pin) Oprating Temperature 0 ~ 70C Absolute Maximum Voltage 30V (VIN, LEDR0~8, LEDG0~8, LEDB0~8) 2 Types of Serial Interface for Setting Lighting Data - 4-wire SCI interface (maximum communication clock: 5MHz) - Serial-F/F cascade (maximum communication clock: 10MHz) - Applicable to both 3.3V and 5.0V input signal (output is fixed to 5.0V) LED Current maximum 100mA/ch - Constant Current Output 50mA/ch - Open Drain Output 100mA/ch (Each channel current is less than the value above when 27 channels are set simultaneously) LED Gradation 8-bit PWM gradation method (256 gradation) Built-in PWM Generator, Adjustable PWM Period Simultaneous Lighting-Off Function (When SCI interface setting) Protection Function - Under Voltage Lock Out (UVLO) - Over Current Protection (timer latch recovery type) - Thermal Shutdown (automatic recovery) Package 48-pin LQFP Application A LED loading machine for the decoration 015008157-E-00 -1- 2015/09 [AP4201] 3. Table of Contents General Description ....................................................................................................................................1 Features .......................................................................................................................................................1 Table of Contents ........................................................................................................................................2 Block Diagram and Functions .....................................................................................................................3 ■ Block Diagram.............................................................................................................................................3 ■ Function .......................................................................................................................................................3 5. Ordering Guide ...........................................................................................................................................4 6. Pin Configurations and Functions ...............................................................................................................4 ■ Pin Layout ...................................................................................................................................................4 ■ Function .......................................................................................................................................................5 7. Absolute Maximum Rating .........................................................................................................................9 8. Recommended Operating Conditions .........................................................................................................9 9. Electrical Characteristics ..........................................................................................................................10 ■ SCI Interface (AC timing) .........................................................................................................................11 ■ Serial F/F Control (AC timing) .................................................................................................................12 10. Functional Descriptions .........................................................................................................................13 10.1. Operation Outline ...........................................................................................................................13 10.2. SCI Interface Command .................................................................................................................13 10.3. Serial F/F Cascade Control ............................................................................................................19 10.4. LED Current Setting (fixed current output) ...................................................................................20 10.5. Input Voltage Range (VIN) ............................................................................................................21 10.6. POR Operation (Power on Reset) ..................................................................................................21 10.7. Reset State ......................................................................................................................................22 10.8. Protection Functions ......................................................................................................................23 11. Recommended External Circuits ...........................................................................................................24 12. Package ..................................................................................................................................................25 ■ Package ......................................................................................................................................................25 ■ Marking .....................................................................................................................................................25 13. Revision History ....................................................................................................................................26 IMPORTANT NOTICE ...................................................................................................................................27 1. 2. 3. 4. 015008157-E-00 -2- 2015/09 [AP4201] 4. Block Diagram and Functions ■ Block Diagram A1 A0 A3/CLRB A2 A4/ENB 5.0V LEDR0 CSB/LAT LEDG0 LEDB0 TxD/SI CONTROL LOGIC RxD/SO UVLO 1.0mF EN VIN VDC1 1.4MHz OSC 5.0V PWM 1.0mF IREF POR EN VDC2 1.0mF PWMSET VIN 1.8V 2-bit DIVIDER 5.0V 27 LEDB1 LEDB8 VDC THERMAL SHUTDOWN DRSET LEDG1 PWM GENERATOR 0 8-bit COUNTER LDO2 Constant Current or Open Drain LEDR1 PWM PWM PWM GENERATOR 26 GENERATOR 0 GENERATOR 0 LDO1 VREF 216-bit REGISTER LOW SIDE CURRENT SINK DRSET SCI INTERFACE PWM[26:0] SCK/CLK PGND TSD 1.0V SCIFEN PWM GND DRSET ISET_R ISET_G SCIEN RISET_R RISET_G ISET_B RISET_B Figure 1.Block Diagram ■ Function No Block SCI 1 INTERFACE CONTROL 2 LOGIC “216-bit” 3 REGISTER PWM 4 GENERATOR 5 1.4MHz OSC 6 “2-bit” DIVIDER 7 “8-bit” COUNTER 8 UVLO 9 LDO1 10 LDO2 11 VREF 12 IREF 13 POR LOW SIDE 14 CURRENT SINK THERMAL 15 SHUTDOWN 015008157-E-00 Function In case of SCI: hold the setting data of the PWM gradation. In case of serial F/F: hold the PWM gradation data. Detect SCI instruction, control the operation mode. Hold the 8-bit PWM gradation data of LEDR0~8, LEDG0~8 and LEDB0~8. Compare PWM gradation with counter and generate PWM wave. Generate 1.4MHz clock. Divide 1.4MHz clock to 256 gradation clock. Count with the 256 gradation clock within PWM period. Generate reset signal for preventing unstable operating when input power voltage. decreased. Generate an internal 5 voltage. It can supply less than 30mA for driving external circuit. Generate an internal 1.8 voltage. Driving external circuit is forbidden. Generate a reference voltage. Generate a reference current. Generate reset signal at power start up. LED output driver which can set to current source or open drain output. Over current protection circuit is built in. Shut down the LED current and set the VDC1,VDC2 pins to 0 voltage when internal temperature is more than setting value. -3- 2015/09 [AP4201] 5. Ordering Guide 0 +70C AP4201 48-pin LQFP 6. Pin Configurations and Functions 25:LEDB6 26:LEDR5 27:LEDG5 28:LEDB5 29:LEDR4 30:PGND 31:PGND 32:LEDG4 33:LEDB4 34:LEDR3 35:LEDG3 36:LEDB3 ■ Pin Layout 37:LEDR2 24:LEDG6 38:LEDG2 23:LEDR6 39:LEDB2 22:LEDB7 40:LEDR1 21:LEDG7 41:LEDG1 20:LEDR7 42:LEDB1 19:LEDB8 (Top View) 015008157-E-00 -4- 12:GND 13:VIN 11:VDC1 48:A2 10:VDC2 14:ISET_R 9:PWMSET 47:A1 8:SCIEN 15:ISET_G 7:DRSET 46:A0 6:RxD/SO 16:ISET_B 5:TxD/SI 45:LEDB0 4:SCK/CLK 17:LEDR8 3:CSB/LAT 44:LEDG0 2:A4/ENB 18:LEDG8 1:A3/CLRB 43:LEDR0 2015/09 [AP4201] ■ Function No. Name Equivalent circuit VDC1 1 IC address input pin 3 (built in 100k ohm pull-up resistor). Configure by connecting to GND or open. CLRB input pin used for serial F/F. Data clear pin used for shift register. A3/CLRB VDC1 2 VDC1 A4/ENB VDC1 3 CSB/LAT VDC1 4 SCK/CLK VDC1 5 Explanation VDC1 TxD/SI IC address input pin 4 (built in 100 k ohm pull-up resistor). Configure by connecting to GND or open. ENB input pin used for serial F/F. Control the shift resister data which reflect to PWM data or not. Strobe signal input pin for SCI. Respective orders are accepted when the CSB terminal goes “L” level. The CSB terminal always needs to be “L” level while commands are entered or data are transferred. If the CSB pin goes “H” level when data are transferred, the commands are disregarded. LAT signal input pin used for serial F/F. Input LAT signal for shift register. Clock signal input for SCI. Writing data is entered from the TxD pin at the SCK rising edge, reading data is output to RxD pin at the SCK falling edge. It is not always necessary to supply a clock signal to the SCK pin. CLK signal input pin used for serial F/F. CLK signal for shift register. Data signal input pin. To input commands, writing data. SI input pin for serial F/F. To input data signal of shift register. Input to F/F which determine LEDB0 lighting data. VDC1 6 Data signal output pin for SCI. To output reading data. Outputs Hi-Z except when data is output. SO output pin for serial F/F. To output data signal of shift register. Output from F/F which determine LEDR8 lighting data. RxD/SO VDC1 7 Switching pin which can switch to driver output current source or open drain (100kohm pull up) Connect to GND or set to open. If connect to GND, it can work as open drain mode. DRSET VDC1 8 VDC1 SCIEN 015008157-E-00 VDC1 Enable pin for serial interface. (100kohm pull up) Connect to GND or set to open. If connect to GND, it can work as serial F/F control mode. If open this pin, it can work as SCI control mode. -5- 2015/09 [AP4201] VDC1 9 PWMSET PWM period setting pin. (100kohm pull down) Connect to VDC1 pin or set to open. If connect to GND (or open), PWM gradation period= low speed 546µs(typ.) If connect to VDC1 pin, PWM gradation period= high speed 364µs(typ.) VIN 10 VDC2 Internal circuit Internal 1.8V LDO output pin. Drive external circuit is prohibited. Connect a 1.0µF capacitor between the VDC2 pin and GND. VIN 11 VDC1 Internal circuit 12 13 GND - Internal 5V LDO output pin. External current capability is 30mA maximum. Connect a 1.0µF capacitor between the VDC terminal and GND. Ground VIN VDC IC power input pin. Internal 5V LDO’s output and 1.8V output. Connect a 1.0µF capacitor between the VDC terminal and GND. VDC1 14 ISET_R 15 ISET_G Same as 14-pin 16 ISET_B Same as 14-pin 17 1.0V + - The pin which set the current of LEDG0~8. (same as 14 pin) The pin which set the current of LEDB0~8. (same as 14 pin) R8 pin (connect to LED cathode).Current source/open drain output. Control the internal MONFET to drive LED with lighting setting. LEDR8 18 LEDG8 Same as 17-pin 19 LEDB8 Same as 17-pin 015008157-E-00 Current setting pin for LEDR0~8. Connect an external resistor between this pin and GND. G8 pin (connect to LED cathode).Current source/open drain output. Control the internal MONFET to drive LED with lighting setting. B8 pin (connect to LED cathode).Current source/open drain output. Control the internal MONFET to drive LED with lighting setting. -6- 2015/09 [AP4201] 20 LEDR7 Same as 17-pin 21 LEDG7 Same as 17-pin 22 LEDB7 Same as 17-pin 23 LEDR6 Same as 17-pin 24 LEDG6 Same as 17-pin 25 LEDB6 Same as 17-pin 26 LEDR5 Same as 17-pin 27 LEDG5 Same as 17-pin 28 LEDB5 Same as 17-pin 29 LEDR4 Same as 17-pin 30 PGND 31 PGND 32 LEDG4 - Ground pin for LED current. Ground pin for LED current. Same as 17-pin G4 pin (connect to LED cathode).Current source/open drain output. Control the internal MONFET to drive LED lighting setting. B4 pin (connect to LED cathode).Current source/open drain output. Control the internal MONFET to drive LED with lighting setting. 33 LEDB4 Same as 17-pin 34 LEDR3 Same as 17-pin 35 LEDG3 Same as 17-pin 36 LEDB3 Same as 17-pin 37 LEDR2 Same as 17-pin 015008157-E-00 R7 pin (connect to LED cathode).Current source/open drain output. Control the internal MONFET to drive LED with lighting setting. G7 pin (connect to LED cathode).Current source/open drain output. Control the internal MONFET to drive LED with lighting setting. B7 pin (connect to LED cathode).Current source/open drain output. Control the internal MONFET to drive LED with lighting setting. R6 pin (connect to LED cathode).Current source/open drain output. Control the internal MONFET to drive LED with lighting setting. G6 pin (connect to LED cathode).Current source/open drain output. Control the internal MONFET to drive LED with lighting setting. B6 pin which connect to LED cathode. Current source/open drain output. Control the internal MONFET to drive LED with lighting setting. R5 pin (connect to LED cathode).Current source/open drain output. Control the internal MONFET to drive LED with lighting setting. G5 pin (connect to LED cathode).Current source/open drain output. Control the internal MONFET to drive LED with lighting setting. B5 pin (connect to LED cathode).Current source/open drain output. Control the internal MON-FET to drive LED with lighting setting. R4 pin (connect to LED cathode).Current source/open drain output. Control the internal MONFET to drive LED lighting setting. R3 pin (connect to LED cathode).Current source/open drain output. Control the internal MONFET to drive LED with lighting setting. G3 pin (connect to LED cathode).Current source/open drain output. Control the internal MONFET to drive LED with lighting setting. B3 pin (connect to LED cathode).Current source/open drain output. Control the internal MONFET to drive LED with lighting setting. R2 pin (connect to LED cathode).Current source/open drain output. Control the internal MONFET to drive LED with lighting setting -7- 2015/09 [AP4201] 38 LEDG2 Same as 17-pin 39 LEDB2 Same as 17-pin 40 LEDR1 Same as 17-pin 41 LEDG1 Same as 17-pin 42 LEDB1 Same as 17-pin 43 LEDR0 Same as 17-pin 44 LEDG0 Same as 17-pin 45 LEDB0 Same as 17-pin VDC1 46 IC address input pin 0 (Built in 100kΩ pull-up resistor) Configure by connecting to GND or OPEN. VDC1 IC address input pin 1 (Built in 100kΩ pull-up resistor) Configure by connecting to GND or OPEN. A1 VDC1 48 VDC1 A0 VDC1 47 A2 G2 pin (connect to LED cathode).Current source/open drain output. Control the internal MONFET to drive LED with lighting setting B2 pin (connect to LED cathode).Current source/open drain output. Control the internal MONFET to drive LED with lighting setting. B2 pin (connect to LED cathode).Current source/open G1 pin (connect to LED cathode).Current source/open drain output. Control the internal MONFET to drive LED with lighting setting. B1 pin (connect to LED cathode).Current source/open drain output. Control the internal MONFET to drive LED with lighting setting. R0 pin (connect to LED cathode).Current source/open drain output. Control the internal MONFET to drive LED with lighting setting. G0 pin (connect to LED cathode).Current source/open drain output. Control the internal MONFET to drive LED with lighting setting. B0 pin (connect to LED cathode).Current source/open drain output. Control the internal MONFET to drive LED with lighting setting. VDC1 IC address input pin 2 (Built in 100kΩ pull-up resistor) Configure by connecting to GND or OPEN. Note 1. Handling of unused pins. (complementary): Set all unused pins open when the either interface for LED gradation data is selected. There is no need to connect unused pin to GND. Since No. 3~5 pins are always used, the circuit for unused status is not built-in to these pins. It is necessary to control these pins to not become Hi-Z state while the power is supplied. Note 2. The PGND pin and the GND pin are not connected internally. Therefore these pins must be connected externally. Note 3. symbol means high voltage tolerance MOS, the pin with this MOS can tolerate high voltage. 015008157-E-00 -8- 2015/09 [AP4201] 7. Absolute Maximum Rating Parameter Symbol min max Unit VIN voltage VIN -0.3 30 V LEDR0-8, LEDG0-8, LED B0-8 voltage VLED -0.3 30 V CSB/LAT, SCK/CLK, TxD/SI, A0-2, A3/CLRB, -0.3 VDC1 + 0.3 V A4/ENB, RxD/SO, DRSET Voltage (Note 7) -0.3 1.98 V VDC2 Voltage PWMSET, VDC1, ISET_R, ISET_G, ISET_B -0.3 5.5 V voltage Power Dissipation (Note 5, Note 6) PD 1400 mW Storage Temperature TSTG -40 150 °C Note 4. All voltages are with respect to GND pin (GND, PGND) as zero (reference) voltage. Note 5. PD is decreased at the rate of 14mW/C when Ta≥25C. (Mounted on 100 mm 103 mm t=1.0mm double side FR-4 board.) Note 6. When calculating thermal design, please include the heat generated by the internal regulator along with the LED pins. • The case of fixed current output: IC power consumption = LED pins power consumption (LED current*LED pin voltage) * LED numbers +Internal LDO power consumption [(VIN-VDC1) * (VDC1 output current+IC consumption (8.5mA))] +VDC1*IC consumption (8.5mA) • The case of open drain output: IC power consumption = LED pins power consumption (LED current*LED current*LED ON-resistor 9.3ohm)*LED numbers +Internal LDO power consumption [(VIN-VDC1) * (VDC1 output current+IC consumption (2mA))] +VDC1*IC consumption (2mA) Note 7. The maximum value is limited to 5.5V when the VDC1 exceeds 5.2V. WARING: Operation at or beyond these limits may result in permanent damage to the device. Normal operation is not guaranteed at these extremes. 8. Recommended Operating Conditions Parameter Symbol min typ max Unit Input Voltage 1 VIN1 8.0 12.0 24.0 V Input Voltage 2 VIN2 4.5 5.0 5.5 V Maximum LDO1 output IDC 30 current Maximum LED pin voltage VLEDOFF 24.0 Operation Temperature Ta 0 70 Note 8. Input range (VIN pin voltage) = 5.5V~8.0V is prohibited. Conditions Not connect VIN pin and VDC1 pin Connect VIN pin and VDC1 pin mA VIN=12V V °C LED pin= off setting WARNING: AKM assumes no responsibility for the usage beyond the conditions in this data sheet. 015008157-E-00 -9- 2015/09 [AP4201] 9. Electrical Characteristics (VIN=12V, GND=PGND=0V, Ta=+25 C, Capacitor at VIN, VDC1 and VDC2 pins = 1.0μF. DRSET=”H” (fixed current), RISET_R=RISET_G=RISET_B= 33.3kΩ; Recommend Parts, unless otherwise specified) Parameter Symbol min typ max IDD1 - 1.2 2.0 IDD2 - 1.3 2.0 IDD3 - 5.0 8.5 IDD4 - 5.0 8.5 VIN Reset Voltage VINRST - 4.0 4.2 V VIN Hysteresis Width VINHYS - 0.2 - V VDC1 VDC2 ILEDO ILEDC 4.75 - 5.0 1.8 - 5.25 100 50 V V mA mA RLED - 6 9.3 Ω 1.8 - (Note 10) V 0.8 - (Note 10) V Power Consumption Unit mA LDO1 Output Voltage LDO2 Output Voltage LED Current Capability per Channel LED current switching MOS-FET ON resistance LED pin Voltage (for all 27 channels) RLED Conditions DRSET=”L” (open drain) PWM duty= 0% DRSET=”L” (open drain) PWM duty=50% DRSET=”H” (fixed current) PWM duty= 0% DRSET=”L” (fixed current) PWM duty= 50% Activated by decreasing VIN from normal state. Hysteresis between VINrst and VIN set voltage (VINset) (VINset>VINrst) VIN=12V, IDC1=-30mA (Note 9) VIN=12V, IDC2=-0mA DRSET=”L” (open drain) DRSET= “H” (fixed current) DRSET=”L” (open drain) LED current= +100mA DRSET=”H” (fixed current) LED current= +50mA RISET= 20kΩ DRSET=”H” (fixed current) LED current= +15mA RISET= 66.7kΩ DRSET=”H” (fixed current) DRSET=”H” (fixed current) RISET= 66.7kΩ DRSET=”H” (fixed current) (Note 11) LED pin voltage= 24V All setting value All setting value PWMSET=”L” PWMSET=”H” LED Current Accuracy 1 ILEDC1 28.05 30.0 31.95 mA LED Current Accuracy 2 ILEDC2 13.95 15.0 16.05 mA LED Current Mismatch △ILED -4 - 4 % ILEAK_LED TPWM DPWM VIH VIL -10 0 2.5 -0.2 ±1 ±1 - 1.0 +10 100 5.5 0.5 μA % % LSB LSB V V VOH 3.7 - 5.3 V IO=-500μA VOL ILI ILO 0 -1.0 -1.0 - 0.8 1.0 1.0 V μA μA IO=+500μA CSB, SCK, TxD pins LED pin off-lead Current PWM Period Accuracy PWM Setting Range PWM Setting Error - Input High-level Voltage Input Low-level Voltage Output High-level Voltage Output Low-level Voltage Input Leak Current Output Leak Current Note 9. IDC1=-30mA means that internal 5V LDO1 (VDC1 pin) can drive external circuit less than 30mA. Note 10. VLED identifies the voltage range. There is a range that cannot be set even less than absolute maximum voltage (30V) because of the maximum power dissipation. Please refer to “10.8 Protection Functions”. Note 11. △I LED (%) 015008157-E-00 I LEDxxMAX I LEDxxMIN 100 I LEDxxMAX I LEDxxMIN - 10 - 2015/09 [AP4201] ■ SCI Interface (AC timing) Table 1. SCI Timing Parameter SCK Period SCK Pulse Width CSB Set-up Time CSB Hold Time Data Set-up Time Data Hold Time Symbol tSCKP tSCKW tCSS tCSH tDIS tDIH typ - max 80 50 - Unit ns ns ns ns ns ns ns ns μs Condition RxD pin Output Delay Time tPD CSB High-level Minimum Time RxD pin High-impedance Output Delay Time tCS min 200 60 50 70 50 70 2 tOZ - - 250 ns CL=100pF - - tSCKW×15% 600 tSCKW×15% 600 ns ns ns ns tSCKW<4000ns tSCKW≥4000ns tSCKW<4000ns tSCKW≥4000ns tSCKW tSCKW SCK, CSB, TxD Raising Time tCSR SCK, CSB, TxD Falling Time tCSF tCS CL=100pF CL=20pF tCSS CSB tSCKP SCK tDIS tDIH TxD RxD Hi-Z Figure 2. SCI Interface Timing Chart 1 015008157-E-00 - 11 - 2015/09 [AP4201] “H” CSB tSCKP “L” tSCKW tSCKW tSCKH SCK tDIS tDIH TxD tPD RxD tPD Hi-Z tCSH CSB SCK TxD tOZ RxD tSCR tSCF 0.8 VDC SCK, CSB, TxD 0.2 VDC Figure 3. SCI Interface Timing Chart 2 ■ Serial F/F Control (AC timing) Table 2. Serial F/F Control Timing Parameter Symbol min typ max Unit Condition CLK Period tCLP 100 ns CLK Pulse Width tCLW 40 ns Data Set-up Time tDIS 25 ns Data Hold Time tDIH 40 ns LAT Pulse Width tLAW 2 μs The AC timings of CLK (SCK), LAT (CSB), SI (TxD) and SO (RxD) are the same as the SCI interface except data set-up time and data hold time. But the SO (RxD) pin output delay time is the value when CL=20pF. tCLP tCLW tCLW CLK tLAW tLAW LAT Figure 4. Serial F/F Control timing 015008157-E-00 - 12 - 2015/09 [AP4201] 10. Functional Descriptions 10.1. Operation Outline The AP4201 controls external LED lights using the data that can be configured by two types of interfaces (4-wire SCI control, serial F/F control). Fixed current output or open drain can be selected by the DRSET pin setting. LED lighting is performed by switching the LED current using internal MOSFET controlled by the PWM method. In this case, LED current will be set by an external resistor which is connected to each LED pin when open drain is selected. When fixed current is selected, LED current will be set by an external resistor which is connected to each RGB line, and the all LED pins in the same color are set with the same value. The AP4201 has an IC address configured by OPEN/SHORT setting of the A0 to A4 pins, and the LED pin addresses that are determined through the SCI interface. By using this IC address configuration, diversification of the LED lighting across multiple AP4201s in a single BUS can be achieved. By using the OENB pin, all LEDs can be simultaneously turned off regardless of the signal from the SCI interface. However, this is not the lowest power consumption state because the LED gradation data is still being held even while all LEDs are turned off. Table 3. Description Table for Setting Pins DRSET pin DRSET setting result Connect to GND (“L”) Open drain output OPEN (“H”) Fixed current output PWMSET pin Connect to GND (“L”) Connect to VDC (“H”) SCIEN pin Connect to GND (“L”) OPEN (“H”) SCIEN setting result Serial F/F control SCI control Dimming PWM frequency[Hz] (same as period[µs]) (typ) 1830Hz (546µs) 2745Hz (364µs) 10.2. SCI Interface Command Table 4. Command Description (Hereinafter initial “16-bit” data transmission is called command part) Instruction Function Description Content Instruction Designate instruction contents by initial “4-bit” Instructions for a different configured address “A4~A0” Assign the IC address (set by these pins) are ignored. (“H” display) “1”= Write “RW” “0”= Read “1”= All LED pins (all RGB sets) “ALL” Give the priority to the setting of “ch3~ch0” “0”= Base on ch3~ch0 setting Set to [1] only in case of PWM output stopped “1”= LED gradation PWM output stop “RST” Stopped in case of「RW」=「ALL」=「RST」 “0”= Normal operation setting value = “1” “ch3~ch0” Assign RGB sets in case of ALL= “0” 015008157-E-00 - 13 - 2015/09 [AP4201] Table 5. LED Line Address ch3 0 LED line address ch2 ch1 ch0 0 0 0 Channel (LED line) LEDR0, LEDG0, LEDB0 ch3 1 LED line address ch2 ch1 ch0 0 0 0 0 0 0 1 LEDR1, LEDG1, LEDB1 1 0 0 1 0 0 1 0 LEDR2, LEDG2, LEDB2 1 0 1 0 0 0 1 1 LEDR3, LEDG3, LEDB3 1 0 1 1 0 1 0 0 LEDR4, LEDG4, LEDB4 1 1 0 0 0 1 0 1 LEDR5, LEDG5, LEDB5 1 1 0 1 0 0 1 1 1 1 0 1 LEDR6, LEDG6, LEDB6 LEDR7, LEDG7, LEDB7 1 1 1 1 1 1 0 1 Channel (LED line) LEDR8, LEDG8, LEDB8 LEDR8~LEDR0 write to LEDR pins in order LEDG8~LEDG0 write to LEDG pins in order LEDB8~LEDB0 write to LEDB pins in order LED*8~LED*0 write to LEDR,G,B pins with same data at the same time LED** write to all LED pins with same data Setting is prohibited Table 6. Command Table Command SCL Normal Unreflected Lach 1 0 0 0 Instruction 2 3 0 1 0 0 0 0 4 0 1 0 5 A4 IC address 6 7 8 A3 A2 A1 9 RW 10 ALL 11 RST 12 13 A0 RW ALL RST ch3 LED address 14 15 16 ch2 ch1 ch0 Pin SCK TxD Do Not Enter Note 12. Changing setting of the A4~A0 pins is prohibited when the CSB pin= “L” (during command input). Note 13. 1. Normal Command: when the CSB pin is set “H” after executing a command, the state of the LED lighting reflects the PWM gradation data configured by the command. 2. Unreflected Command: when the CSB pin is set “H” after executing a command, the state of LED lighting does not reflect the PWM gradation data configured by the command. LED lighting is not changed by executing the command. 3. Latch Command: Latch Command simultaneously executes the LED lighting based on all the PWM gradation data in the IC when the CSB pin is set “H” after executing the Latch command. 4. When the latch command is executed, LEDs that are not set with PWM gradation data are turned off. 5. In case of the latch command, the CSB pin can be set “H” after entering the “4-bit” instruction. 6. When ALL= “0” is set, the PWM gradation data should be set for 1-RGB (=3 LED lines). e.g. In the case of ch3~ch0= “0011”, (R3D7~R3D0) (G3D7~G3D0) (B3D7~B3D0) should be set with the same command. 7. When ALL= “0” is set, there is a possibility that the AP4201 becomes shipping test status by setting a one LED line address to the “setting prohibited status” twice continuously. (It is necessary to supply the power again to recover from this shipping test status.) Table 7. IC Address List IC Address Data [A4~A0]: Command will be executed to the assigned IC address. 00000 = Address 0 01000 = Address 8 10000 = Address 16 11000 = Address 24 00001 = Address 1 01001 = Address 9 10001 = Address 17 11001 = Address 25 00010 = Address 2 01010 = Address 10 10010 = Address 18 11010 = Address 26 00011 = Address 3 01011 = Address 11 10011 = Address 19 11011 = Address 27 00100 = Address 4 01100 = Address 12 10100 = Address 20 11100 = Address 28 00101 = Address 5 01101 = Address 13 10101 = Address 21 11101 = Address 29 00110 = Address 6 01110 = Address 14 10110 = Address 22 11110 = Address 30 00111 = Address 7 01111 = Address 15 10111 = Address 23 11111 = Address 31 Note 14. Set address 0~31 by the A4~A0 pin for IC address setting (connect to GND or OPEN). 015008157-E-00 - 14 - 2015/09 [AP4201] Table 8. Normal Command Examples Normal Command SCL(times) Case 1 Case 2 Case 3 Case 4 Case 5 Case 6 Case 7 Instruction 1 0 0 0 0 0 0 0 2 0 0 0 0 0 0 0 3 1 1 1 1 1 1 1 IC Address 4 0 0 0 0 0 0 0 5 A4 A4 A4 A4 A4 A4 A4 6 A3 A3 A3 A3 A3 A3 A3 7 A2 A2 A2 A2 A2 A2 A2 8 A1 A1 A1 A1 A1 A1 A1 9 A0 A0 A0 A0 A0 A0 A0 RW ALL RST 10 1 1 0 0 1 1 1 11 1 0 1 0 1 0 0 12 0 0 0 0 1 0 0 LED Line Address 13 0 0 1 1 14 1 0 0 1 15 0 1 0 0 Pin 16 0 0 1 0 SCK TxD Note 15. ‘Data’ described below represents the PWM gradation data for each individual LED channel. The PWM gradation data is set in hexadecimal for the lighting ratio. “8-bit” data “10(H)” generates a light level of 16/255. (All-0= “00(H)”= turns all LEDs off) Case 1: Write LED gradation data using an “8-bit” configuration to the IC assigned by an IC address. In accordance with [ALL] = “1”, write data to all the LED lines. In this case, LED line address data are ignored; however, the 4 clock pulses for the LED line addresses are still necessary. Following the initial “16-bit” command, “8-bit” x 27 LED lines = “216-bit” of data input are necessary. Case 2: Write LED gradation data using an “8-bit” configuration to the IC assigned by an IC address. In accordance with [ALL] = “0”, write data to a specified 3 colors LED line(LEDR4, LEDG4, LEDB4). Following the initial “16-bit” command, “8-bit” x 3 LED lines = “24-bit” of data input are necessary. Case 3: Read LED gradation data using an “8-bit” configuration from the IC assigned by an IC address. In accordance with [ALL] = “1”, read data from all the LED lines. In this case, LED line address data are ignored; however, the 4 clock pulses for the LED line addresses are still necessary. Following the initial “16-bit” command, CLK pulses for “8-bit” x 27 LED lines = “216-bit” are necessary. Case 4: Read LED gradation data using a “8-bit” configuration from the IC assigned by an IC address. In accordance with [ALL] = “0”, read data from a specified 3 colors LED lines (LEDR2, LEDG2, LEDB2). In this case, Following the initial “16-bit” command, CLK pulses for “8-bit” x 3 LED lines = “24-bit” are necessary. Case 5: This command means [turn off all at once]. In accordance with [RW]=[ALL]=[RST]= “1”, turn off LEDs of the IC assigned by an IC address. This command is used to turn off all LED lines, the LED gradation data before turning off will be kept continually. Executing a latch command can relight the LEDs with the same gradation data. This command is valid when the instruction= [normal command], [RW]=[ALL]=[RST]= “1” and command length ≥ “16-bit” (need “16-bit” CLK pulse input). If [RST]= “1” is input when these conditions are not satisfied, [RST] command will be recognized as “0”. (This command is used for LED dynamic and scanning drives.) Case 6: Write LED gradation data by an “8-bit” configuration to an IC assigned by the IC address. In accordance with [ALL]= “0” and LED line setting (ch3~ch0), only write [R] data to LED lines in the order as shown below. (R8D7~R8D0) (R7D7~R7D0) … (R0D7~R0D0) [Total “8-bit”×9LED lines = “72-bit” (bit number of data)] Case 7. Write LED gradation data using an “8-bit” configuration to an IC assigned the IC address. In accordance with [ALL]= “0” and LED line setting (ch3~ch0), write data to one set of LED lines for three colors in the order as shown below. (RxD7~RxD0) (GxD7~GxD0) (BxD7~BxD0) [Total “8-bit”×3LED lines = “24-bit” (bit number of data)]. For this setting, the data of one set of written LED lines for three colors is reflected to all LED lines. 015008157-E-00 - 15 - 2015/09 [AP4201] ・Timing Diagram RW=1,ALL=1,RST=0,ch3~ch0=任意 の場合 (RxDはHi-Z出力される) RW= “1”, ALL= “1”, RST= “0”, ch3~ch0= “arbitrary value” (RxD outputs Hi-Z) CSB SCK 1 0 TxD SCK TxD SCK TxD 2 3 0 1 18 17 R8D7 B8D7 35 37 B8D4 38 R8D1 B8D0 27 G8D6 41 28 G8D5 42 R7D7 12 13 14 ALL RST ch3 26 G8D7 40 11 RW 25 R8D0 B8D1 10 A0 24 39 B8D2 9 A1 23 R8D2 B8D3 8 A2 22 R8D3 36 7 A3 21 R8D4 B8D5 B8D6 6 A4 20 R8D5 34 5 0 19 R8D6 33 4 G8D4 43 R7D6 29 44 R7D5 G8D3 45 R7D4 ch2 30 G8D2 46 R7D3 R7D2 15 ch1 31 G8D1 47 R7D1 16 ch0 32 G8D0 48 R7D0 CSB SCK TxD 218 217 G0D7 219 G0D6 220 G0D5 221 G0D4 222 G0D3 223 G0D2 224 G0D1 225 G0D0 226 B0D7 227 B0D6 228 B0D5 229 B0D4 230 B0D3 B0D2 231 B0D1 232 B0D0 RW=1,ALL=0,RST=0,ch3~ch0=0100 の場合 (RxDはHi-Z出力される) RW= “1”, ALL= “0”, RST= “0”, ch3~ch0= “0100” (RxD outputs Hi-Z) CSB SCK 1 0 TxD SCK 2 17 TxD R4D7 3 0 18 R4D6 4 1 19 R4D5 5 0 20 R4D4 A4 21 R4D3 6 A3 22 R4D2 7 8 A2 23 A1 24 R4D1 R4D0 9 A0 25 G4D7 10 11 12 13 RW ALL RST ch3 26 G4D6 27 G4D5 28 G4D4 29 G4D3 14 ch2 30 G4D2 15 16 ch1 31 ch0 32 G4D1 G4D0 CSB SCK 33 TxD B4D7 34 B4D6 35 B4D5 36 B4D4 37 B4D3 38 B4D2 39 40 B4D1 B4D0 LED line (gradation data): R4、G4、B4 Data write order (MSB-first): R4D7, R4D6, …R4D1, R4D0, G4D7, G4D6, …G4D1, G4D0, B4D7, B4D6, …B4D1, B4D0 015008157-E-00 - 16 - 2015/09 [AP4201] RW=0,ALL=1,RST=0,ch3~ch0=任意 の場合 RW= “0”, ALL= “1”, RST= “0”, ch3~ch0= “random” CSB SCK TxD 1 2 0 3 0 4 1 5 0 6 A4 7 A3 8 A2 A1 RxD SCK 9 10 A0 11 12 13 14 RW ALL RST ch3 15 ch2 16 ch1 ch0 Hi-Z 18 17 19 20 21 22 R8D4 R8D3 36 37 B8D4 B8D3 23 24 25 26 27 28 29 30 31 32 TxD RxD SCK R8D7 R8D5 R8D6 34 33 35 R8D2 R8D1 38 R8D0 39 G8D7 40 G8D6 41 42 G8D5 43 G8D4 G8D3 44 45 R7D4 R7D3 G8D2 G8D1 46 G8D0 47 48 TxD RxD B8D7 B8D5 B8D6 B8D2 B8D1 B8D0 R7D7 R7D6 R7D5 R7D2 R7D1 R7D0 CSB SCK 218 217 219 220 221 222 223 224 225 226 227 228 229 230 231 232 TxD RxD G0D7 G0D5 G0D6 G0D4 G0D3 G0D2 G0D1 G0D0 B0D7 B0D6 B0D5 B0D4 B0D3 B0D2 B0D1 B0D0 RW=0,ALL=0,RST=0,ch3~ch0=0010 の場合 RW= “0”, ALL= “0”, RST= “0”, ch3~ch0= “0010” CSB SCK TxD 1 2 0 3 0 4 1 5 0 A4 6 A3 7 8 A2 RxD SCK 9 A1 A0 10 11 12 13 RW ALL RST ch3 14 ch2 15 ch1 16 ch0 Hi-Z 17 18 19 20 21 22 23 24 25 26 27 28 29 30 G2D3 G2D2 31 32 TxD RxD R2D7 R2D6 R2D5 R2D4 R2D3 R2D2 R2D1 R2D0 33 34 35 36 37 38 39 40 B2D7 B2D6 B2D5 B2D4 B2D3 B2D2 B2D1 G2D7 G2D6 G2D5 G2D4 G2D1 G2D0 CSB SCK TxD RxD 015008157-E-00 B2D0 - 17 - 2015/09 [AP4201] RW=1,ALL=1,RST=1,ch3~ch0=任意 の場合 (RxDはHi-Z出力される) RW= “1”, ALL= “1”, RST= “1”, ch3~ch0= “random” (RxD output Hi-Z) CSB SCK 1 2 0 TxD 3 0 4 1 5 0 6 A4 7 A3 8 A2 9 A1 10 A0 RW 11 12 13 ALL RST ch3 14 15 ch2 16 ch1 ch0 15 16 RW=1,ALL=0,RST=0,ch3~ch0=1001 の場合 (RxDはHi-Z出力される) RW= “1”, ALL= “0”, RST= “0”, ch3~ch0= “1001” (RxD output Hi-Z) CSB SCK 1 0 TxD SCK TxD SCK TxD 2 3 0 18 17 R8D7 R6D7 1 19 R8D6 34 33 4 0 20 R8D5 35 R6D6 5 A4 21 R8D4 36 R6D5 6 R8D3 37 R6D4 R6D3 7 A3 22 R8D2 38 R6D2 8 A2 23 9 A1 24 R8D1 39 R8D0 40 R6D1 R6D0 10 A0 25 R7D7 41 R5D7 RW 26 R7D6 42 R5D6 11 12 13 ALL RST ch3 27 R7D5 43 R5D5 28 R7D4 44 R5D4 29 R7D3 45 R5D3 14 ch2 30 R7D2 46 R5D2 ch1 31 R7D1 47 R5D1 ch0 32 R7D0 48 R5D0 CSB SCK TxD 74 73 R1D7 75 R1D6 76 R1D5 77 R1D4 R1D3 78 R1D2 79 80 R1D1 R1D0 81 R0D7 82 R0D6 83 R0D5 84 R0D4 85 R0D3 86 R0D2 87 88 R0D1 R0D0 15 16 RW=1,ALL=0,RST=0,ch3~ch0=0000~0111 の場合 (RxDはHi-Z出力される) RW= “1”, ALL= “0”, RST= “0”, ch3~ch0= “0000~0111” (RxD output Hi-Z) CSB SCK 1 0 TxD SCK TxD 2 17 R*D7 3 0 18 R*D6 4 1 19 R*D5 5 0 20 R*D4 A4 21 R*D3 6 A3 22 R*D2 7 8 A2 23 A1 24 R*D1 R*D0 9 A0 25 G*D7 10 11 12 13 RW ALL RST ch3 26 G*D6 27 G*D5 28 G*D4 29 G*D3 14 ch2 30 G*D2 ch1 31 G*D1 ch0 32 G*D0 CSB SCK TxD 33 B*D7 015008157-E-00 34 B*D6 35 B*D5 36 B*D4 37 B*D3 38 B*D2 39 40 B*D1 B*D0 - 18 - 2015/09 [AP4201] 10.3. Serial F/F Cascade Control Input LED gradation data serially (8 bits x 27ch= 216 bits) and set PWM data from internal shift register to control LEDs. Multiple AP4201s can be used to control LEDs with shift register by connecting the SO output pin to the next IC’s SI pin. Table 9. Serial F/F Cascade Control Input CLRB CLK LAT ENB L × × × H L H H L L H L H Shift register Latch Data LED pin L Data shift (Note 16) SI→PWM_B0→ PWM_G0→PWM_R0→ PWM_B1→ : : PWM_7R→ PWM_8B→PWM_8G→ PWM_8R→SO Data shift (Note 16) SI→PWM_B0→ PWM_G0→PWM_R0→ PWM_B1→ : : PWM_7R→ PWM_8B→PWM_8G→ PWM_8R→SO Not shift L OFF Hold OFF Hold ON at PWM signal = “1” OFF at PWM signal = “0” Transfer off ON at PWM signal = “1” H L L Not shift Transfer OFF at PWM signal = “0” ON at PWM signal = “1” H × × L - - OFF at PWM signal = “0” Note 16. PWM_Rx, PWM_Gx, PWM_Bx (x=8~0) means shift each channel’s PWM gradation data. (same as CSI control, input with MSB order) e.g.) PWM_B0: “B0D0→B0D1→B0D2→B0D3→B0D4→B0D5→B0D6→B0D7” (B0D0 is the LSB gradation data of LEDB0, B0D7 is the MSB gradation data of LEDB0) SI CLK LAT ENB PWM Signal (take PWM data with LAT rising, PWM信号(LAT立ち上がりでPWMデータ取り込 and start PWM signal) み、及び、PWM信号開始) LED Lighting Control Signal (LED output change with ENB falling LED発光制御信号(ENB立ち下がりでLED出力変化) The SI inputLAT立ち上がりでSI入力シフトデータを複数chipで同時に取り込み、 shift data can be taken by many chips with LAT rising. Output eachchip毎にENB=0のときにLED発光制御信号を出力(ENB=1のときには全chがOFF) chip’s LED lighting control signal when ENB= “0” (ENB= “1”: all channel= “off”) Figure 5. Serial F/F Cascade Control 015008157-E-00 - 19 - 2015/09 [AP4201] 10.4. LED Current Setting (fixed current output) The AP4201 integrates 27-channel current sources for driving LEDs. The maximum current for each channel is 50mA. LED current can be adjusted from 5mA to 50mA with an external resistor which is connected between the ISET pin and GND. Since the ISET pin is easily affected by a noise, RISET layout should take a shortest connection to avoid unstable LED current. The ISET_R pin is used to set LEDR0~8 current, the ISET_G pin used to set LEDG0~8 current and the ISET_B pin used to set LEDB0 ~ 8 current. An approximate formula of ILED, that is LED current, and RISET resistor, which is connected to the ISET pin, and a relationship table between ILED and RISET are shown below. Please confirm actual values on your board when setting. ILED(mA) 1000 R ISET (k) Table 10. Combination of ILED and RISET RISET_R (kΩ) ILEDRx (mA) RISET_G (kΩ) ILEDGx (mA) RISET_B (kΩ) ILEDBx (mA) 200.0 5.0 166.7 6.0 142.9 7.0 125.0 8.0 111.1 9.0 100.0 10.0 90.9 11.0 83.3 12.0 76.9 13.0 71.4 14.0 66.7 15.0 62.5 16.0 58.8 17.0 55.6 18.0 52.6 19.0 50.0 20.0 47.6 21.0 45.5 22.0 43.5 23.0 41.7 24.0 40.0 25.0 38.5 26.0 37.0 27.0 015008157-E-00 RISET_R (kΩ) RISET_G (kΩ) RISET_B (kΩ) 35.7 34.5 33.3 32.3 31.3 30.3 29.4 28.6 27.8 27.0 26.3 25.6 25.0 24.4 23.8 23.3 22.7 22.2 21.7 21.3 20.8 20.4 20.0 - 20 - ILEDRx (mA) ILEDGx (mA) ILEDBx (mA) 28.0 29.0 30.0 31.0 32.0 33.0 34.0 35.0 36.0 37.0 38.0 39.0 40.0 41.0 42.0 43.0 44.0 45.0 46.0 47.0 48.0 49.0 50.0 2015/09 [AP4201] 10.5. Input Voltage Range (VIN) Basically, the input voltage range is 8V~24V. It can be changed to 4.5~5.5V by shorting the VIN pin and the VDC1 pin when 5V power supply is used. A normal operation cannot be guaranteed with an input that is in the range of 5.5V~8V. Table 11. Input Voltage Range Input Voltage Range 1 Input Voltage Range 2 VIN VIN 8V~24V 4.5V~5.5V 1mF 1mF VDC VDC 1mF 10.6. POR Operation (Power on Reset) The internal POR circuit releases reset state after a specific period of time (t1) when a power supply more than 6V is applied to the VIN pin. Do not input a command code via the interface for specific period of time (t2) after releasing reset state for a certain stabilization of the internal oscillation frequency. The following figure shows the POR timing when power is applied. During the “t1” period, a command from the interface is not accepted. Please note, that a command accepted during the “t2” period may be interpreted incorrectly. 8V~36V 8V~24V 6V(VINset) VIN Vset Internal VDC2 5.0V LDO 1.8V 5V Signal SCI-I/Finput available can be entered t1 Reset t2 Internal POR Reset release Figure 6. POR Operation (Power on Reset) Table 12. POR Timing when Power Applied Parameter min typ max Unit Note VIN pin voltage > 6V, IDC1= -30mA. t1 2800 ms Bypass capacitor between the VDC pin and GND CVDC=1.0mF. t2 200 Stabilization time of internal power ms Note 17. As shown above, the AP4201 is in normal operation after 3msec at maximum from the time the VIN voltage reaches 6V. In the case of “Input Voltage Range 2”, the AP4201 is in normal operation after 3mec from the time the VIN voltage reaches 4.5V. Note 18. In case that the internal POR circuit is reset by decreasing VIN voltage follows the prescribed times above. 015008157-E-00 - 21 - 2015/09 [AP4201] 8V~24V VINRST VIN VDC2RST 1.8V VDC2 リセット Reset 内蔵POR Internal POP リセット解除中 Reset release Figure 7. POR Timing Chart Table 13. POR Timing when VIN Decreases Parameter min typ max Unit Condition VINrst 4.0 4.2 V VIN reset voltage VDC2rst 1.2 1.5 V Internal 1.8V LDO reset voltage (reference value) Note 19. This function executes reset when the supply voltage decreases, preventing instability. However, the reset may not be executed even the supply voltage becomes below the VINrst voltage such as when VIN decreases to near 0V instantaneously. Therefore, in the actual use, it is recommended to design the application in consideration with the VIN voltage to avoid activating this function by peripheral noise or voltage fluctuations. Note 20. The IC is designed to work normally as possible, so sometimes LED gradation data can be hold even when VIN< VINRST, and LEDs turn off all at once. (Lighting setting is holding) Note 21. As long as the VIN voltage (IC pin voltage) is more than the maximum VINrst voltage, continuous proper operation of the AP4201 is guaranteed (by design). However if the VIN voltage is out of recommend voltage range, the communication function via input signal is not guaranteed. 10.7. Reset State Immediately after start up the AP4201 or after reset by decreasing power supply voltage, LED gradation data in the IC is all reset (all data= “0”). Therefore, LEDs will not light unless new gradation data is input via SCI interface. The AP4201 has all turn off function (in case of SCI interface control). It can be used as reset function. Reset types and reset states are shown below. Table 14. Types of Reset and status VIN Input LED lighting status LED gradation data input LED gradation data hold LDO1(5V) Output 015008157-E-00 - Types of Reset VIN falls VDC1 falls VDC2 falls LED All Off Impossible Hold Hold Reset Undefined - 22 - LED All Off Possible Hold Normal 2015/09 [AP4201] 10.8. Protection Functions The AP4201 has an over current (LED current) protection and a thermal protection function in order to prevent damaging the IC. The LED current is shut off when these functions are activated and recovers automatically when the fault condition is removed. Table 15. Protection Function (All values are guaranteed by design) Protection Function Over Current Protection LED Current LED Current per channel ≥ 200mA (typ.) Shut-off Condition LED Current Objective LED line Shut-off points Timer-latch type recovery Recovery Type Recovery Condition Thermal Protection Junction Temperature ≥ 140°C (typ.) All 27 Channels (also shut-off VDC1 output) Check if the overcurrent condition still exists after 0.3 second (typ) following LED current shut-off. After checking three times, if the over current condition still exists, LED current will be shut off continuously. (Latching) Before Latch: Intended channel current ≥ 150mA (typ.) After Latch: Power Reboot Auto-recovery Junction Temperature ≥ 120°C (typ.) Note 22. The over current protection function works when the LED is lighten and shuts off the LED current. In the case that LED channels are not set to light the LEDs, this protection will not work even if the LED pin voltage is “H”. This function is disabled in fixed current output mode. Note 23. The thermal protection function is an auxiliary function for the worst case and it is not guaranteed to work reliably. Therefore, it is recommended that application is designed in consideration with heat generation in order to prevent activation of the thermal protection. Note 24. When the VDC1 and VDC2 pins are shorted to GND, there is a case that thermal protection works because the internal LDO is overheated by high VIN voltage and there is a case that Power On Reset works because of the voltage at the VDC2 pin is decreased. The external current capability of the VDC1 pin is maximum 30mA. Note 25. VLED voltage and LED current settings according to the ambient temperature (Ta) are shown below. Table 16. VLED voltage and LED current settings (Condition: VIN=12V, IDC1=0mA) IC ambient Output setting LED pin voltage temperature DRSET Ta [°C] VLED [V] 25 Low (open drain) 55 ― 70 3.1 25 2.3 2.6 55 2.1 High (fixed current) 3.0 2.4 70 2.0 1.7 015008157-E-00 - 23 - LED current ILED [mA] ILEDTO=73 [mA] ILEDTO=61 [mA] ILEDTO=53 [mA] ILEDTC=15 [mA] ILEDTC=20 [mA] ILEDTC=12 [mA] ILEDTC=15 [mA] ILEDTC= 8 [mA] ILEDTC=10 [mA] ILEDTC=12 [mA] ILEDTC=14 [mA] 2015/09 [AP4201] 11. Recommended External Circuits 12V, 18V power line STM power line 12V R VIN AP4201 ×Max 32pcs VIN AP4211 STM Drv IC AP4201 LED Drv IC STM ×27ch H8SX Etc. 4-bit 4-bit AP4211 ×Max 16pcs SCI-4 wire bus max 5.0MHz Figure 8. Recommended External Circuits Note 26. If data on the AP4201/AP4211 application board will not be read, it is unnecessary to connect RxD of the SCI 4-wire BUS. The 4-wire BUS can be reduced to a 3-wire BUS. The RxD terminal is an output terminal, and it should be open when RxD is not used. When using the AP4201 as an open drain driver, external resistors for current setting can be removed. In this case, the ISET_R, G, B pins should also be open. 015008157-E-00 - 24 - 2015/09 [AP4201] 12. Package ■ Package ・48-pin LQFP(Unit:mm) ■ Marking AP4201 (3) XXXXXXX (2) (1) (1) 1pin Indication (2) Product No. (3) Date Code (7digits) 2 digits for the year, 2 digits for the weed code, 1 digit for the wafer factory code, 1 digit for lot number, 1 digit for the assembly factory Note 27. Week code: the first Thursday of the week of the assembly year is marked to as 01, the second week is marked as 02 … and the 52nd week is marked as 52. (Compliance with ISO-8601) Please contact to our sales office for more detailed marking specification. (example: marking size, marking print sample and etc.) 015008157-E-00 - 25 - 2015/09 [AP4201] 13. Revision History Date (Y/M/D) 15/09/15 015008157-E-00 Revision 00 Page - Contents First Edition - 26 - 2015/09 [AP4201] IMPORTANT NOTICE 0. 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This document may not be reproduced or duplicated, in any form, in whole or in part, without prior written consent of AKM. 015008157-E-00 - 27 - 2015/09