AK9223MK

[AK9223]
AK9223
Dual 1-Bit, 10MHz, 2nd-Order, ΔΣ Modulat
or
General Description
The AK9223 is a 2ch delta-sigma modulator that achieves 86dB dynamic range. It operates of a 5V power
supply. The AK9223 is available in a space-saving 24-pin TSSOP package.
Features
 Resolution: 16-bit
 Linearity: 13-bit
 Input Voltage Range: ±2.3V
 High Accurate Reference Voltage: ±1% (2.5V ±0.025V), ±20ppm/C (typ.)
 Gain Error: 0.5% (max.)
 2ch ΔΣ Modulator
 2ch Input Reference
 20MHz OSC
 Selectable External Clocks
 Power Consumption: 67.5 mW (SEL=1, AVDD = DVDD = 5V)
 Power Supply: AVDD = 4.5 to 5.5V、DVDD = 2.7 to 5.5V
 Ta = -40 to 105C
 Small Package: 24-pin TSSOP (0.65mm pitch)
AVDD
AIN0+
AIN0-
DVDD
Second-Order
ΔΣModulator
Output
Interface
Circuit
OUT1
OUT2
CLKO
Clock
Select
CLKI
SEL
REFI0
CH2+
AIN1+
AIN1-
CH2REF2
Second-Order
ΔΣModulator
REFI1
REFO
20MHz
OSC
Oscillator
2.5V
Reference
Voltage
VSS1 VSS2 VSS3 VSS4 VSS5
Figure 1. Block Diagram
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■ Pin Configurations
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AVDD
1
24
AVDD
VSS1
2
23
REFO
REFI0
3
22
VSS4
TEST0
4
21
OUT0
AIN0+
5
20
OUT1
AIN0-
6
19
CLKO
AIN1-
7
18
VSS5
AIN1+
8
17
DVDD
TEST1
9
16
CLKI
REFI1
10
15
SEL
VSS2
11
14
VSS3
AVDD
12
13
AVDD
Top
View
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[AK9223]
Pin Functions
Pin No. Pin Name
I/O
Function
Analog Power Supply: 4.5V to 5.5V
1
AVDD
Connect to VSS1~VSS4 with a 0.1μF ceramic capacitor.
2
Ground
VSS1
3
I
Reference Voltage input for Channel 0
REFI0
TEST Pin.
4
TEST0
This pin must be open.
5
I
Channel 0 Analog input+
AIN0+
6
I
Channel 0 Analog inputAIN07
I
Channel 1 Analog input+
AIN1+
8
I
Channel 1 Analog inputAIN1TEST Pin.
9
TEST1
This pin must be open.
10
I
Reference Voltage input for Channel 1
REFI1
11
Ground
VSS2
Analog Power Supply: 4.5V to 5.5V
12
AVDD
Connect to VSS1~VSS4 with a 0.1μF ceramic capacitor.
Analog Power Supply: 4.5V to 5.5V
13
AVDD
Connect to VSS1~VSS4 with a 0.1μF ceramic capacitor.
14
Ground
VSS3
Clock select input
15
I
SEL
“H”: internal oscillator, “L”: external clock source
External clock input
16
I
CLKI
If not used, must be tied to DVDD or VSS5
Digital Power Supply: 2.7 V to 3.6V (or 4.5V to 5.5V)
17
DVDD
Connect to VSS5 with a 0.1μF ceramic capacitor.
18
Ground
VSS5
19
O
Clock output
CLKO
20
O
Data output of Channel 1 modulator
OUT1
21
O
Data output of Channel 0 modulator
OUT0
22
Ground
VSS4
I
23
Reference Voltage input for Channel 0
REF0
Analog Power Supply: 4.5V to 5.5V
24
AVDD
Connect to VSS1~VSS4 with a 0.1μF ceramic capacitor.
Note 1. Digital input pins (SEL, CLKI) must not be allowed to float.
■ Handling of Unused Pin
Unused I/O pins must be connected appropriately.
Classification Pin Name
Analog
AIN0+, AIN0-, AN1+, AIN1-, REFI0, REFI1
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Setting
VSS
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Absolute Maximum Ratings
(VSS1~VSS5 = 0V; Note 2, Note 3)
Parameter
Power Supply
Analog Input Current
(AIN0+, AIN0-, AIN1+, AIN1-, REFI0, REFI1)
Analog Input Voltage
(AIN0+, AIN0-, AIN1+, AIN1-, REFI0, REFI1)
Digital Input Current (CLKI, SEL)
Digital Input Voltage (CLKI, SEL)
Storage Temperature
Symbol
VDD
AIIN
Min.
-0.3
-
Max.
+6.0
10
Unit
V
mA
AVIN
-0.3
AVDD+0.3
V
DIIN
DVIN
Tstg
-0.3
-65
10
DVDD+0.3
150
mA
V
C
WARNING: Operation at or beyond these limits may result in permanent damage to the device.
Normal operation is not guaranteed at these extremes.
Recommended Operating Conditions
(VSS1~VSS5 = 0V; Note 2, Note 3)
Parameter
Symbol
Min.
Typ.
Max.
Unit
Analog Power Supply
AVDD
4.5
5.0
5.5
V
Digital Power Supply
DVDD 3V logic level
2.7
3.0
3.6
V
5V logic level
4.5
5
5.5
V
Input Reference Voltage
REFI
0.5
2.5
2.6
V
Analog Input
Vin= (AIN+) - (AIN-)
-0.92 x VREF
+0.92 x VREF
V
External clock
16
20
24
MHz
Ambient Operating
Ta
-40
105
C
Temperature
Note 2. All voltages are with respect to ground.
Note 3. VSS1, VSS2, VSS3, VSS4 and VSS5 must be connected to the same analog ground plane.
Note 4. The power supply sequence between AVDD and DVDD is not critical upon power-up.
* AKM assumes no responsibility for the usage beyond the conditions in this datasheet.
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Analog Characteristics
(Ta = -40C to 105C; AVDD=5V, DVDD=3V, AIN+=0.2V to 4.8V, AIN-=2.5V, REFI=REFO=2.5V
(internal), CLKI= 20MHz, and 16bit Sinc3 filter with OSR =256; unless otherwise specified)
Parameter
Min.
Typ.
Max.
Unit
Resolution
16
Bits
Integral Nonlinearity (INL)
-8
±3.8
+8
LSB
VIN = ±2.3Vpp
Error
(Note 5)
-4
±1.8
+4
LSB
VIN = ±2.0Vpp
Integral Nonlinearity Match
1
4
LSB
Differential Nonlinearity (DNL) Error
-1
+1
LSB
Offset Error
REFI=2.5V
-3
±1.5
+3
mV
Offset Error Match
0.2
2
mV
Offset Error Drift
(Note 6)
-8
1
+8
V /C
Gain Error
(Note 7) Referenced REFI = 2.5V
-0.5
±0.02
+0.5
%FSR
Gain Error Match
0.1
0.5
%FSR
Gain Error Drift
(Note 8)
±1.3
ppm/C
PSRR
82
dB
Analog Input
Full scale Differential Input
(AIN+)-(AIN-)
-REFI
+REFI
V
Voltage Range:
AIN- =2.5V
Specified Differential Input
(AIN+)-(AIN-)
-0.92 x
+0.92 x
V
Voltage Range
AIN- =2.5V
REFI
REFI
Absolute Input Voltage Range
0
AVDD
V
Input Capacitance
AIN to VSS
1
pF
Input Leakage Current
Clock turned off (Note 9)
-1
+1
A
Differential Input
80
100
120
k
Resistance
Differential Input
2.5
pF
Capacitance
CMRR
at dc
108
dB
AIN- =2.5V
Vin = ±1.25Vpp at 40kHz
117
dB
Sampling Dynamics
Internal Clock Frequency
9
10
11
MHz
SEL=1, -40C to +105C
External Clock Frequency
SEL=0
(Note 10)
1
20
24
MHz
Dynamic Characteristics
THD
Vin = ±2.3Vpp at 5kHz
-85
-80
dB
SFDR
Vin = ±2.3Vpp at 5kHz
82
86
dB
S/N
Vin = ±2.3Vpp at 5kHz
88
92
dB
Vin = ±2.0Vpp at 5kHz
87
91
dB
S/(N+D)
Vin = ±2.3Vpp at 5kHz
80
84
dB
Channel to Channel Isolation Vin = ±2.3Vpp at 5kHz
100
dB
Note 5. Integral nonlinearity is defined as the maximum deviation of the line through the end points of the
specified input range.
Note 6. This is the maximum variation referring the offset of Ta = 25C when the temperature range is
from -40 to 105C.
Note 7. Referring the REFI pin (It does not include internal VREF variation)
Note 8. This value does not include temperature drift of the internal VREF.
Note 9. Outgoing current from the AK9223 is defined as “-” polarity.
Note 10. Recommended input range of the external clock is from 16MHz to 24MHz. The range of
1MHz~16MHz and 24MHz~32MHz can also be available with reduced accuracy.
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Analog Characteristics
(Ta = -40C to 105C; AVDD=5V, DVDD=3V, AIN+=0.2V to 4.8V, AIN-=2.5V, REFIx=REFO=2.5V
(internal), CLKI= 20MHz, and 16bit Sinc3 filter with OSR =256; unless otherwise specified)
Parameter
Min.
Typ.
Max.
Unit
Reference Voltage Output
Reference output voltage
2.475
2.5
2.525
V
Reference output voltage drift
±20
ppm/
C
Output current
10
A
Short-circuit current
0.5
mA
Turn-on settling time
500
CF = 0.1F
(Note 11)
s
Reference Voltage Input
Reference input voltage
0.5
2.5
2.6
V
Input resistance
100
M
Input capacitance
5
pF
Input current
1
A
Power Supplies
AIDD
SEL=1
12.2
17
mA
SEL=0
11.8
16
mA
DIDD
DVDD=3V, CLKO = 10MHz
0.9
2
mA
DVDD=5V, CLKO = 10MHz
1.3
3
mA
Note 11. To accuracy level of 0.1%. This value will be 40s (typ) when no load.
REFO
AK9223
CF
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DC Characteristics
(Ta = -40C to 105C, AVDD=4.5V to 5.5V, DVDD=2.7V to 5.5V)
Parameter
Symbol
Min.
High-Level Input Voltage1,
VIH1
2
DVDD=2.7V to 3.6V
Low-Level Input Voltage1,
VIL1
DVDD=2.7V to 3.6V
High-Level Input Voltage2,
VIH2
0.7 x DVDD
DVDD=4.5V to 5.5V
Low-Level Input Voltage2,
VIL2
DVDD=4.5V to 5.5V
Input capacitance
Ic
Input Leakage Current
Iin
High-Level Output Voltage , DVDD=4.5V
VOH2
4.44
(Iout = -100µA)
Low-Level Output Voltage , DVDD=4.5V
VOL2
(Iout =100µA)
High-Level Output Voltage , DVDD=2.7V
VOH1
DVDD-0.2
(Iout = -100µA)
Low-Level Output Voltage , DVDD=2.7V
VOL1
(Iout =100µA)
Output Capacitance
CO
Load Capacitance
CL
-
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Typ.
Max.
Unit
-
V
0.8
V
-
-
V
-
0.3 x DVDD
V
5
-
±1
pF
uA
-
-
V
-
0.5
V
-
-
V
-
0.2
V
5
-
30
pF
pF
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[AK9223]
Switching Characteristics
(Ta = -40C to 105C, AVDD=5V, DVDD=2.7V to 5.5V, CL=30pF)
Parameter
Symbol
Min.
CLKI period
tCKI
41.6
CLKI High Pulse Width
tCKH
10
CLKO period
SEL=0
tCKO1
2 x tCKI
SEL=1
tCKO2
91
CLKO High Pulse Width
tCKOH
(tCKO/2) -5
CLKI “↑” to CLKO “↓” Delay
SEL=0
tPD1
CLKI “↑” to CLKO “↑” Delay
SEL=0
tPD2
CLKO “↑” to OUT data Delay
SEL=0
tPD3
tCKH-3
SEL=1
tPD4
(tCKO/4)-8
Typ.
Max.
1000
tCKI-10
111
(tCKO/2)+ 5
10
10
tCKH+7
(tCKO/4)+8
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
 Timing Diagram
tCKI
tCKH
CLKI
50%DVDD
tCKO
tPD1
tCKOH
CLKO
tPD2
50%DVDD
tPD3,tPD4
50%DVDD
OUT
Figure 2. Data Output Timing
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Functional Descriptions
The AK9223 is a 2ch delta-sigma modulator. “0” and “1” data is output from its OUT pins and the level of
analog input signal is expressed by the density of this digital output.
A delta-sigma modulator shifts quantized noise to high band. A low-pass filter is needed at the output of
the AK9223. High band noise is filtered and the 1-bit data steam at a high sampling rate is converted into
a higher-bit data word at a lower rate by this low-pass filter (decimation). This digital filter can be
composed by a FPGA and etc. Figure 3 shows external circuit example. Recommended parts shown
below should be connected as close as possible to the device.
CLKO
TEST0 TEST1
OUT0
外部信号ソース
2.5V
47Ω
AIN0+
3V
CA
=680pF
2.5V
FPGA
or
ASIC
OUT1
DVDD
0.1uF
AIN0VSS5
47Ω
3V
REFI0
SEL
CLKI
外部信号ソース
2.5V
5V
47Ω
AIN1+
AVDD
5V
CA
=680pF
2.5V
0.1uF
AVDD
AIN1-
0.1uF
47Ω
5V
REFI1
AVDD
REFO
VSS2
0.1uF
VSS1
0.1uF
5V
VSS4
VSS3
AVDD
0.1uF
Figure 3. AK9223 Recommended External Circuits
AD conversion characteristics (speed and accuracy) are dependent on OSR (over sampling ratio) and
digital filter type. When the conversion rate is low, greater output accuracy can be achieved by increasing
the OSR. When the OSR is low, output accuracy is low but high speed conversion is available. With an
appropriate digital filter, the AK9223 is capable of AD conversion results that have a dynamic range
exceeding 86dB with an OSR = 256.
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■ Internal Operation
The analog input of the AK9223 is composed by SC (switched-capacitor) circuits and this modulator block
digitizes analog inputs to 1-bit data stream. The clock source can be external or internal oscillator output.
Analog input is sampled by the modulator and compared with the reference voltage of the REFI pin. A
digital stream that represents the analog input voltage over time appears at the output of the
corresponding converter.
■ Modulator
The AK9223 can be operated in two modes. Internal oscillation is used for the operation clock of the
modulator by setting the SEL pin = “H”. In this case, the internal clock is fixed to 20MHz. When the SEL
pin is set to “L”, modulator clock is externally input to the CLKI pin. In both of modes, the clock is internally
divided by two and functions as the modulator clock. When using an external clock, available input clock
range is from 1MHz to 24MHz. In this case, the modulator operates of a clock from 500kHz to 12MHz.
■ Digital I/F
Analog input signals are converted with the modulator input clock. The OUT pin outputs the result of AD
conversion. The common clock that is used for two modulators is output from the CLKO pin. When the
SEL pin = “H”, the CLKI pin must not be allowed to float but should be connected to DVDD or VSS5.
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■ Digital Filter
Digital data stream is output form the modulator. This data stream should be processed by a digital filter to
obtain an equivalent digital data to the analog input. Transfer function of the simple Sinc3 filter is shown
below.
1 − 𝑧 −𝑂𝑆𝑅
H(z) = (
)
1 − 𝑧 −1
3
This filter provides the best output performance with a relatively low number of gates required for
implementation. All the characterizations in this datasheet are done using a Sinc3 filter (OSR = 256,
Output Word Width: 16 bits).
Figure 4 and Figure 5 show the filter characteristics. The location of the first notch is fDATA (=fMOD /
OSR). The -3dB point is located at half the Nyquist frequency or fDATA/4.
Figure 4. Sinc3 Frequency Characteristics (OSR=32)
Figure 5. Sinc3 Frequency Characteristics (OSR=256)
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[AK9223]
System Design
■ Power Supply
Digital power supply determines the I/O interface voltage. It ranges from 2.7V to 5.5V. Inputs to the
AK9223, such as AIN+, AIN- and CLKI pins should not be present before the power supply is on.
■ Decoupling
A decoupling capacitor should be connected to the pin as close as possible. A 0.1μF ceramic capacitor
should be connected between AVDD (Pin #1) and VSS1, AVDD (Pin #12) and VSS2, AVDD (Pin #13)
and VSS3, AVDD (Pin #24) and VSS4, and DVDD and VSS5.
If the analog and digital I/O powers are drawn from the same source, connect a 10Ω resistor between the
analog and digital power supply pins, and connect the power source to the analog power supply pin. An
RC filter should be composed by this 10Ω resister and a 0.1μF capacitor to reduce noises in the analog
supply.
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[AK9223]
Package
■ Outline Dimensions
24-pin TSSOP (Unit: mm)
7.80.1
13
6.40.15
A
4.40.1
24
12
1
0.65
0.250.05
0.15±0.05
Detail A
0.60.1
1.10 MAX
0.10
0.10±0.05
0.90.05
0-8
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■ Marking
AK9223MK
AAYWWB
a. Pin #1 Indication
b. Product Name: AK9223MK
c. Date Code: AAYWWB
AA :
Y :
WW :
B :
014010283-E-01
Administration Code 2digits
Year 1digit
Week 2digits
Administration Code 1digit
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[AK9223]
Ordering Guide
■ Ordering Guide
AK9223MK
40  +105C
24-pin TSSOP (0.65mm pitch)
Revision History
Date (Y/M/D)
15/01/15
Revision
01
014010283-E-01
Reason
Page
First Edition
Contents
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[AK9223]
IMPORTANT NOTICE
0. Asahi Kasei Microdevices Corporation (“AKM”) reserves the right to make changes to the
information contained in this document without notice. When you consider any use or application
of AKM product stipulated in this document (“Product”), please make inquiries the sales office of
AKM or authorized distributors as to current status of the Products.
1. All information included in this document are provided only to illustrate the operation and
application examples of AKM Products. AKM neither makes warranties or representations with
respect to the accuracy or completeness of the information contained in this document nor
grants any license to any intellectual property rights or any other rights of AKM or any third party
with respect to the information in this document. You are fully responsible for use of such
information contained in this document in your product design or applications. AKM ASSUMES
NO LIABILITY FOR ANY LOSSES INCURRED BY YOU OR THIRD PARTIES ARISING FROM
THE USE OF SUCH INFORMATION IN YOUR PRODUCT DESIGN OR APPLICATIONS.
2. The Product is neither intended nor warranted for use in equipment or systems that require
extraordinarily high levels of quality and/or reliability and/or a malfunction or failure of which may
cause loss of human life, bodily injury, serious property damage or serious public impact,
including but not limited to, equipment used in nuclear facilities, equipment used in the
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equipment used in finance-related fields. Do not use Product for the above use unless
specifically agreed by AKM in writing.
3. Though AKM works continually to improve the Product’s quality and reliability, you are
responsible for complying with safety standards and for providing adequate designs and
safeguards for your hardware, software and systems which minimize risk and avoid situations in
which a malfunction or failure of the Product could cause loss of human life, bodily injury or
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4. Do not use or otherwise make available the Product or related technology or any information
contained in this document for any military purposes, including without limitation, for the design,
development, use, stockpiling or manufacturing of nuclear, chemical, or biological weapons or
missile technology products (mass destruction weapons). When exporting the Products or
related technology or any information contained in this document, you should comply with the
applicable export control laws and regulations and follow the procedures required by such laws
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5. Please contact AKM sales representative for details as to environmental matters such as the
RoHS compatibility of the Product. Please use the Product in compliance with all applicable laws
and regulations that regulate the inclusion or use of controlled substances, including without
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a result of noncompliance with applicable laws and regulations.
6. Resale of the Product with provisions different from the statement and/or technical features set
forth in this document shall immediately void any warranty granted by AKM for the Product and
shall not create or extend in any manner whatsoever, any liability of AKM.
7. This document may not be reproduced or duplicated, in any form, in whole or in part, without
prior written consent of AKM.
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