AK8135C

AK8135C
Low Power
Multiclock Generator with VCFO
AK8135C
Features
Description
AK8135C is a member of AKM’s low power multi
clock generator family designed for Recorders,
DTVs or STBs, requiring a range of system clocks
with high performance. AK8135C generates
different frequency clocks from a 24.576MHz
crystal oscillator and provides them to seven
outputs. The on-chip VCFO (Voltage Controlled
Frequency Oscillator) accepts a voltage control
input to allow the output clocks to vary by ±96 ppm
for synchronizing to the external clock system.
Both circuitries of VCFO and PLL in AK8135C are
derived from AKM’s long-term-experienced clock
device technology, and enable clock output to
perform low jitter and to operate with very low
current consumption.
AK8135C is available in a 30-pin VSOP package.
24.576MHz Crystal Input
One 24.576MHz-Reference Output
Selectable Clock out Frequencies:
- 24.576 MHz at CLK1
- 24.99972 MHz at CLK2
- 33.332965 MHz at CLK3
- 74.1758, 74.250 MHz at CLK4
- 36.864 MHz at CLK5
- 27.000 MHz at REF1-3
Built-in VCFO
- Pull Range: ±96ppm (typ.)
Low Jitter Performance
- Period Jitter:
150 psec (Typ.) at CLK2-3, REF1-3
200 psec (Typ.) at CLK4-5
300 psec (Typ.) at CLK1
- Long term jitter：
400 psec (Typ.) at CLK1-5, REF1-3
Low Current Consumption:
26 mA (Typ.) at 3.3V
Low C/N output:
72 dB (Typ.) at REF1-3
Supply Voltage:
3.0 – 3.6V
Operating Temperature Range:
-20 to +85℃
Package:
30-pin VSOP (Lead free)
Applications
•
•
•
MS1254-E-00
HDD, DVD, BD Recorder
DTV
Set-Top-Boxes
Nov-10
-1-
AK8135C
Block Diagram
VDD1-7
CLK1
XI
Crystal
OSC
XO
VCFO
ADC
VIN
1/8
CLK2
1/6
CLK3
PLL1
REF1
Fractional
PLL
REF2
REF0PD
REF3
REF1PD
PLL2
VDD
CLK4
REF0PD
VDD
REF0PD
REF1PD
HDSEL
PLL3
VDD
CLK5
HDSEL
REF1PD
TEST1
VREF
TEST2
GND1-7
Figure 1: AK8135C Multi Clock Generator
Nov-10
MS1254-E-00
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AK8135C
Pin Descriptions
1:XI
30:GND1
2:TEST1
29:VDD1
3:XO
28:VIN
4:TEST2
27:REF1PD
5:CLK1
26:HDSEL
6:REF0PD
25:VDD2
7:CLK2
24:GND2
8:VDD4
23:VDD3
9:GND4
22:GND3
10:CLK3
21:REF1
11:GND5
20:REF2
12:VDD5
19:REF3
13:CLK5
18:VDD7
14:GND6
17:GND7
15:VDD6
16:CLK4
Figure 2: Package: 30-Pin VSOP(Top View)
MS1254-E-00
Nov-10
-3-
AK8135C
Pin No.
Pin Name
Pin Type
Description
1
XI
AI
Crystal connection, Connect to 24.576MHz crystal
2
TEST1
DI
TEST input pin, Connect to GND.
3
XO
AO
Crystal connection, Connect to 24.576MHz crystal
4
TEST2
DI
TEST input pin, Connect to GND.
5
CLK1
DO
Reference Clock Output of XO based on 24.576MHz Crystal
CLK4 and REF2 pins Mode Select pin, PLL2 Power Down pin
6
REF0PD
DI
“H”: Enable, CLK4 and REF2 pins output Clock and PLL2 is Normal Operation.
(1)
“L”: Disable, CLK4 and REF2 pins are “L” and PLL2 is powered down.
7
CLK2
DO
8
VDD4
PWR
Power Supply 4
9
GND4
PWR
Ground 4
10
CLK3
DO
11
GND5
PWR
Ground 5
12
VDD5
PWR
Power Supply 5
13
CLK5
DO
14
GND6
PWR
Ground 6
15
VDD6
PWR
Power Supply 6
Clock output 2, Output frequency is 25.000MHz.
Clock output 3, Output frequency is 33.333MHz.
When REF1PD pin = “H”, Clock output 5, Output frequency is 36.864MHz.
When REF1PD pin = “L”, CLK5 pin outputs “L”.
When REF0PD pin = “H” and HDSEL pin = “L”, CLK4 pin outputs 74.1758MHz.
16
CLK4
DO
When REF0PD pin = “H” and HDSEL pin = “H”, CLK4 pin outputs 74.250MHz.
When REF0PD pin = “L”, CLK4 pin outputs “L”.
17
GND7
PWR
Ground 7
18
VDD7
PWR
Power Supply 7
19
REF3
DO
When REF1PD pin = “H”, Reference Clock Output 3 from VCFO, Output frequency
is 27.000MHz.
When REF1PD pin = “L”, REF3 pin outputs “L”.
When REF0PD pin = “H”, Reference Clock Output 2 from VCFO, Output frequency
REF2
20
DO
is 27.000MHz.
When REF0PD pin = “L”, REF2 pin outputs “L”.
21
REF1
DO
22
GND3
PWR
Ground 3
23
VDD3
PWR
Power Supply 3
24
GND2
PWR
Ground 2
25
VDD2
PWR
Power Supply 2
26
HDSEL
DI
Reference Clock Output 1 from VCFO, Output frequency is 27.000MHz.
(1)
Mode Select pin for Output Frequency of CLK4 pin
CLK5 and REF3 pins Mode Select pin, PLL3 Power Down pin
27
REF1PD
DI
“H”: Enable, CLK5 and REF3 pins output Clock and PLL3 is Normal Operation.
“L”: Disable, CLK5 and REF3 pins are “L” and PLL3 is powered down.
28
VIN
AI
29
VDD1
PWR
Power Supply 1
30
GND1
PWR
Ground 1
VCFO Control Voltage Input
(1) Internal pull up 57kΩ
Nov-10
MS1254-E-00
-4-
(1)
AK8135C
Ordering Information
Part Number
Marking
Shipping Packaging
Package
Temperature Range
AK8135C
AK8135C
Tape and Reel
30-pin VSOP
-20 to 85℃
MS1254-E-00
Nov-10
-5-
AK8135C
Absolute Maximum Rating
Over operating free-air temperature range unless otherwise noted (1)
Items
Symbol
Ratings
Unit
Supply voltage
VDD
-0.3 to 4.6
V
Input voltage
VIN
VSS-0.3 to VDD+0.3
V
Input current (any pins except supplies)
IIN
±10
mA
Tstg
-55 to 130
°C
Storage temperature
Note
(1) Stress beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device.
These are stress ratings only. Functional operation of the device at these or any other conditions beyond those
indicated under “Recommended Operating Conditions” is not implied. Exposure to absolute-maximum-rating
conditions for extended periods may affect device reliability. Electrical parameters are guaranteed only over the
recommended operating temperature range.
ESD Sensitive Device
This device is manufactured on a CMOS process, therefore, generically susceptible to
damage by excessive static voltage. Failure to observe proper handling and
installation procedures can cause damage. AKM recommends that this device is handled with
appropriate precautions.
Recommended Operation Conditions
Parameter
Operating temperature
(1)
Supply voltage
Output Load Capacitance
Symbol
Conditions
Ta
Min
Typ
-20
3.0
3.3
Max
Unit
85
°C
3.6
V
VDD
Pin: VDD1-7
Cpl1
Pin: CLK1,2,4, REF2,3
15
pF
Cpl2
Pin: CLK3,5, REF1
25
pF
Note:
(1) Power to VDD1-7 requires to be supplied from a single source. A decoupling capacitor for power supply line
should be installed close to each VDD pin.
Nov-10
MS1254-E-00
-6-
AK8135C
DC Characteristics
VDD: over 3.0 to 3.6V, Ta: -20 to +85℃, 24.576MHz Crystal, unless otherwise noted
Parameter
Symbol
Conditions
Pin: REF0PD, REF1PD,
HDSEL, TEST1,2
High Level Input Voltage
VIH
Low Level Input Voltage
VIL
Pin: REF0PD, REF1PD,
HDSEL, TEST1,2
Input Leak Current 1
IL1
Pin: TEST1,2
Input Leak Current 2
IL2
Pin: REF0PD, REF1PD,
HDSEL
MIN
TYP
MAX
0.7VDD
Unit
V
0.3VDD
V
-1
+1
μA
-1
+1
μA
-25
μA
+3
μA
VIH=VDD
Input Leak Current 3
IL3
Pin: REF0PD, REF1PD,
HDSEL
-97
-58
VIL=GND
Input Leak Current 4
IL4
High Level Output
Voltage
VOH
Low level Output
Voltage
VOL
Current Consumption 1
IDD1
Current Consumption 2
IDD2
Current Consumption 3
IDD3
Current Consumption 4
IDD4
Pin: VIN
-3
Pin: CLK1-5, REF1-3
IOH=-4mA
0.8VDD
V
Pin: CLK1-5, REF1-3
0.2VDD
V
26
35
mA
19
26
mA
21
28
mA
14
19
mA
IOL=+4mA
No load
REF0PD=’H’, REF1PD=’H’
No load
REF0PD=’L’, REF1PD=’H’
No load
REF0PD=’H’, REF1PD=’L’
No load
REF0PD=’L’, REF1PD=’L’
MS1254-E-00
Nov-10
-7-
AK8135C
AC Characteristics
VDD: over 3.0 to 3.6V, Ta: -20 to +85℃, 24.576MHz Crystal, unless otherwise noted
Parameter
Crystal Clock Frequency
Symbol
(1)
Output Clock Accuracy (1)
Fosc
Faccuracy
VCFO Pullable Range
PRVCFO
VCXO Response Time
RTVCXO
C/N
CN
Output Clock Rise Time 1
T_rise1
Output Clock Fall Time 1
T_fall1
Output Clock Rise Time 2
T_rise2
Output Clock Fall Time 2
T_fall2
Period Jitter (2)
Long Term Jitter
Jit_period
(2)
Output Clock Duty Cycle
Jit_long
DtyCyc
Conditions
MIN
Pin:XI,XO
Pin:CLK1 24.576MHz
Crystal CL=8[pF]
Pin:CLK2 24.99972MHz
Relative to 25.000MHz
Crystal CL=8[pF]
Pin:CLK3 33.332965MHz
Relative to 33.333MHz
Crystal CL=8[pF]
Pin:REF1-3 27.000MHz
VIN=0.5VDD
Crystal CL=8[pF]
Pin:REF1-3
VIN=0.5VDD±1.0
Pin:REF1-3
VIN=0.5VDD±1.0
Pin:REF1
with Load Cpl2=25pF
Pin:REF2,3
with Load Cpl2=15pF
Pin:CLK1,2,4 REF2,3
with Load Cpl1=15pF
0.2VDD → 0.8VDD
Pin:CLK1,2,4 REF2,3
with Load Cpl1=15pF
0.8VDD → 0.2VDD
Pin:CLK3,5, REF1
with Load Cpl2=25pF
0.2VDD → 0.8VDD
Pin:CLK3,5, REF1
with Load Cpl2=25pF
0.8VDD → 0.2VDD
Pin:CLK1
with Load Cpl1=15pF
Pin:CLK2, REF2,3
with Load Cpl1=15pF
Pin:CLK3, REF1
with Load Cpl1=25pF
Pin:CLK4
with Load Cpl1=15pF
Pin:CLK5
with Load Cpl2=25pF
Pin:CLK1,2,4, REF2,3
with Load Cpl1=15pF
1000 cycle delay
Pin:CLK3,5, REF1
with Load Cpl2=25pF
1000 cycle delay
Pin:CLK1
with Load Cpl1=15pF
Pin:CLK2,4, REF2,3
with Load Cpl2=15pF
Pin: CLK3,5, REF1
with Load Cpl1=25pF
Nov-10
TYP
MAX
24.576
Unit
MHz
-30
0
+30
ppm
-41
-11
+19
ppm
-41
-11
+19
ppm
-30
0
+30
ppm
±75
±96
±111
ppm
5
40
ppm/100ms
72
dB
72
dB
1.5
4.0
ns
1.5
4.0
ns
2.5
4.0
ns
2.5
4.0
ns
300
(6σ)
150
(6σ)
150
(6σ)
200
(6σ)
200
(6σ)
500
(6σ)
300
(6σ)
300
(6σ)
400
(6σ)
400
(6σ)
400
(6σ)
600
(6σ)
ps
400
(6σ)
600
(6σ)
ps
40
50
60
%
45
50
55
%
45
50
55
%
ps
ps
ps
ps
ps
MS1254-E-00
-8-
AK8135C
Parameter
Power-up Time
(3)
Output Lock Time (4)
Symbol
T_put
T_lock
Conditions
Pin:CLK1,2,4, REF2,3
with Load Cpl1=15pF
Pin:CLK3,5, REF1
with Load Cpl2=25pF
Pin:CLK4
MIN
TYP
MAX
Unit
1
2
ms
1
2
ms
60
μs
(1) Output Clock Accuracy depends on crystal characteristics, on-chip load capacitance, and stray capacity of
PCB. MIN., Max.=±30ppm is applied to AKM’s authorized test condition.
Please contact us when you plan the use of other crystal unit.
(2) ±3σ in 10000 sampling or more
(3) Time to settle output into ±0.1% of specified frequency from the point that the power supply reaches VDD.
(4) Time to settle output into ±20ppm of specified frequency from the point that the HDSEL is switched.
MS1254-E-00
Nov-10
-9-
AK8135C
Definition of Jitter
1. Period Jitter (AC Characteristics)
1/2VDD
CLK
PJ =
tcyclen -
1 / f0
: where f0 is the nominal output frequency and tcycle n is any cycle
within the sample measured on controlled edges
2. Long Term Jitter (AC Characteristics）
LTJ
Vref
CLK
1000 cycles
1000Cycles after oscilloscope trigger.
Nov-10
MS1254-E-00
- 10 -
AK8135C
Function Description
Voltage Controlled Frequency Oscillator (VCFO)
AK8135C has a voltage controlled frequency oscillator (VCFO), featuring fine frequency tuning for 27MHz
of primary clock frequency by external DC voltage control. This tuning enables output clock frequency to
synchronize the external clock system.
VCFO is composed of analog-to-digital converter and high resolution PLL as shown in Figure 3. VIN
(Pin28) accepts DC voltage control from a processor or a system controller, and pulls the primary
frequency of crystal to higher or lower. This pulling range is determined by supply Voltage to AK8135C.
AK8135C is designed to range ±96ppm of primary frequency, and the typical pulling profile is shown in
Figure 4.
External
LPF
AK8135C
PWM
VIN
High-resolution
ADC＋FLT
REF1-3
PLL
VCFO
REF1-3 Frequency [ppm]
Figure 3: VCFO Diagram
+96ppm
0ppm
(27.0MHz)
-96ppm
0.5
1/2VDD-1.0
1/2VDD
1/2VDD+1.0
VDD-0.5
VIN Input Voltage [V]
Figure 4: Typical VCFO Pulling Profile
MS1254-E-00
Nov-10
- 11 -
AK8135C
Typical Connection Diagram
VDD=3.3[V]
+
C8
AK8135C
GND
X’tal = 24.576[MHz]
Cext2
CLK1 = 24.576[MHz]
SW1
CLK2 = 24.99972[MHz]
C4
CLK3 = 33.332965[MHz]
C5
CLK5 = 36.864[MHz]
C6
1:XI
30:GND1
2:TEST1
29:VDD1
3:XO
28:VIN
4:TEST2
27:REF1PD
5:CLK1
26:HDSEL
6:REF0PD
25:VDD2
7:CLK2
24:GND2
8:VDD4
23:VDD3
9:GND4
22:GND3
10:CLK3
21:REF1
11:GND5
20:REF2
12:VDD5
19:REF3
13:CLK5
18:VDD7
14:GND6
17:GND7
15:VDD6
16:CLK4
C1
CLPF1
CLPF2
PWM1
RLPF
SW2
SW3
C2
C3
REF1 = 27.000[MHz]
REF2 = 27.000[MHz]
REF3 = 27.000[MHz]
C7
CLK4 = 74.250[MHz]
GND
Figure 5: Typical Connection Diagram
C1, C2, C3, C4, C5, C6, C7: 0.1μF
C8 : Electrolytic capacitor
Cext1, Cext2: Depends on crystal characteristics. Refer the specification of the crystal.
SW1, SW2, SW3: These are switches that control outputs of CLK4, CLK5, REF2 and REF3 and
power up/down of PLL2 and PLL3.
RLPF, CLPF1, CLPF2: In case of interface by PWM. For right configuration, refer the specification of the
applied processor.
Nov-10
MS1254-E-00
- 12 -
AK8135C
PCB Layout Consideration
AK8135C is a high-accuracy and low-jitter multi clock generator. For proper performances specified in
this datasheet, careful PCB layout should be taken. The followings are layout guidelines based on the
typical connection diagram shown in Figure 5
Power supply line – AK8135C has seven power supply pins (VDD1-7) which deliver power to internal
circuitry segments. A 0.1μF decoupling capacitor should be placed as close to each VDD pin as possible.
Ground pin connection – AK8135C has seven ground pins (GND1-7). These pin require connecting to
plane ground which will eliminate any common impedance with other critical switching signal return.
0.1μF decoupling capacitors placed at VDD1, VDD2, VDD3, VDD4, VDD5, VDD6, and VDD7 should be
grounded at close to the GND1pin, the GND2 pin, the GND3 pin, the GND4 pin, the GND5 pin, the GND6
pin, and the GND7 respectively.
Crystal connection – Proper oscillation performance is susceptible to stray or parasitic capacitors around
crystal. The wiring traces to a crystal form XI (Pin 1) and XO (Pin 3) have equal lengths with no via and
as short in length as possible. These traces should be also located away from any traces with switching
signal.
MS1254-E-00
Nov-10
- 13 -
AK8135C
Package Information
• Marking
a: #1 Pin Index
b: Part number
c: Date code (5 digits)
30
16
b
AK8135C
xxxxx
c
a
15
1
Nov-10
MS1254-E-00
- 14 -
AK8135C
• RoHS Compliance
All integrated circuits form Asahi Kasei Microdevices Corporation (AKM)
assembled in “lead-free” packages* are fully compliant with RoHS.
(*) RoHS compliant products from AKM are identified with “Pb free” letter indication on
product label posted on the anti-shield bag and boxes.
IMPORTANT NOTICE
z These products and their specifications are subject to change without notice.
When you consider any use or application of these products, please make inquiries the sales
office of Asahi Kasei Microdevices Corporation (AKM) or authorized distributors as to current
status of the products.
z Descriptions of external circuits, application circuits, software and other related information
contained in this document are provided only to illustrate the operation and application
examples of the semiconductor products. You are fully responsible for the incorporation of
these external circuits, application circuits, software and other related information in the design
of your equipments. AKM assumes no responsibility for any losses incurred by you or third
parties arising from the use of these information herein. AKM assumes no liability for
infringement of any patent, intellectual property, or other rights in the application or use of
such information contained herein.
z Any export of these products, or devices or systems containing them, may require an export
license or other official approval under the law and regulations of the country of export
pertaining to customs and tariffs, currency exchange, or strategic materials.
z AKM products are neither intended nor authorized for use as critical componentsNote1) in any
safety, life support, or other hazard related device or systemNote2), and AKM assumes no
responsibility for such use, except for the use approved with the express written consent by
Representative Director of AKM. As used here:
Note1) A critical component is one whose failure to function or perform may reasonably be expected to result,
whether directly or indirectly, in the loss of the safety or effectiveness of the device or system containing it,
and which must therefore meet very high standards of performance and reliability.
Note2) A hazard related device or system is one designed or intended for life support or maintenance of
safety or for applications in medicine, aerospace, nuclear energy, or other fields, in which its failure to
function or perform may reasonably be expected to result in loss of life or in significant injury or damage to
person or property.
z It is the responsibility of the buyer or distributor of AKM products, who distributes, disposes of,
or otherwise places the product with a third party, to notify such third party in advance of the
above content and conditions, and the buyer or distributor agrees to assume any and all
responsibility and liability for and hold AKM harmless from any and all claims arising from the
use of said product in the absence of such notification.
MS1254-E-00
Nov-10
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