Mar 2002 Delta Sigma Breakthrough: LTC1966 True RMS-to-DC Converter Uses No Diodes, Heaters or Logarithms

LINEAR TECHNOLOGY
MARCH 2002
IN THIS ISSUE…
COVER ARTICLE
∆Σ Breakthrough: LTC1966 True
RMS-to-DC Converter Uses No Diodes,
Heaters or Logarithms .................. 1
Joseph Petrofsky and Glen Brisebois
Issue Highlights ............................ 2
LTC® in the News ........................... 2
DESIGN FEATURES
Unique Instrumentation Amplifier
Precisely Senses Differential Voltages
from µV to V .................................. 7
David Hutchinson and Nello Sevastopoulos
High Efficiency DDR Termination
Power Supplies Source and Sink
More than 10 Amps ....................... 9
Wei Chen
A High Performance, Single-Ended, No
RSENSE™ Controller for Negative
Output Supplies .......................... 13
Tick Houk
Rail-to-Rail Output Dual Comparator
Resolves 150MHz Signals While
Shifting from Analog to Digital
Voltage Levels ............................. 17
John D. Morris and Glen Brisebois
It Just Got Easier to Convert LithiumIon Battery Voltage to 3.3V with this
Efficient Single Inductor Synchronous
Buck-Boost Regulator .................. 21
Mark Jordan
VOLUME XII NUMBER 1
∆Σ Breakthrough: LTC1966
True RMS-to-DC Converter
Uses No Diodes, Heaters
or Logarithms
by Joseph Petrofsky and Glen Brisebois
Introduction
The LTC®1966 is a precision, micropower, true RMS-to-DC converter that
utilizes an innovative patent-pending
∆Σ computational technique. The internal delta-sigma circuitry of the
LTC1966 makes it simpler to use,
more accurate, lower power and
dramatically more flexible than conventional log-antilog RMS-to-DC
converters. Unlike previously available RMS-to-DC converters, the
superior linearity of the LTC1966 allows hassle-free system calibration
at any input voltage.
The LTC1966 performance is summarized in Table 1. Unlike older
log-antilog devices, the LTC1966 is
insensitive to PC board soldering and
stresses, as well as operating temperature. The LTC1966 is packaged
in the space-saving MSOP package,
which is ideal for portable applications. Additionally, the LTC1966 has
an output impedance an order of
magnitude higher than previous generation devices, so the averaging
capacitor required is ten times smaller
for the same design parameters, typically just 1µF. This is not trivial,
because VOUT is a calculation node
and cannot simply be decoupled by
adding resistance.
The flexibility of the LTC1966 is
illustrated in the typical applications
shown in Figures 1 and 2. The
LTC1966 accepts single ended or differential input signals (for EMI/RFI
rejection) and supports crest factors
up to 4. Common mode input range is
rail-to-rail while the differential input
range is 1VPEAK. The LTC1966 also
has a rail-to-rail output with a sepacontinued on page 3
DESIGN IDEAS
.............................................. 24–37
2.7V TO 5.5V
(complete list on page 24)
VDD
New Device Cameos ..................... 38
Design Tools ................................ 39
Sales Offices ............................... 40
DIFFERENTIAL
INPUT
0.1µF
OPT. AC
COUPLING
IN1
OUTPUT
LTC1966
IN2
OUT RTN
EN
CAVE
1µF
+ VOUT
–
1966 TA01
VSS GND
Figure 1. Single supply RMS-to-DC converter
, LTC, LT, Burst Mode, OPTI-LOOP and Over-The-Top are registered trademarks of Linear Technology Corporation.
Adaptive Power, C-Load, DirectSense, FilterCAD, Hot Swap, LinearView, Micropower SwitcherCAD, Multimode
Dimming, No Latency ∆Σ, No RSENSE, Operational Filter, PolyPhase, PowerSOT, SoftSpan, SwitcherCAD, ThinSOT and
UltraFast are trademarks of Linear Technology Corporation. Other product names may be trademarks of the companies
that manufacture the products.
DESIGN FEATURES
LTC1966, continued from page 1
Table 1: Typical performance specifications
Parameter
Conditions
Value
Gain Accuracy
50Hz to 1kHz
0.1%
Total Error
50Hz to 1kHz
0.25%
Linearity
0.02%
Supply Current
155µA Typ, 170µA Max
Shutdown Current
0.1µA
Bandwidth
Independent of Input Voltage
800kHz – 3dB, 6kHz±1%
Single Supply
2.7V–5.5V
Dual Supply
±5V
Supply Range
late the RMS value of an input signal.
The fundamental building block is an
analog multiply/divide used as shown
in Figure 3. Analysis of this topology
is easy and starts by identifying the
inputs and the output of the lowpass
filter. The input to the LPF is the
calculation from the multiplier/divider: (VIN)2/VOUT. The lowpass filter
will take the average of this to create
the output, mathematically:
 ( V )2 
IN
VOUT = 
,
 VOUT 


(VIN )2
rate output reference pin providing
flexible level shifting. The LTC1966
operates on a single power supply
from 2.7V to 5.5V or dual supplies up
to ±5.5V. When the LTC1966 is shutdown, supply current is reduced to
just 0.1µA.
Because VOUT is DC,
VOUT
× ÷
VIN
LPF
2
 ( V )2   ( VIN ) 
IN
, so
=

 VOUT 
V
OUT


VOUT
1966 F03
Figure 3. RMS-to-DC converter with implicit
computation
waveform will generate the same heat
VOUT
of the Mean of the Square:”
( VOUT )2 = ( VIN )2, or
How an RMS-to-DC Converter in a resistive load as will 1V DC.
Works
Mathematically, RMS is the “Root
RMS amplitude is the consistent, fair
and standard way to measure and
compare dynamic signals of all shapes
and sizes. Simply stated, the RMS
amplitude is the heating potential of
a dynamic waveform. A 1VRMS AC
2.7V/3V CMOS
OFF
ON
VOUT =
VRMS = V2
Monolithic RMS-to-DC converters
use an implicit computation to calcu-
5V
VDD
EN VDD
LTC1966
IN1
VOUT
CAVE
1µF
IN2 OUT RTN
CC
0.1µF
( VIN )2 = RMS( VIN )
Note that this technique results in
higher error at zero output signal
because of the divide by zero.
2.7V
AC INPUT
(1VPEAK)
 ( V )2 
 IN 
, and
=
VOUT
DC + AC
INPUTS
(1VPEAK
DIFFERENTIAL)
DC OUTPUT
GND
VSS
LTC1966
IN1
VOUT
CAVE
1µF
IN2 OUT RTN
DC OUTPUT
VSS GND EN
1966 TA03
1966 TA04
–5V
Figure 2b. ±5V supplies, differential,
DC-coupled inputs RMS-to-DC converter
Figure 2a. 2.7V single supply, single ended,
AC-coupled input RMS-to-DC converter with
shutdown
AC INPUT
(1VPEAK)
0.1µF
X7R
2.5V
≥2V
OFF ON
–2.5V
≤–2V
CC
0.1µF
9V
EN VDD
DC + AC
INPUT
(1VPEAK)
IN1
LTC1966
IN1
VOUT
CAVE
1µF
IN2 OUT RTN
VSS
GND
DC OUTPUT
LT1175CS8-5
SHDN
GND
VIN
–2.5V
VDD
LTC1966
–2.5V
1966 TA06
Figure 2c. ±2.5V supplies, single ended,
DC-coupled input RMS-to-DC converter
Linear Technology Magazine • March 2002
0.1µF
X7R
VOUT
IN2 OUT RTN
CAVE
1µF
DC OUTPUT
VSS GND EN
OUT
SENSE
1966 TA07
Figure 2d. Battery-powered RMS-to-DC
converter with single-ended AC-coupled input
3
DESIGN FEATURES
Dα
VIN
VOUT
∆-Σ
REF
VIN
±1
LPF
VOUT
VIN 2
VOUT
Figure 4. Topology of the LTC1966
Move Over Log-Antilog
Old RMS-to-DC converters used logantilog techniques to perform the
square and square-root analog mathematical functions. RMS-to-DC
converters that use these techniques
suffer from poor linearity, amplitudedependent bandwidth and settling
time, gain that drifts with temperature and other problems.
Figure 5 compares the linearity of
the LTC1966 with that of the now
obsolete log-antilog methods.
How the LTC1966 RMS-to-DC
Converter Works
LINEARITY ERROR (VOUT mV DC – VIN mV ACRMS)
The LTC1966 uses a similar topology
but with a completely new implementation (see Figure 4). A ∆Σ modulator
acts as the divider, and a simple polarity switch is used as the multiplier.
The ∆Σ is a 2nd order modulator
with excellent linearity. It has a singlebit output whose average duty cycle
is proportional to the ratio of the
input signal divided by the output.
The single-bit output is used to selectively buffer or invert the input signal.
Again, this is a circuit with excellent
linearity, because it operates at only
two gains: –1 and +1. The average
effective multiplication over time will
be on the straight line between these
two points.
Applying VOUT to the ∆Σ reference
voltage results in the VIN2/VOUT function before the lowpass filter, and
causes the RMS-to-DC conversion as
was the case in Figure 3.
The lowpass filter performs the averaging of the RMS function and must
be a lower corner frequency than the
lowest frequency of interest. The
LTC1966 needs only one capacitor on
the output to implement the lowpass
filter. The user selects this capacitor
depending on frequency range and
settling time requirements, and given
the 85kΩ output impedance.
This topology is inherently more
stable and linear than log/antilog
implementations primarily because
all of the signal processing occurs in
circuits with high gain op amps operating closed loop. Note that the
internal scalings are such that the ∆Σ
output duty cycle is limited to 0% or
100% only when V IN exceeds
±4␣ •␣ V OUT.
Linearity of an RMS-to-DC
Converter
0.2
LTC1966, ∆Σ
0
–0.2
–0.4
–0.6
Linearity may seem like an odd property for a device that implements a
function that includes two very nonlinear processes: squaring and square
rooting.
However, an RMS-to-DC converter
has a transfer function, RMS volts in
to DC volts out, that should ideally
have a 1:1 characteristic. To the extent that the input to output transfer
function is not a perfectly straight
line, the part is nonlinear, and a source
of error. Again, see Figure 4.
A more complete look at linearity
uses the simple model shown in Figure 6. Here an ideal RMS core is
corrupted by both input circuitry and
output circuitry that have imperfect
transfer functions.
Any nonlinearity that occurs in the
output circuitry will corrupt the RMS
in to DC out transfer function. A
nonlinearity in the input circuitry will
typically corrupt that transfer function far less simply because with an
AC input, the RMS-to-DC conversion
will average the nonlinearity from a
whole range of input values together.
But the input nonlinearity will still
cause problems in an RMS-to-DC converter because it will corrupt the
accuracy as the input signal shape
changes. Although an RMS-to-DC
converter will convert any input waveform to a DC output, the accuracy is
not necessarily as good for all waveforms as it is with sine waves. A
common way to quantify dynamic
signal wave shapes is Crest Factor.
The crest factor is the ratio of the peak
value relative to the RMS value of a
waveform. A signal with a crest factor
of 4, for instance, has a peak that is
four times its RMS value. Because
this peak has energy (proportional to
voltage squared) that is 16 times (42)
the energy of the RMS value, the peak
is necessarily present for at most
6.25% (1/16) of the time.
The LTC1966 performs very well
with crest factors of 4 or less, as
shown in Figure 7. This excellent
performance with crest factors less
than 4 is directly attributable to the
high linearity throughout the
CONVENTIONAL
LOG/ANTILOG
–0.8
60Hz SINEWAVES
–1.0
0
50 100 150 200 250 300 350 400 450 500
1966 TA01b
VIN (mV ACRMS)
Figure 5. Linearity
4
INPUT
INPUT CIRCUITRY
INPUT NONLINEARITY
IDEAL
RMS-TO-DC
CONVERTER
OUTPUT CIRCUITRY
OUTPUT NONLINEARITY
OUTPUT
1966 F05
Figure 6. Linearity model of an RMS-to-DC converter
Linear Technology Magazine • March 2002
DESIGN FEATURES
230
220
200.6
20Hz
60Hz
200.4
100Hz
200.2
200.0
199.8
1.0
1.5
2.0
2.5 3.0 3.5 4.0
CREST FACTOR
4.5
5.0
202
FUNDAMENTAL
FREQUENCY
200
60Hz
20Hz
OUTPUT DC VOLTAGE (mV)
200mVRMS SCR WAVEFORMS
CAVE = 10µF
200.8 VDD = 5V
O.1%/DIV
OUTPUT VOLTAGE (mV DC)
OUTPUT VOLTAGE (mV DC)
201.0
210
200
250Hz
100Hz
190
180
170 200mV
RMS SCR WAVEFORMS
C
= 4.7µF
160 VAVE= 5V
DD
5%/DIV
150
6
2
3
5
4
1
1966 G15
7
8
1966 G12
CREST FACTOR
198
196
194
192
190
188
186
184 1%/DIV
CAVE = 2.2µF
182
1
10
100
INPUT FREQUENCY (kHz)
1000
1966 G20
Figure 7. Performance vs crest factor
Figure 8. Performance vs large crest factors
Figure 9. Input signal bandwidth
LTC1966. As shown in Figure 8, the
LTC1966 will respond, but with reduced accuracy, to signals with higher
crest factors. A crest factor greater
than 4 is by definition a waveform
with peaks less than 6.25% of the
time.
in the Design Cookbook section of the
LTC1966 datasheet, available at
www.linear.com.
input frequencies much less than the
sampling frequency, but such noise
peaks when input frequency reaches
half the sampling frequency. Fortunately the LTC1966 output averaging
filter greatly reduces this error, but
the RMS-to-DC topology frequency
shifts the noise to low (baseband)
frequencies. So with input frequencies above 5kHz to 10kHz, the output
will slowly wander around plus or
minus a percent or so, as shown in
Figure 9.
Designing with the LTC1966
The LTC1966 RMS-to-DC converter
makes it easy to implement a rather
quirky function. For many applications all that will be needed is a single
capacitor for averaging, appropriate
selection of the I/O connections, and
power supply bypassing.
The RMS or root-mean-squared
value of a signal, the root of the mean
of the square, cannot be computed
without some averaging to obtain the
mean function. The LTC1966 converter utilizes a single capacitor on
the output to do the low frequency
averaging required for RMS-to-DC
conversion. A larger capacitor will
allow RMS averaging of lower frequency inputs, but will result in a
longer settling time. The LTC1966
has a consistent settling time, dependent only on the averaging time
constant and not on the input signal
amplitude (unlike log-antilog RMS-to
-DC approaches). The trade-offs between low frequency accuracy and
settling time are thoroughly described
Conversion Bandwidth
As with any finite-bandwidth system,
the LTC1966 will have increased errors with higher input frequencies.
The LTC1966 is designed for high
accuracy RMS-to-DC conversion of
signals into and above the audible
frequency range. The input sampling
amplifiers have a –3dB frequency of
800kHz. However, the switched capacitor circuitry samples the inputs
at a modest 100kHz. The output response versus frequency is shown in
Figure 9.
Although there is a pattern to the
response versus frequency that repeats every sample frequency, the
errors are not overwhelming. This is
because LTC1966 RMS calculation is
inherently wideband, operating properly with minimal oversampling, or
even undersampling, using several
proprietary techniques to exploit the
fact that the RMS value of an aliased
signal is the same as the RMS value of
the original signal. However, a fundamental feature of the ∆Σ modulator is
that sample estimation noise is shaped
such that minimal noise occurs with
LTC1966
LTC1966
OUTPUT
OUT RTN
7106 TYPE
5
31
6
CAVE
1µF 30
IN HI
OUTPUT
OUT RTN
LTC2420
5
6
3
CAVE
1µF
4
VIN
SDO
GND SCK
CS
IN LO
Figure 10. Interfacing to DVM/DPM ADC
Linear Technology Magazine • March 2002
1966 F22b
SERIAL
DATA
DIGITALLY
CORRECT
LOADING
ERRORS
Interfacing with an ADC for a
DVM
The LTC1966 output impedance and
the low frequency RMS averaging
ripple need to be considered when
using an analog-to-digital converter
(ADC) to digitize the LTC1966 RMS
result.
The simplest configuration is to
connect the LTC1966 directly to the
input of a type 7106/7136 ADC as
shown in Figure 10. These devices are
designed specifically for DVM/DPM
use and include display drivers for a
31⁄2 digit LCD segmented display. Using a dual-slope conversion, the input
is sampled over a long integration
window, which results in rejection of
line frequency ripple when integration time is an integer number of line
cycles. Finally, these parts have an
input impedance in the GΩ range,
with specified input leakage of 10pA
to 20pA. Such a leakage, combined
with the LTC1966 output impedance,
results in just 1µV to 2µV of additional output offset voltage.
Figure 11. Interfacing to LTC2420
5
DESIGN FEATURES
Another type of ADC that has inherent rejection of RMS averaging
ripple is an oversampling ∆Σ ADC
such as the LTC2420. Its input impedance is 6.5MΩ, but only when it is
sampling. Since this occurs only half
the time at most, if it directly loads
the LTC1966, a gain error of –0.54%
to –0.73% results. In fact, the LTC2420
DC input current is not zero at 0V,
but rather at one half its reference, so
both an output offset and a gain error
will result. These errors will vary from
part to part, but with a specific
LTC1966 and LTC2420 combination,
the errors will be fixed, varying less
than ±0.05% over temperature. So a
system that has digital calibration
can be quite accurate despite the
nominal gain and offset errors. With
20 bits of resolution, this part is more
accurate than the LTC1966, but the
extra resolution is helpful because it
reduces nonlinearity at the LSB transitions as a digital gain correction is
made. Furthermore, its small size
and ease of use make it attractive.
This connection is shown in Figure␣ 11, where the LTC2420 is set to
continuously convert by grounding
the CS pin. The gain error will be less
if CS is driven at a slower rate. Nevertheless, the rate should either be
consistent or at a rate low enough
that the LTC1966 and its output capacitor have fully settled by the
beginning of each conversion, so that
the loading errors are consistent.
consumer -ready, wide-dynamicrange audio. Typical modern movie
material varies between explosions
and whispers so frequently that the
at-home audience is required to turn
up the volume in order to hear the
whispers, and during explosion sequences, turn down the volume in
order to keep the kids in bed and
maintain friendly relations with the
neighbors. Figure 13 shows an audio
frequency band compressor, which
automatically amplifies the whispers
and attenuates the explosions. The
circuit uses the LTC1966 for the amplitude measurement, and applies
feedback to adjust the effective gain
of the LT1256 fader.
Resistors R2 through R4 and capacitors C1 and C2 form a simple
34Hz to 3.4kHz bandpass filter, with
R1 merely providing a bleed path.
Resistors R3 through R7 set the
LT1256 amplifier paths A1 and A2 in
gains of 1/4 and 4, respectively. The
2.7V TO 5.5V
R1
1M
T1
IN1 VDD
R3
2k
LTC1966
VOUT
DC
C1 OUTPUT
1µF
IN2 OUT RTN
R2
1M
VSS GND EN
T1: GEOSPACE CORP GEOPHONE
1966 TA03
GS20DX-630Ω-10Hz (713) 939-7093
Figure 12. Single supply, micropower
rumble/vibration meter
coefficient, and a frequency response
of 10Hz to greater than 500 Hz. R3 is
optional, providing low frequency
damping. The LTC1966 performs an
RMS-to-DC conversion on the vibration energy information and converts
it into a simple more easily monitored
DC output.
Audio Compressor
The last 30 years or so has seen a
dramatic rise in the availability of
continued on page 16
R5
5.9k
ATTENUATE
BY 1/4
2
C2
0.47µF
R2
1k
VIN
R1
100k
V+
LT1256
R3
7.5k
9
–
A1
1
+
R15
47Ω
R4
2.49k
C1
47nF
7
14
Applications
+
A2
GAIN OF 4
13
V–
–
Single Supply Rumble Meter
Vibration and rumble in heavy industrial applications can give warning
signs of impending equipment failure.
Judicious monitoring of equipment
vibration can indicate preventative
maintenance is needed for worn or
wearing parts, such as roller bearings, before catastrophe hits. Figure
12 shows how the LTC1966 simplifies this task. R1 and R2 bias up the
LTC1966 inputs at mid supply, adding less than 3µA to the total supply
current. Vibration energy at the geophone generates an AC voltage with
approximately a 0.88V/inch/sec
6
VOUT
V+
VC
RC
3
5
RFS
10
VFS
R13
3.3k
12
ATTENUATION CONTROL
C3
0.1µF
R9
10k
R8
15k
R6
2k
R7
5.9k
V+
V+
C5
0.022µF
R11
169k
–
LT1636
+
V–
R14
3.3k
R10
38.3k
C6
0.22µF
C4
0.22µF
VDD
R12
10k
LTC1966
VOUT
IN1
OUT RTN
IN2
VSS GND EN
VS = ±5V
V–
Figure 13. Audio amplitude range compressor
Linear Technology Magazine • March 2002
DESIGN FEATURES
technology, but this design cannot
because it places significant voltage
stress on the drain of the power MOSFET (with leakage spikes and high
frequency ringing, the maximum voltage on the drain of the MOSFET can
exceed 40V, and the absolute maximum rating for the SENSE pin on the
LTC3704 is 36V). As a result, this
design uses a 100V BVDSS device,
along with a conventional 12mΩ sense
resistor in the MOSFET source. The
power losses incurred by this sense
resistor are relatively small in this
system (approximately 1%), due to
the high input voltage.
A sense resistor can also improve
performance in systems where the
ability to control the maximum output current takes precedence over
increasing overall efficiency. The initial tolerance of a discrete sense
resistor is typically better than ±5%,
whereas the initial tolerance of the
RDS(ON) of a power MOSFET is typically ±20 to ±30%. In addition, the
temperature coefficient of the discrete resistor can easily be an order of
magnitude lower than for a power
MOSFET (whose RDS(ON) increases approximately 50% from 25°C to 125°C).
Undervoltage conditions at the input supply are detected at the RUN
pin via the resistor divider formed by
R1 and R2. In this case if the battery
pack discharges to below 5.0V, the
converter shuts down. The rising
input startup threshold is approximately 5.4V. The optional capacitor
CR could be used to give the converter
some ride-through capability for brief
input undervoltage conditions.
Conclusion
The LTC3704 is a versatile control IC
optimized for negative voltage supplies, but useful in a wide variety of
single-ended DC/DC converter topologies. It is a flexible, high performance
converter in a small, convenient MS10
package. It improves efficiency, reduces the size and weight of power
supplies, and saves total component
and manufacturing expense. Its range
of applications extends from singlecell, lithium-ion powered systems to
high voltage, high power telecommunications equipment.
LTC1966, continued from page 6
attenuation (R3 through R7), and the
LT1256 full scale control voltage setting (R13 and R14). The upper limit
on achievable compression is dictated
by the desired quality of the time
domain response of the control loop,
with excessive overshoot on the attack time causing periods of excessive
attenuation—creating a puffy sound
to the human ear.
INPUT
2V/DIV
ATTENUATION
CONTROL, VC
1V/DIV
OUTPUT
2V/DIV
50ms/DIV
Figure 14. Response of compressor to a 16fold amplitude step. Small signal is amplified
and large signal is attenuated.
LTC1966 measures the output and
adjusts the VC pin of the LT1256,
through the LT1636 configured as a
low pass filter, favoring the lower gain
A1 path as output amplitude rises. It
is this attenuating characteristic with
rising output amplitude that achieves
the compression effect.
As shown, the circuit provides 13dB
of compression, squeezing a 5mV to
1V RMS input range into a 20mV to
0.85V RMS output range. Figure 14
shows results with a 16-fold step in
input amplitude of a 100Hz sinusoid,
demonstrating approximately 50ms
of attack time. Note the presence of
gain on the small signal, and the
attenuation of the large signal. More
extreme compression over different
input and output ranges can be
achieved by adjusting the op amp
gain (R8 and R9), the fader gain and
Summary
The LTC1966 is a breakthrough in
RMS-to-DC conversion—bringing a
new level of accuracy to RMS measurements. It is extremely simple to
connect, and provides excellent accuracy over temperature and time
without requiring trims. These features, along with its small size and
micropower operation make the
LTC1966 suitable for a wide range of
RMS-to-DC applications, including
handheld measurement devices.
for
the latest information
on LTC products,
visit
www.linear-tech.com
16
Linear Technology Magazine • March 2002