DG9421, DG9422 www.vishay.com Vishay Siliconix Precision Low-Voltage, Low-Glitch CMOS Analog Switches DESCRIPTION FEATURES Using BiCMOS wafer fabrication technology allows the DG9421, DG9422 to operate on single and dual supplies. • 2.7 V thru 12 V single supply or ± 2.7 V thru ± 6 V dual supply Available • Low on-resistance - RDS(on): 2 Ω at 12 V • Fast switching - tON: 22 ns Available - tOFF: 28 ns • TTL and low voltage logic • Low leakage: 10 pA (typ.) • > 2000 V ESD protection • Material categorization: for definitions of compliance please see www.vishay.com/doc?99912 Designed for optimal performance at single 5 V and dual ± 5 V, the DG9421, DG9422 combine low and flat on-resistance (3 Ω), fast speed (tON = 38 ns) and is well suited for applications where signal switching accuracy, low noise and low distortion is critical. The DG9421 and DG9422 respond to opposite control logic as shown in the Truth Table. Note * This datasheet provides information about parts that are RoHS-compliant and / or parts that are non-RoHS-compliant. For example, parts with lead (Pb) terminations are not RoHS-compliant. Please see the information / tables in this datasheet for details. BENEFITS • • • • • • High accuracy High speed, low glitch Single and dual supply capability Low RON in small TSOP package Low leakage Low power consumption APPLICATIONS • • • • • • Automatic test equipment Data acquisition XDSL and DSLAM PBX systems Reed relay replacement Audio and video signal routing FUNCTIONAL BLOCK DIAGRAM AND PIN CONFIGURATION TSOP-6 V+ 1 6 IN COM 2 5 NC 3 4 GND V- Top View TRUTH TABLE LOGIC DG9421 DG9422 0 ON OFF 1 OFF ON Notes • Logic “0” ≤ 0.8 V • Logic “1” ≥ 2.4 V • Switches shown for logic “0” input Device Marking: DG9421DV = 4Exxx TSOP-6 V+ 1 6 IN COM 2 5 NO V- 3 4 GND ORDERING INFORMATION TEMP. RANGE -40 °C to +85 °C Top View Device Marking: PACKAGE 6 / Pin TSOP PART NUMBER DG9421DV-T1 DG9421DV-T1-E3 DG9422DV-T1 DG9422DV-T1-E3 DG9422DV = 4Fxxx S14-2339-Rev. H, 08-Dec-14 Document Number: 70679 1 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 DG9421, DG9422 www.vishay.com Vishay Siliconix ABSOLUTE MAXIMUM RATINGS PARAMETER LIMIT V+ to V- UNIT -0.3 to +13 GND to V- V 7 -0.3 to (V+ + 0.3) or 50 mA, whichever occurs first VIN a, VS, VD Continuous Current (any terminal) 50 Peak Current, S or D (pulsed at 1 ms, 10 % duty cycle) 100 Storage Temperature Power Dissipation (Packages) b V/mA mA -65 to +150 °C 570 mW 6-Pin TSOP c Notes a. Signals on SX, DX, or INX exceeding V+ or V- will be clamped by internal diodes. Limit forward diode current to maximum current ratings. b. All leads welded or soldered to PC board. c. Derate 7 mW/°C above 25 °C. SPECIFICATIONS a PARAMETER (Single Supply 12 V) SYMBOL TEST CONDITIONS UNLESS OTHERWISE SPECIFIED V+ = 12 V, V- = 0 V, VIN = 2.4 V, 0.8 V f LIMITS -40 °C to +85°C TEMP. b MIN. d UNIT TYP. c MAX. d Analog Switch Analog Signal Range a Drain-Source On-Resistance Switch Off Leakage Current VANALOG RDS(on) V+ = 10.8 V, V- = 0 V, IS = 5 mA, VD = 2 V/9 V IS(off) VD = 1/11 V, VS = 11 V/1 V ID(off) Channel-On Leakage Current Full 0 - 12 Room - 2 3 Full - 2 3.4 Room -1 - 1 Full -10 - 10 Room -1 - 1 Full -10 - 10 Room -1 - 1 Full -10 - 10 V Ω nA ID(on) VS = VD = 11 V/1 V Input Current, VIN Low IIL VIN under test = 0.8 V Full -1 0.02 1 Input Current, VIN High IIH VIN under test = 2.4 V Full -1 0.02 1 Room - 20 45 RL = 300 Ω, CL = 35 pF, VS = 5 V see figure 2 Full - - 49 Room - 25 47 Full - - 59 Q Vg = 0 V, Rg = 0 Ω, CL = 1 nF Room - 43 - pC Off-Isolation e OIRR RL = 50 Ω, CL = 5 pF, f = 1 MHz Room - -60 - dB Source Off Capacitance e CS(off) Room - 31 - Drain Off Capacitance e CD(off) Room - 30 - Channel On Capacitance e CD(on) Room - 71 - Room - 0.020 1 5 Digital Control μA Dynamic Characteristics Turn-On Time e tON e tOFF Turn-Off Time Charge Injection e f = 1 MHz ns pF Power Supplies Positive Supply Current Negative Supply Current Ground Current S14-2339-Rev. H, 08-Dec-14 I+ IIGND VIN = 0 V or 12 V Full - - Room -1 -0.002 - Full -5 - - Room -1 -0.002 - Full -5 - - μA Document Number: 70679 2 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 DG9421, DG9422 www.vishay.com SPECIFICATIONS a PARAMETER Vishay Siliconix (Dual Supply ± 5 V) SYMBOL TEST CONDITIONS UNLESS OTHERWISE SPECIFIED V+ = 5 V, V- = -5 V, VIN = 2.4 V, 0.8 V f LIMITS -40 °C to +85 °C TEMP. b MIN. d TYP. c UNIT MAX. d Analog Switch Analog Signal Range e VANALOG Drain-Source On-Resistance RDS(on) IS(off) Switch Off Leakage Current g ID(off) Channel-On Leakage Current g ID(on) V+ = 5 V, V- = 5 V IS = 5 mA, VD = ± 3.5 V V+ = 5.5 V, V- = 5.5 V − 4.5 V VD = ± 4.5 V, VS = + Full -5 - 5 Room - 2.2 3.2 Full - - 3.6 Room -1 - 1 Full -10 - 10 Room -1 - 1 Full -10 - 10 V+ = 5.5 V, V- = -5.5 V VS = VD = ± 4.5 V Room -1 - 1 Full -10 - 10 V Ω nA Digital Control Input Current, VIN Low e IIL VIN under test = 0.8 V Full -1 0.02 1 Input Current, VIN High e IIH VIN under test = 2.4 V Full -1 0.02 1 Room μA Dynamic Characteristics - 38 63 RL = 300 Ω, CL = 35 pF, VS = ± 3.5 V see figure 2 Full - - 68 Room - 45 83 Full - - 97 Q Vg = 0 V, Rg = 0 Ω, CL = 1 nF Room - 207 - pC Off-Isolation e OIRR RL = 50 Ω, CL = 5 pF, f = 1 MHz Room - -57 - dB Source Off Capacitance e CS(off) Room - 32 - Room - 31 - Room - 71 - Room - 0.030 1 Full - - 5 Room -1 -0.002 - Full -5 - - Room -1 -0.002 - Full -5 - - Turn-On Time tON Turn-Off Time tOFF Charge Injection e Drain Off Capacitance e Channel On Capacitance CD(off) e f = 1 MHz CD(on) ns pF Power Supplies Positive Supply Current e Negative Supply Current e Ground Current e S14-2339-Rev. H, 08-Dec-14 I+ IIGND VIN = 0 V or 5 V μA Document Number: 70679 3 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 DG9421, DG9422 www.vishay.com SPECIFICATIONS a PARAMETER Vishay Siliconix (Single Supply 5 V) SYMBOL TEST CONDITIONS UNLESS OTHERWISE SPECIFIED V+ = 5 V, V- = 0 V, VIN = 2.4 V, 0.8 V f LIMITS -40 °C to +85 °C TEMP. b MIN. d TYP. c UNIT MAX. d Analog Switch Analog Signal Range e Drain-Source On-Resistance VANALOG RDS(on) Full 0 - 5 Room - 3.6 6 Full - - 6.6 Room - 43 67 RL = 300 Ω, CL = 35 pF, VS = 3.5 V, see figure 2 Hot - - 74 Room - 30 67 Hot - - 80 Vg = 0 V, Rg = 0 Ω, CL = 1 nF Room - 25 - Room - 0.020 1 Hot - - 5 Room -1 -0.002 - Hot -5 - - Room -1 -0.002 - Hot -5 - - V+ = 4.5 V, IS = 5 mA, VD = 1 V, 3.5 V V Ω Dynamic Characteristics Turn-On Time e Turn-Off Time e Charge Injection e tON tOFF Q ns pC Power Supplies Positive Supply Current e Negative Supply Current e Ground Current e S14-2339-Rev. H, 08-Dec-14 I+ IIGND VIN = 0 V or 5 V μA Document Number: 70679 4 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 DG9421, DG9422 www.vishay.com SPECIFICATIONS a PARAMETER Vishay Siliconix (Single Supply 3 V) SYMBOL TEST CONDITIONS UNLESS OTHERWISE SPECIFIED V+ = 3 V, V- = 0 V, VIN = 0.4 V f LIMITS -40 °C to +85 °C TEMP. b MIN. d TYP. c UNIT MAX. d Analog Switch Analog Signal Range e Drain-Source On-Resistance Switch Off Leakage Current g VANALOG RDS(on) IS(off) ID(off) Channel-On Leakage Current g ID(on) V+ = 2.7 V, V- = 0 V IS = 5 mA, VD = 0.5 V, 2.2 V V+ = 3.3 V, V- = 0 V VS = 1, 2 V, VD = 2 V, 1 V Full 0 - 3 Room - 7.3 8.8 Full - - 10.1 Room -1 - 1 Full -10 - 10 Room -1 - 1 Full -10 - 10 V+ = 3.3 V, V- = 0 V VD = VS = 1 V, 2 V Room -1 - 1 Full -10 - 10 V Ω nA Digital Control Input Current, VIN Low e IIL VIN under test = 0.4 V Full -1 0.02 1 Input Current, VIN High e IIH VIN under test = 2.4 V Full -1 0.02 1 μA Dynamic Characteristics Turn-On Time tON Turn-Off Time tOFF Room 90 110 RL = 300 Ω, CL = 35 pF, VS = 1.5 V see figure 2 Room Q Vg = 0 V, Rg = 0 Ω, CL = 1 nF Room 31 pC Off-Isolation e OIRR RL = 50 Ω, CL = 5 pF, f = 1 MHz Room -60 dB Source Off Capacitance e CS(off) Room 35 Drain Off Capacitance e CD(off) Room 34 Channel On Capacitance e CD(on) Room 77 Charge Injection e Full 125 32 Full f = 1 MHz 84 ns 99 pF Notes a. Refer to PROCESS OPTION FLOWCHART. b. Room = 25 °C, Full = as determined by the operating temperature suffix. c. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing. d. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet. e. Guaranteed by design, not subject to production test. f. VIN = input voltage to perform proper function. g. Leakage parameters are guaranteed by worst case test conditions and not subject to test. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. S14-2339-Rev. H, 08-Dec-14 Document Number: 70679 5 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 DG9421, DG9422 www.vishay.com Vishay Siliconix TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted) 10 10 IS = 5 mA V+ = 3.0 V 8 R ON - On-Resistance (Ω) R ON - On-Resistance (Ω) T = 25 °C IS = 5 mA V+ = 3.0 V 6 V+ = 5.0 V 4 V+ = 10.8 V 8 A B 6 A C B 4 C 2 2 A = 85 °C B = 25 °C C = - 40 °C V+ = 12 V 0 0 0 2 4 6 8 10 0 12 RON vs. VCOM and Supply Voltage RON vs. Analog Voltage and Temperature 1000 8 V± = ± 5 V IS = 5 mA V+ = ± 5 V VIN = 0 V I+ - Supply Current (pA) RON - On-Resistance (Ω) 5 4 2 3 VCOM - Analog Voltage (V) 1 VCOM - Analog Voltage (V) 6 4 A 100 B 2 A = 85 °C B = 25 °C C = - 40 °C C 0 -5 -3 -1 1 3 10 - 60 5 - 40 - 20 0 20 40 60 80 Drain Voltage (V) Temperature (°C) RON vs. Analog Voltage and Temperature Supply Current vs. Temperature 10 m 100 100 V+ = 5 V V- = 0 V Leakage Current (pA) 1m I+ - Supply Current (A) V+ = 5.0 V 100 µ 10 µ 1µ 10 I(on) I(off) 100 n 10 n 1 10 100 1K 10K 100K 1M 10M - 60 - 40 - 20 0 20 40 60 80 Input Switching Frequences (Hz) Temperature (°C) Supply Current vs. Input Switching Frequency Leakage Current vs. Temperature S14-2339-Rev. H, 08-Dec-14 100 Document Number: 70679 6 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 DG9421, DG9422 www.vishay.com Vishay Siliconix TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted) 100 100 V+ = 5 V V- = 0 V V+ = ± 5 V Leakage Current (pA) Leakage Current (pA) 60 10 I(on) 1 I(off) INO(off)/INC(off) 20 ICOM(off) - 20 ICOM(on) - 60 0.1 - 60 - 100 - 40 - 20 0 20 40 60 80 0 100 1 Leakage Current vs. Temperature 3 4 5 Leakage vs. Analog Voltage 400 120 t ON , t OFF - Switching Time (ns) V+ = 12 V V- = 0 V 300 Leakage Current (pA) 2 VCOM, V NO, V NC - Analog Voltage (V) Temperature (°C) 200 100 ICOM(on) 0 - 100 INO(off)/INC(off) - 200 - 300 100 tON V+ = 3 V 80 60 tON V+ = 5 V tOFF V+ = 5 V 40 20 ICOM(off) 2 tOFF V+ = 12 V tON V+ = 12 V 0 - 60 - 400 0 tOFF V+ = 3 V 4 6 8 10 12 - 40 VCOM, V NO, V NC - Analog Voltage (V) - 20 0 20 40 60 80 100 Temperature (°C) Leakage vs. Analog Voltage Switching Time vs. Temperature and Supply Voltage (DG9421) 2.5 10 Loss 0 V T - Switching Threshold (V) V+ = 3 V RL = 50 - 10 Loss, OIRR (dB) - 20 - 30 - 40 OIRR - 50 - 60 - 70 2.0 1.5 1.0 0.5 - 80 - 90 100K 0.0 1M 10M Frequency (MHz) 100M Insertion Loss, Off Isolation vs. Frequency S14-2339-Rev. H, 08-Dec-14 1G 0 2 4 6 8 10 V+ - Supply Voltage (V) 12 14 Switching Threshold vs. Supply Voltage Document Number: 70679 7 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 DG9421, DG9422 www.vishay.com Vishay Siliconix TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted) 300 250 200 200 150 150 Q - Charge Injection (pC) Q - Charge Injection (pC) 300 V+ = 12 V 250 100 50 0 V+ = 5 V V+ = 3 V - 50 - 100 - 150 100 0 - 50 - 100 - 150 - 200 - 200 - 250 - 250 - 300 0 2 4 6 8 VCOM - Analog Voltage (V) 10 V=±5V 50 - 300 -6 12 -4 -2 0 2 4 6 VCOM - Analog Voltage (V) Charge Injection vs. Analog Voltage Charge Injection vs. Analog Voltage SCHEMATIC DIAGRAM (Typical Channel) V+ NC/NO VLevel Shift/ Drive VIN V+ GND COM V- Fig. 1 TEST CIRCUITS V+ Logic Input VS D tOFF VO Switch Input* IN GND RL 300 Ω V- VSwitch Input* CL (includes fixture and stray capacitance) RL RL + rDS(on) VS VO CL 35 pF Switch Output VO = V S tr < 5 ns tf < 5 ns 50 % 0V V+ S VNC/NO 90 % 0V tON VO - VS 90 % Note: * Logic input waveform is inverted for switches that have the opposite logic sense control Fig. 2 - Switching Time S14-2339-Rev. H, 08-Dec-14 Document Number: 70679 8 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 DG9421, DG9422 www.vishay.com Vishay Siliconix TEST CIRCUITS ΔV O V+ VO V+ Rg S INX D IN Vg OFF VO ON OFF CL 10 nF 3V V- GND INX V- OFF ON Q = ΔVO x CL OFF INX dependent on switch configuration Input polarity determined by sense of switch. Fig. 3 - Charge Injection V+ C V+ D1 S1 VS Rg = 50 Ω 50 Ω IN1 0 V, 2.4 V S2 D2 VO NC 0 V , 2.4 V RL IN2 GND XTALK Isolation = 20 log V- C VS VO V- C = RF bypass Fig. 4 - Crosstalk V+ V+ C C V+ S VS VO D V+ S Rg = 50 Ω 0 V, 2.4 V RL 50 Ω IN GND V- C Meter IN HP4192A Impedance Analyzer or Equivalent 0 V, 2.4 V D GND VOff Isolation = 20 log V- C VS VO V- C = RF Bypass Fig. 5 - Off Isolation Fig. 6 - ource/Drain Capacitances Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?70679. S14-2339-Rev. H, 08-Dec-14 Document Number: 70679 9 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Package Information Vishay Siliconix TSOP: 5/6−LEAD JEDEC Part Number: MO-193C e1 e1 5 4 6 E1 1 2 5 4 E E1 1 3 2 3 -B- e b E -B- e 0.15 M C B A 5-LEAD TSOP b 0.15 M C B A 6-LEAD TSOP 4x 1 -A- D 0.17 Ref c R R A2 A L2 Gauge Plane Seating Plane Seating Plane 0.08 C L A1 -C- (L1) 4x 1 MILLIMETERS Dim A A1 A2 b c D E E1 e e1 L L1 L2 R Min Nom Max Min Nom Max 0.91 - 1.10 0.036 - 0.043 0.01 - 0.10 0.0004 - 0.004 0.90 - 1.00 0.035 0.038 0.039 0.30 0.32 0.45 0.012 0.013 0.018 0.10 0.15 0.20 0.004 0.006 0.008 2.95 3.05 3.10 0.116 0.120 0.122 2.70 2.85 2.98 0.106 0.112 0.117 1.55 1.65 1.70 0.061 0.065 0.067 0.95 BSC 0.0374 BSC 1.80 1.90 2.00 0.071 0.075 0.079 0.32 - 0.50 0.012 - 0.020 0.60 Ref 0.024 Ref 0.25 BSC 0.010 BSC 0.10 - - 0.004 - - 0 4 8 0 4 8 7 Nom 1 ECN: C-06593-Rev. I, 18-Dec-06 DWG: 5540 Document Number: 71200 18-Dec-06 INCHES 7 Nom www.vishay.com 1 AN823 Vishay Siliconix Mounting LITTLE FOOTR TSOP-6 Power MOSFETs Surface mounted power MOSFET packaging has been based on integrated circuit and small signal packages. Those packages have been modified to provide the improvements in heat transfer required by power MOSFETs. Leadframe materials and design, molding compounds, and die attach materials have been changed. What has remained the same is the footprint of the packages. The basis of the pad design for surface mounted power MOSFET is the basic footprint for the package. For the TSOP-6 package outline drawing see http://www.vishay.com/doc?71200 and see http://www.vishay.com/doc?72610 for the minimum pad footprint. In converting the footprint to the pad set for a power MOSFET, you must remember that not only do you want to make electrical connection to the package, but you must made thermal connection and provide a means to draw heat from the package, and move it away from the package. In the case of the TSOP-6 package, the electrical connections are very simple. Pins 1, 2, 5, and 6 are the drain of the MOSFET and are connected together. For a small signal device or integrated circuit, typical connections would be made with traces that are 0.020 inches wide. Since the drain pins serve the additional function of providing the thermal connection to the package, this level of connection is inadequate. The total cross section of the copper may be adequate to carry the current required for the application, but it presents a large thermal impedance. Also, heat spreads in a circular fashion from the heat source. In this case the drain pins are the heat sources when looking at heat spread on the PC board. Since surface mounted packages are small, and reflow soldering is the most common form of soldering for surface mount components, “thermal” connections from the planar copper to the pads have not been used. Even if additional planar copper area is used, there should be no problems in the soldering process. The actual solder connections are defined by the solder mask openings. By combining the basic footprint with the copper plane on the drain pins, the solder mask generation occurs automatically. A final item to keep in mind is the width of the power traces. The absolute minimum power trace width must be determined by the amount of current it has to carry. For thermal reasons, this minimum width should be at least 0.020 inches. The use of wide traces connected to the drain plane provides a low impedance path for heat to move away from the device. REFLOW SOLDERING Vishay Siliconix surface-mount packages meet solder reflow reliability requirements. Devices are subjected to solder reflow as a test preconditioning and are then reliability-tested using temperature cycle, bias humidity, HAST, or pressure pot. The solder reflow temperature profile used, and the temperatures and time duration, are shown in Figures 2 and 3. Figure 1 shows the copper spreading recommended footprint for the TSOP-6 package. This pattern shows the starting point for utilizing the board area available for the heat spreading copper. To create this pattern, a plane of copper overlays the basic pattern on pins 1,2,5, and 6. The copper plane connects the drain pins electrically, but more importantly provides planar copper to draw heat from the drain leads and start the process of spreading the heat so it can be dissipated into the ambient air. Notice that the planar copper is shaped like a “T” to move heat away from the drain leads in all directions. This pattern uses all the available area underneath the body for this purpose. 0.167 4.25 0.074 1.875 0.014 0.35 0.122 3.1 0.026 0.65 0.049 1.25 0.049 1.25 0.010 0.25 FIGURE 1. Recommended Copper Spreading Footprint Document Number: 71743 27-Feb-04 Ramp-Up Rate +6_C/Second Maximum Temperature @ 155 " 15_C 120 Seconds Maximum Temperature Above 180_C 70 − 180 Seconds Maximum Temperature 240 +5/−0_C Time at Maximum Temperature 20 − 40 Seconds Ramp-Down Rate +6_C/Second Maximum FIGURE 2. Solder Reflow Temperature Profile www.vishay.com 1 AN823 Vishay Siliconix 10 s (max) 255 − 260_C 1X4_C/s (max) 3-6_C/s (max) 217_C 140 − 170_C 60 s (max) 60-120 s (min) Pre-Heating Zone 3_C/s (max) Reflow Zone Maximum peak temperature at 240_C is allowed. FIGURE 3. Solder Reflow Temperature and Time Durations THERMAL PERFORMANCE TABLE 1. Equivalent Steady State Performance—TSOP-6 Thermal Resistance Rqjf 30_C/W On-Resistance vs. Junction Temperature 1.6 VGS = 4.5 V ID = 6.1 A 1.4 rDS(on) − On-Resiistance (Normalized) A basic measure of a device’s thermal performance is the junction-to-case thermal resistance, Rqjc, or the junction-to-foot thermal resistance, Rqjf. This parameter is measured for the device mounted to an infinite heat sink and is therefore a characterization of the device only, in other words, independent of the properties of the object to which the device is mounted. Table 1 shows the thermal performance of the TSOP-6. 1.2 1.0 0.8 0.6 −50 SYSTEM AND ELECTRICAL IMPACT OF TSOP-6 −25 0 25 50 75 100 125 150 TJ − Junction Temperature (_C) FIGURE 4. Si3434DV In any design, one must take into account the change in MOSFET rDS(on) with temperature (Figure 4). www.vishay.com 2 Document Number: 71743 27-Feb-04 Application Note 826 Vishay Siliconix RECOMMENDED MINIMUM PADS FOR TSOP-6 0.099 0.039 0.020 0.019 (1.001) (0.508) (0.493) 0.064 (1.626) 0.028 (0.699) (3.023) 0.119 (2.510) Recommended Minimum Pads Dimensions in Inches/(mm) Return to Index APPLICATION NOTE Return to Index www.vishay.com 26 Document Number: 72610 Revision: 21-Jan-08 Legal Disclaimer Notice www.vishay.com Vishay Disclaimer ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE. Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively, “Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other disclosure relating to any product. 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We confirm that all the products identified as being compliant to Directive 2002/95/EC conform to Directive 2011/65/EU. Vishay Intertechnology, Inc. hereby certifies that all its products that are identified as Halogen-Free follow Halogen-Free requirements as per JEDEC JS709A standards. Please note that some Vishay documentation may still make reference to the IEC 61249-2-21 definition. We confirm that all the products identified as being compliant to IEC 61249-2-21 conform to JEDEC JS709A standards. Revision: 02-Oct-12 1 Document Number: 91000