DG2001 Datasheet

DG2001
Vishay Siliconix
Low-Voltage Single SPDT Analog Switch
DESCRIPTION
FEATURES
The DG2001 is a single-pole/double-throw monolithic CMOS
analog switch designed for high performance switching of
analog signals. Combining low power, high speed, low
on-resistance and small physical size, the DG2001 is ideal
for portable and battery powered applications requiring high
performance and efficient use of board space.
The DG2001 is built on Vishay Siliconix’s low voltage JI2
process. The DG2001 has a minimum 2000 V, ESD
protection, per Method 3015.7. An epitaxial layer prevents
latchup. Break-before-make is guaranteed.
The switch conducts equally well in both directions when on,
and blocks up to the power supply level when off.
• Halogen-free according to IEC 61249-2-21
Definition
• Low Voltage Operation (1.8 V to 5.5 V)
• Low On-Resistance - RON: 3 
• Fast Switching - tON: 20 ns, tOFF: 10 ns
• Low Leakage - ICOM: 0.2 nA
• Low Charge Injection - QINJ: 5 pC
• Low Power Consumption
• TTL/CMOS Compatible
• ESD Protection > 2000 V (Method 3015.7)
• TSOP-6 Package
• Compliant to RoHS Directive 2002/95/EC
BENEFITS
•
•
•
•
Reduced Power Consumption
Simple Logic Interface
High Accuracy
Reduce Board Space
APPLICATIONS
•
•
•
•
•
Cellular Phones
Communication Systems
Portable Test Equipment
Battery Operated Systems
Sample and Hold Circuits
FUNCTIONAL BLOCK DIAGRAM AND PIN CONFIGURATION
TSOP-6
IN
1
6
NO (Source1)
V+
2
5
COM
GND
3
4
NC (Source2)
Top View
TRUTH TABLE
Logic
NC
NO
0
ON
OFF
1
OFF
ON
ORDERING INFORMATION
Document Number: 71398
S11-1185–Rev. C, 13-Jun-11
Temp Range
Package
- 40 °C to 85 °C
TSOP-6
Part Number
DG2001DV-T1
DG2001DV-T1-E3
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DG2001
Vishay Siliconix
ABSOLUTE MAXIMUM RATINGS (TA = 25 °C, unless otherwise noted)
Parameter
Symbol
Limit
Referenced V+ to GND
Unit
- 0.3 to + 6
IN, COM, NC, NOa
Continuous Current (Any Terminal)
V
- 0.3 to (V+ + 0.3)
± 50
Peak Current (Pulsed at 1 ms, 10 % duty cycle)
ESD (MIL-STD-883B, Method 3015.7)
Storage Temperature (D Suffix)
Power Dissipation (Packages)b
mA
± 200
TSOP-6c
> 2000
V
- 65 to 125
°C
570
mW
Notes:
a. Signals on NC, NO, or COM or IN exceeding V+ will be clamped by internal diodes. Limit forward diode current to maximum current ratings.
b. All leads welded or soldered to PC Board.
c. Derate 7 mW/°C above 25 °C.
SPECIFICATIONS (V+ = 2 V)
Parameter
Symbol
Test Conditions
Unless Otherwise Specified
V+ = 2 V, ± 10 %
VIN = 0.4 V or 1.6 Ve
Limits
- 40 °C to 85 °C
Temp.a
Min.b
Full
0
Typ.c
Max.b
Unit
V+
V
Analog Switch
Analog Signal Ranged
VNO, VNC
VCOM
On-Resistance
RON
V+ = 1.8 V, VCOM = 1 V, INO, INC = 10 mA
Room
Full
15
17
RON Flatnessd
RON
Flatness
V+ = 1.8 V, VCOM = 0 V to V+, INO, INC = 10 mA
Room
5
Switch Off
Leakage Currentg
Channel-On
Leakage Currentg
INO(off)
INC(off)
ICOM(off)
ICOM(on)
V+ = 2.2 V
VNO, VNC = 0.5 V/1.5 V, VCOM = 1.5 V/0.5 V
V+ = 2.2 V, VNO, VNC = VCOM = 0.5 V/1.5 V
30
32

Room
Full
- 300
- 3.5
300
3.5
pA
nA
Room
Full
- 300
- 3.5
300
3.5
pA
nA
Room
Full
- 350
- 3.5
300
3.5
pA
nA
1.6
Digital Control
Input High Voltage
VINH
Full
Input Low Voltage
VINL
Full
Input Capacitance
Cin
IINL or IINH
Input Current
0.4
Full
VIN = 0 V or V+
Full
4
1
V
pF
1
µA
Dynamic Characteristics
Turn-On Time
tON
Turn-Off Time
tOFF
Break-Before-Make Time
Charge Injection
d
td
QINJ
Off-Isolationd
OIRR
Crosstalkd
XTALK
NO, NC Off Capacitanced
Channel-On Capacitanced
VNO or VNC = 1.5 V, RL = 300 , CL = 35 pF
CNO(off)
CNC(off)
Room
Full
30
50
53
Room
Full
15
30
33
ns
10
pC
Room
CL = 1 nF, VGEN = 0 V, RGEN = 0 
RL = 50 , CL = 5 pF, f = 1 MHz
VIN = 0 V or V+, f = 1 MHz
CON
1
15
Room
1
Room
- 71
Room
- 70
Room
17
Room
50
dB
pF
Power Supply
Power Supply Range
V+
Power Supply Current
I+
Power Consumption
PC
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2
1.8
VIN = 0 V or V+
0.01
2.20
V
1
µA
2.2
µW
Document Number: 71398
S11-1185–Rev. C, 13-Jun-11
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
DG2001
Vishay Siliconix
SPECIFICATIONS (V+ = 3 V)
Parameter
Symbol
Test Conditions
Unless Otherwise Specified
V+ = 3 V, ± 10 %
VIN = 0.4 V or 2 Ve
Limits
- 40 °C to 85 °C
Temp.a
Min.b
Full
0
Typ.c
Max.b
Unit
V+
V
Analog Switch
Analog Signal Ranged
VNO, VNC,
VCOM
On-Resistance
RON
V+ = 2.7 V, VCOM = 1.5 V, INO, INC = 10 mA
Room
Full
5
6
RON Flatnessd
RON
Flatness
V+ = 2.7 V, VCOM = 0 V to V+, INO, INC = 10 mA
Room
3
Switch Off
Leakage Currentg
Channel-On
Leakage Currentg
INO(off),
INC(off)
ICOM(off)
ICOM(on)
V+ = 3.3 V
VNO, VNC = 1 V/3 V, VCOM = 3 V/1 V
V+ = 3.3 V, VNO, VNC = VCOM = 1 V/3 V
9.2
10.2

Room
Full
- 400
- 4.5
400
4.5
pA
nA
Room
Full
- 400
- 4.5
400
4.5
pA
nA
Room
Full
- 450
- 4.5
400
4.5
pA
nA
2
Digital Control
Input High Voltage
VINH
Full
Input Low Voltage
VINL
Full
Input Capacitance
Cin
IINL or IINH
Input Current
0.4
Full
VIN = 0 V or V+
Full
4
1
V
pF
1
µA
Dynamic Characteristics
Turn-On Time
tON
Turn-Off Time
tOFF
Break-Before-Make Time
Charge Injection
Off-Isolation
d
d
Crosstalkd
NO, NC Off Capacitanced
Channel-On Capacitanced
VNO or VNC = 2 V, RL = 300 , CL = 35 pF
td
QINJ
OIRR
XTALK
CNO(off),
CNC(off)
Room
Full
24
45
48
Room
Full
12
30
33
ns
10
pC
Room
CL = 1 nF, VGEN = 0 V, RGEN = 0 
RL = 50 , CL = 5 pF, f = 1 MHz
VIN = 0 V or V+, f = 1 MHz
CON
1
13
Room
3
Room
- 71
Room
- 70
Room
17
Room
50
dB
pF
Power Supply
Power Supply Range
V+
Power Supply Current
I+
Power Consumption
PC
Document Number: 71398
S11-1185–Rev. C, 13-Jun-11
2.7
VIN = 0 V or V+
0.01
3.3
V
1
µA
3.3
µW
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DG2001
Vishay Siliconix
SPECIFICATIONS (V+ = 5 V)
Parameter
Symbol
Test Conditions
Unless Otherwise Specified
V+ = 5 V, ± 10 %
VIN = 0.8 V or 2.4 Ve
Limits
- 40 °C to 85 °C
Temp.a
Min.b
Full
0
Typ.c
Max.b
Unit
V+
V
Analog Switch
VNO, VNC
VCOM
Analog Signal Ranged
On-Resistance
RON
V+ = 4.5 V, VCOM = 3 V, INO, INC = 10 mA
Room
Full
3
4
RON Flatnessd
RON
Flatness
V+ = 4.5 V, VCOM = 0 V to V+, INO, INC = 10 mA
Room
2
INO(off)
INC(off)
Switch Off
Leakage Currentg
ICOM(off)
Channel-On
ICOM(on)
Leakage Currentg
V+ = 5.5 V
VNO, VNC = 1 V/4.5 V, VCOM = 4.5 V/1 V
V+ = 5.5 V, V+ = 5.5 V
VNO, VNC = VCOM = 1 V/4.5 V
7
8

Room
Full
- 900
- 5.5
900
5.5
pA
nA
Room
Full
- 900
- 5.5
900
5.5
pA
nA
Room
Full
- 1000
- 5.5
1000
5.5
pA
nA
2.4
Digital Control
Input High Voltage
VINH
Full
Input Low Voltage
VINL
Full
Cin
Input Capacitance
IINL or IINH
Input Current
0.8
Full
VIN = 0 V or V+
Full
4
1
V
pF
1
µA
Dynamic Characteristics
Turn-On Time
tON
Turn-Off Time
tOFF
td
Break-Before-Make Time
Charge Injection
d
QINJ
d
Off-Isolation
OIRR
Crosstalkd
XTALK
CNO(off)
CNC(off)
Source-Off Capacitanced
Channel-On Capacitance
VNO or VNC = 3 V, RL = 300 , CL = 35 pF
d
Room
Full
20
37
40
Room
Full
10
27
30
ns
10
pC
Room
CL = 1 nF, VGEN = 0 V, RGEN = 0 
RL = 50 , CL = 5 pF, f = 1 MHz
VIN = 0 V or V+, f = 1 MHz
CON
1
10
Room
7
Room
- 71
Room
- 70
Room
17
Room
50
dB
pF
Power Supply
Power Supply Range
V+
Power Supply Current
I+
Power Consumption
PC
4.5
VIN = 0 V or V+
0.01
5.5
V
1
µA
5.5
µW
Notes:
a. Room = 25 °C, Full = as determined by the operating suffix.
b. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.
c. Typical values are for design aid only, not guaranteed nor subject to production testing.
d. Guarantee by design, nor subjected to production test.
e. VIN = input voltage to perform proper function.
f. Guaranteed by 5 V leakage testing, not production tested.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
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Document Number: 71398
S11-1185–Rev. C, 13-Jun-11
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
DG2001
Vishay Siliconix
TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
13
9
11
6
R ON – On-Resistance ()
7
R ON – On-Resistance ()
V+ = 2 V
12
V+ = 2 V
8
V+ = 3 V
5
V+ = 5 V
4
3
2
10
9
8
85 °C
25 °C
- 40 °C
7
6
V+ = 5 V
5
1
4
0
3
25 °C
85 °C
- 40 °C
0
1
2
3
4
0
5
1
2
3
4
5
VCOM – Analog Voltage (V)
VCOM – Analog Voltage (V)
RON vs. VCOM and Supply Voltage
RON vs. Analog Voltage and Temperature
10
10 mA
1 mA
1
I+ – Supply Current (A)
I+ – Supply Current (nA)
V+ = 5 V
VIN = 0 V
0.1
0.01
0.001
- 60
100 µA
10 µA
1 µA
0.1 µA
- 40
- 20
0
20
40
Temperature (°C)
60
80
100
1
Supply Current vs. Temperature
100
1k
10 k 100 k
1M
Input Switching Frequency (Hz)
10 M
Supply Current vs. Input Switching Frequency
200
10 000
V+ = 5 V
V+ = 5.5 V
100
Leakage Current (pA)
1000
Leakage Current (pA)
10
ICOM(off)
100
ICOM(on)
ION(off)/INC(off)
10
0
- 100
ICOM(off)
- 200
ICOM(on)
- 300
ION(off)/INC(off)
- 400
1
- 60
- 500
- 40
- 20
0
20
40
Temperature (°C)
60
80
Leakage Current vs. Temperature
Document Number: 71398
S11-1185–Rev. C, 13-Jun-11
100
0
1
2
3
4
5
VCOM, V NO, V NC, – Analog Voltage (V)
Leakage vs. Analog Voltage
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THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
DG2001
Vishay Siliconix
TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
35
10
LOSS
- 10
LOSS, OIRR, XTLAK (dB)
tON, tOFF, – Switchint Time (ns)
0
tON V+ = 2 V
30
25
tON V+ = 3 V
20
tON V+ = 5 V
15
tOFF V+ = 2 V
tOFF V+ = 3 V
10
- 20
- 30
- 40
XTA LK
- 50
OIRR
- 60
- 70
5
tOFF V+ = 5 V
0
- 60
- 40
- 20
0
V+ = 3 V
RL = 50 
- 80
20
40
60
80
- 90
100 K
100
1M
10 M
Frequency (Hz)
Temperature (°C)
1G
Insertion Loss, Off -Isolation
Crosstalk vs. Frequency
Switching Time vs. Temperature
and Supply Voltage
40
1.6
1.4
30
Upper Threshold
Q – Charge Injection (pC)
VT – Switching Threshold (V)
100 M
1.2
1.0
Low Threshold
0.8
0.6
0.4
20
V+ = 5 V
10
V+ = 3 V
0
V+ = 2 V
- 10
- 20
- 30
0.2
- 40
0.0
0
1
2
3
4
5
V+ – Supply Voltage (V)
6
Switching Threshold vs. Supply Voltage
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6
7
0
1
2
3
4
5
6
VCOM – Analog Voltage (V)
Charge Injection vs. Analog Voltage
Document Number: 71398
S11-1185–Rev. C, 13-Jun-11
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
DG2001
Vishay Siliconix
TEST CIRCUITS
V+
+3V
Logic
Input
V+
0V
NO or NC
Switch
Input
tr < 20 ns
tf < 20 ns
50 %
Switch Output
COM
VOUT
0.9 x V OUT
IN
Logic
Input
RL
300 
GND
Switch
Output
CL
35 pF
0V
tOFF
tON
0V
Logic "1" = Switch On
Logic input waveforms inverted for switches that have
the opposite logic sense.
CL (includes fixture and stray capacitance)
VOUT = VCOM
RL
R L + R ON
Figure 1. Switching Time
V+
Logic
Input
V+
VNO
VNC
tr < 5 ns
tf < 5 ns
0V
COM
NO
3V
VO
NC
RL
300 
IN
CL
35 pF
VNC = V NO
VO
GND
Switch
Output
90 %
0V
tD
tD
CL (includes fixture and stray capacitance)
Figure 2. Break-Before-Make Interval
V+
Rgen
VOUT
V+
NC or NO
COM
VOUT
VOUT
+
IN
IN
Vgen
CL
3V
On
Off
On
GND
Q = VOUT x CL
IN depends on switch configuration: input polarity
determined by sense of switch.
Figure 3. Charge Injection
Document Number: 71398
S11-1185–Rev. C, 13-Jun-11
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DG2001
Vishay Siliconix
TEST CIRCUITS
V+
10 nF
V+
COM
0 V, 2.4 V
IN
COM
NC or NO
VNC/ NO
Off Isolation = 20 log
RL
GND
VCOM
Analyzer
Figure 4. Off-Isolation
V+
10 nF
V+
COM
Meter
IN
0 V, 2.4 V
NC or NO
GND
HP4192A
Impedance
Analyzer
or Equivalent
f = 1 MHz
Figure 5. Channel Off/On Capacitance
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?71398.
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Document Number: 71398
S11-1185–Rev. C, 13-Jun-11
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Package Information
Vishay Siliconix
TSOP: 5/6−LEAD
JEDEC Part Number: MO-193C
e1
e1
5
4
6
E1
1
2
5
4
E
E1
1
3
2
3
-B-
e
b
E
-B-
e
0.15 M C B A
5-LEAD TSOP
b
0.15 M C B A
6-LEAD TSOP
4x 1
-A-
D
0.17 Ref
c
R
R
A2 A
L2
Gauge Plane
Seating Plane
Seating Plane
0.08
C
L
A1
-C-
(L1)
4x 1
MILLIMETERS
Dim
A
A1
A2
b
c
D
E
E1
e
e1
L
L1
L2
R
Min
Nom
Max
Min
Nom
Max
0.91
-
1.10
0.036
-
0.043
0.01
-
0.10
0.0004
-
0.004
0.90
-
1.00
0.035
0.038
0.039
0.30
0.32
0.45
0.012
0.013
0.018
0.10
0.15
0.20
0.004
0.006
0.008
2.95
3.05
3.10
0.116
0.120
0.122
2.70
2.85
2.98
0.106
0.112
0.117
1.55
1.65
1.70
0.061
0.065
0.067
0.95 BSC
0.0374 BSC
1.80
1.90
2.00
0.071
0.075
0.079
0.32
-
0.50
0.012
-
0.020
0.60 Ref
0.024 Ref
0.25 BSC
0.010 BSC
0.10
-
-
0.004
-
-
0
4
8
0
4
8
7 Nom
1
ECN: C-06593-Rev. I, 18-Dec-06
DWG: 5540
Document Number: 71200
18-Dec-06
INCHES
7 Nom
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AN823
Vishay Siliconix
Mounting LITTLE FOOTR TSOP-6 Power MOSFETs
Surface mounted power MOSFET packaging has been based on
integrated circuit and small signal packages. Those packages
have been modified to provide the improvements in heat transfer
required by power MOSFETs. Leadframe materials and design,
molding compounds, and die attach materials have been
changed. What has remained the same is the footprint of the
packages.
The basis of the pad design for surface mounted power MOSFET
is the basic footprint for the package. For the TSOP-6 package
outline drawing see http://www.vishay.com/doc?71200 and see
http://www.vishay.com/doc?72610 for the minimum pad footprint.
In converting the footprint to the pad set for a power MOSFET, you
must remember that not only do you want to make electrical
connection to the package, but you must made thermal connection
and provide a means to draw heat from the package, and move it
away from the package.
In the case of the TSOP-6 package, the electrical connections are
very simple. Pins 1, 2, 5, and 6 are the drain of the MOSFET and
are connected together. For a small signal device or integrated
circuit, typical connections would be made with traces that are
0.020 inches wide. Since the drain pins serve the additional
function of providing the thermal connection to the package, this
level of connection is inadequate. The total cross section of the
copper may be adequate to carry the current required for the
application, but it presents a large thermal impedance. Also, heat
spreads in a circular fashion from the heat source. In this case the
drain pins are the heat sources when looking at heat spread on the
PC board.
Since surface mounted packages are small, and reflow soldering
is the most common form of soldering for surface mount
components, “thermal” connections from the planar copper to the
pads have not been used. Even if additional planar copper area is
used, there should be no problems in the soldering process. The
actual solder connections are defined by the solder mask
openings. By combining the basic footprint with the copper plane
on the drain pins, the solder mask generation occurs automatically.
A final item to keep in mind is the width of the power traces. The
absolute minimum power trace width must be determined by the
amount of current it has to carry. For thermal reasons, this
minimum width should be at least 0.020 inches. The use of wide
traces connected to the drain plane provides a low impedance
path for heat to move away from the device.
REFLOW SOLDERING
Vishay Siliconix surface-mount packages meet solder reflow
reliability requirements. Devices are subjected to solder reflow as a
test preconditioning and are then reliability-tested using
temperature cycle, bias humidity, HAST, or pressure pot. The
solder reflow temperature profile used, and the temperatures and
time duration, are shown in Figures 2 and 3.
Figure 1 shows the copper spreading recommended footprint for
the TSOP-6 package. This pattern shows the starting point for
utilizing the board area available for the heat spreading copper. To
create this pattern, a plane of copper overlays the basic pattern on
pins 1,2,5, and 6. The copper plane connects the drain pins
electrically, but more importantly provides planar copper to draw
heat from the drain leads and start the process of spreading the
heat so it can be dissipated into the ambient air. Notice that the
planar copper is shaped like a “T” to move heat away from the
drain leads in all directions. This pattern uses all the available area
underneath the body for this purpose.
0.167
4.25
0.074
1.875
0.014
0.35
0.122
3.1
0.026
0.65
0.049
1.25
0.049
1.25
0.010
0.25
FIGURE 1. Recommended Copper Spreading Footprint
Document Number: 71743
27-Feb-04
Ramp-Up Rate
+6_C/Second Maximum
Temperature @ 155 " 15_C
120 Seconds Maximum
Temperature Above 180_C
70 − 180 Seconds
Maximum Temperature
240 +5/−0_C
Time at Maximum Temperature
20 − 40 Seconds
Ramp-Down Rate
+6_C/Second Maximum
FIGURE 2. Solder Reflow Temperature Profile
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AN823
Vishay Siliconix
10 s (max)
255 − 260_C
1X4_C/s (max)
3-6_C/s (max)
217_C
140 − 170_C
60 s (max)
60-120 s (min)
Pre-Heating Zone
3_C/s (max)
Reflow Zone
Maximum peak temperature at 240_C is allowed.
FIGURE 3. Solder Reflow Temperature and Time Durations
THERMAL PERFORMANCE
TABLE 1.
Equivalent Steady State Performance—TSOP-6
Thermal Resistance Rqjf
30_C/W
On-Resistance vs. Junction Temperature
1.6
VGS = 4.5 V
ID = 6.1 A
1.4
rDS(on) − On-Resiistance
(Normalized)
A basic measure of a device’s thermal performance is the
junction-to-case thermal resistance, Rqjc, or the
junction-to-foot thermal resistance, Rqjf. This parameter is
measured for the device mounted to an infinite heat sink and
is therefore a characterization of the device only, in other
words, independent of the properties of the object to which the
device is mounted. Table 1 shows the thermal performance
of the TSOP-6.
1.2
1.0
0.8
0.6
−50
SYSTEM AND ELECTRICAL IMPACT OF
TSOP-6
−25
0
25
50
75
100
125
150
TJ − Junction Temperature (_C)
FIGURE 4. Si3434DV
In any design, one must take into account the change in
MOSFET rDS(on) with temperature (Figure 4).
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Document Number: 71743
27-Feb-04
Application Note 826
Vishay Siliconix
RECOMMENDED MINIMUM PADS FOR TSOP-6
0.099
0.039
0.020
0.019
(1.001)
(0.508)
(0.493)
0.064
(1.626)
0.028
(0.699)
(3.023)
0.119
(2.510)
Recommended Minimum Pads
Dimensions in Inches/(mm)
Return to Index
APPLICATION NOTE
Return to Index
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26
Document Number: 72610
Revision: 21-Jan-08
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Revision: 02-Oct-12
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Document Number: 91000