DG2016, DG2026 Datasheet

DG2016, DG2026
Vishay Siliconix
High-Bandwidth, Low Voltage, Dual SPDT Analog Switches
DESCRIPTION
FEATURES
The DG2016/DG2026 are monolithic CMOS dual
single-pole/double-throw (SPDT) analog switchs. They are
specifically designed for low-voltage, high bandwidth
applications.
The DG2016/DG2026’s on-resistance (3  at 2.7 V),
matching and flatness are guaranteed over the entire analog
voltage range. Wide dynamic performance is achieved with
better than - 80 dB for both cross-talk and off-isolation at
1 MHz.
Both SPDT’s operate with independent control logic,
conduct equally well in both directions and block signals up
to the power supply level when off. Break-before-make is
guaranteed.
With fast switching speeds, low on-resistance, high
bandwidth, and low charge injection, the DG2016/DG2026
are ideally suited for audio and video switching with high
linearity.
Built on Vishay Siliconix’s low voltage CMOS technology, the
DG2016/DG2026 contain an epitaxial layer which prevents
latch-up
• Halogen-free according to IEC 61249-2-21
Definition
• Single Supply (1.8 V to 5.5 V)
• Low On-Resistance - RON: 2.4 
• Crosstalk and Off Isolation: - 81 dB at 1 MHz
• MSOP-10 Package
• Compliant to RoHS Directive 2002/95/EC
BENEFITS
•
•
•
•
•
Reduced Power Consumption
High Accuracy
Reduce Board Space
Low-Voltage Logic Compatible
High Bandwidth
APPLICATIONS
•
•
•
•
•
•
Cellular Phones
Speaker Headset Switching
Audio and Video Signal Routing
PCMCIA Cards
Low-Voltage Data Acquisition
ATE
FUNCTIONAL BLOCK DIAGRAM AND PIN CONFIGURATION
DG2016DQ – MSOP-10
IN1
1
10
COM1
NO1
2
9
NC1
Logic
NC1 and NC2
NO1 and NO2
GND
3
8
V+
0
ON
OFF
NO2
4
7
NC2
1
OFF
ON
IN2
5
6
COM2
TRUTH TABLE
Top View
DG2026DQ – MSOP-10
IN1
1
10
COM1
NC1
2
9
NO1
GND
3
8
V+
NC2
4
7
NO2
IN2
5
6
COM2
ORDERING INFORMATION
Temp Range
Package
- 40 °C to 85 °C
MSOP-10
Part Number
DG2016DQ-T1-E3
DG2026DQ-T1-E3
Top View
Document Number: 72030
S11-1185-Rev. D, 13-Jun-11
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This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
DG2016, DG2026
Vishay Siliconix
ABSOLUTE MAXIMUM RATINGS
Parameter
Limit
Reference V+ to GND
Unit
- 0.3 to + 6
IN, COM, NC, NOa
V
- 0.3 to (V+ + 0.3)
Continuous Current (Any terminal)
± 50
Peak Current (Pulsed at 1 ms, 10 % duty cycle)
± 200
Storage Temperature (D Suffix)
Power Dissipation (Packages)
b
MSOP-10
mA
- 65 to 150
°C
320
mW
c
Notes:
a. Signals on NC, NO, or COM or IN exceeding V+ will be clamped by internal diodes. Limit forward diode current to maximum current ratings.
b. All leads welded or soldered to PC Board.
c. Derate 4 mW/°C above 70 °C.
SPECIFICATIONS (V+ = 3 V)
Parameter
Symbol
Test Conditions
Otherwise Unless Specified
V+ = 3 V, ± 10 %, VIN = 0.4 V or 2 Ve
Limits
- 40 °C to 85 °C
Temp.a
Min.b
Full
0
Typ.c
Max.b
Unit
V+
V
Analog Switch
VNO, VNC
VCOM
Analog Signal Ranged
On-Resistance
RON Flatness
RON
V+ = 2.7 V, VCOM = 0.2 V/1.5 V, INO, INC = 10 mA
Room
Full
RON
Flatness
V+ = 2.7 V, VCOM = 0 to V+, INO, INC = 10 mA
Room
INO(off)
INC(off)
Switch Off
Leakage Currentf
ICOM(off)
Channel-On
Leakage Currentf
ICOM(on)
V+ = 3.3 V
VNO, VNC = 0.3 V/3 V, VCOM = 3 V/0.3 V
V+ = 3.3 V, VNO, VNC = VCOM = 0.3 V/3 V
3
4.8
5.3

1.6
Room
Full
-1
- 10
1
10
Room
Full
-1
- 10
1
10
Room
Full
-1
- 10
1
10
1.6
nA
Digital Control
Input High Voltaged
VINH
Full
Input Low Voltage
VINL
Full
Cin
Input Capacitance
IINL or IINH
Input Current
0.4
Full
VIN = 0 V or V+
Full
5
1
V
pF
1
µA
Dynamic Characteristics
Turn-On Time
tON
Turn-Off Time
tOFF
td
Break-Before-Make Time
Injectiond
QINJ
d
Off-Isolation
OIRR
Crosstalkd
XTALK
Charge
CNC(off)
d
CNO(on)
28
53
59
Room
Full
13
38
38
Full
CL = 1 nF, VGEN = 0 V, RGEN = 0 
RL = 50 , CL = 5 pF, f = 1 MHz
CNO(off)
NO, NC Off Capacitanced
Channel-On Capacitance
VNO or VNC = 2 V, RL = 50 , CL = 35 pF
Room
Full
VIN = 0 V or V+, f = 1 MHz
CNC(on)
ns
1
Room
38
Room
- 78
Room
- 82
Room
15
Room
15
Room
49
Room
45
Full
0.01
pC
dB
pF
Power Supply
Power Supply Current
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2
I+
VIN = 0 V or V+
1
µA
Document Number: 72030
S11-1185-Rev. D, 13-Jun-11
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
DG2016, DG2026
Vishay Siliconix
SPECIFICATIONS (V+ = 5 V)
Parameter
Symbol
Test Conditions
Otherwise Unless Specified
V+ = 5 V, ± 10 %, VIN = 0.8 V or 2.4 Ve
Limits
- 40 °C to 85 °C
Temp.a
Min.b
Full
0
Typ.c
Max.b
Unit
V+
V
Analog Switch
VNO, VNC
VCOM
Analog Signal Ranged
On-Resistance
RON Flatness
RON
V+ = 4.5 V, VCOM = 3 V, INO, INC = 10 mA
Room
Full
RON
Flatness
V+ = 4.5 V, VCOM = 0 to V+, INO, INC = 10 mA
Room
INO(off)
INC(off)
Switch Off
Leakage Current
ICOM(off)
Channel-On
Leakage Current
ICOM(on)
V+ = 5.5 V
VNO, VNC = 1 V/4.5 V, VCOM = 4.5 V/1 V
V+ = 5.5 V, VNO, VNC = VCOM =1 V/4.5 V
2.4
4
4.3

1.2
Room
Full
-1
- 10
1
10
Room
Full
-1
- 10
1
10
Room
Full
-1
- 10
1
10
2
nA
Digital Control
Input High Voltaged
VINH
Full
Input Low Voltage
VINL
Full
Cin
Input Capacitance
IINL or IINH
Input Current
0.8
Full
VIN = 0 V or V+
Full
5
1
V
pF
1
µA
Dynamic Characteristics
Room
Full
23
48
52
VNO or VNC = 3 V, RL = 50 , CL = 35 pF
Room
Full
8
33
35
CL = 1 nF, VGEN = 0 V, RGEN = 0 
Room
79
Room
- 81
Room
- 82
CNO(off)
Room
14
CNC(off)
Room
14
Room
48
Room
44
Turn-On Time
tON
Turn-Off Time
tOFF
Break-Before-Make Time
td
Injectiond
QINJ
Charge
Off-Isolationd
Crosstalk
OIRR
d
XTALK
Source-Off Capacitanced
d
Channel-On Capacitance
CNO(on)
Full
RL = 50 , CL = 5 pF, f = 1 MHz
VIN = 0 V or V+, f = 1 MHz
CNC(on
ns
1
pC
dB
pF
Power Supply
Power Supply Range
V+
Power Supply Current
I+
1.8
VIN = 0 V or V+
Full
0.01
5.5
V
1
µA
Notes:
a. Room = 25 °C, Full = as determined by the operating suffix.
b. Typical values are for design aid only, not guaranteed nor subject to production testing.
c. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.
d. Guarantee by design, nor subjected to production test.
e. VIN = input voltage to perform proper function.
f. Guaranteed by 5 V leakage testing, not production tested.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
Document Number: 72030
S11-1185-Rev. D, 13-Jun-11
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This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
DG2016, DG2026
Vishay Siliconix
TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
5
8
T = 25 °C
IS = 10 mA
4
R ON - On-Resistance ()
RON - On-Resistance ()
7
6
5
4
V+ = 3.0 V
V+ = 5.0 V
3
2
V+ = 3 V
85 °C
25 °C
- 40 °C
3
2
V+ = 5 V
85 °C
1
25 °C
- 40 °C
1
0
0
0
1
2
3
VCOM - Analog Voltage (V)
4
5
0
2
3
4
5
VCOM - Analog Voltage (V)
RON vs. VCOM and Supply Voltage
RON vs. Analog Voltage and Temperature
10 000
10 mA
V+ = 5 V
1 mA
1000
100
I+ - Supply Current (A)
I+ - Supply Current (nA)
1
V+ = 5 V
VIN = 0 V
V+ = 3 V
VIN = 0 V
10
100 µA
10 µA
1 µA
100 nA
1
- 60
10 nA
- 40
- 20
0
20
40
Temperature (°C)
60
80
10
100
Supply Current vs. Temperature
1K
10 K
100 K
1M
Input Switching Frequency (Hz)
10 M
Supply Current vs. Input Switching Frequency
100
10 000
V+ = 5 V
75
ICOM(off)
100
Leakage Current (pA)
INO(off), INC(off)
1000
Leakage Current (pA)
100
ICOM(on)
10
V+ = 5 V
50
ICOM(on)
25
ICOM(off)
0
INO(off), INC(off)
- 25
- 50
- 75
1
- 60
- 100
- 40
- 20
0
20
40
60
80
Temperature (°C)
Leakage Current vs. Temperature
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4
100
0
1
2
3
4
5
VCOM, V NO, V NC - Analog Voltage (V)
Leakage vs. Analog Voltage
Document Number: 72030
S11-1185-Rev. D, 13-Jun-11
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
DG2016, DG2026
Vishay Siliconix
TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
60
10
50
LOSS
- 10
Loss, OIRR, X TALK (dB)
tON / t OFF - Switching Time (µs)
RL = 50 
40
tON V+ = 3 V
30
tON V+ = 5 V
20
tOFF V+ = 3 V
- 30
XTA LK
- 50
OIRR
V+ = 5 V
RL = 50 
- 70
10
tOFF V+ = 5 V
0
- 60
- 40
- 20
0
20
40
Temperature (°C)
60
80
- 90
100 K
100
1M
Switching Time vs. Temperature
100 M
1G
Insertion Loss, Off-Isolation
Crosstalk vs. Frequency
3.0
80
60
Q - Charge Injection (pC)
2.5
2.0
1.5
1.0
VT
- Switching Threshold (V)
10 M
Frequency (Hz)
40
20
V+ = 5 V
0
- 20
V+ = 3 V
- 40
0.5
- 60
0.0
- 80
0
1
2
3
4
5
V+ - Supply Voltage (V)
6
0
7
1
2
3
4
VCOM - Analog Voltage (V)
5
Switching Threshold vs. Supply Voltage
Charge Injection vs. Analog Voltage
TEST CIRCUITS
V+
Logic
Input
V+
Switch
Input
NO or NC
tr < 5 ns
tf < 5 ns
VOUT
0.9 x V OUT
IN
Logic
Input
50 %
VINL
Switch Output
COM
VINH
RL
50 
GND
CL
35 pF
Switch
Output
0V
tON
tOFF
0V
CL (includes fixture and stray capacitance)
V OUT = V COM
RL
Logic "1" = Switch On
Logic input waveforms inverted for switches that have
the opposite logic sense.
R L + R ON
Figure 1. Switching Time
Document Number: 72030
S11-1185-Rev. D, 13-Jun-11
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This document is subject to change without notice.
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DG2016, DG2026
Vishay Siliconix
TEST CIRCUITS
V+
Logic
Input
V+
VNO
VNC
COM
NO
VINH
tr < 5 ns
tf < 5 ns
VINL
VO
NC
RL
50 
IN
CL
35 pF
GND
VNC = V NO
VO
90 %
Switch
0V
Output
tD
tD
CL (includes fixture and stray capacitance)
Figure 2. Break-Before-Make Interval
V+
VOUT
V+
Rgen
VOUT
COM
NC or NO
VOUT
+
IN
IN
Vgen
CL = 1 nF
VIN = 0 - V+
On
Off
On
GND
Q = VOUT x CL
IN depends on switch configuration: input polarity
determined by sense of switch.
Figure 3. Charge Injection
V+
V+
10 nF
10 nF
V+
V+
NC or NO
IN
COM
0 V, 2.4 V
Meter
COM
COM
IN
0 V, 2.4 V
RL
NC or NO
GND
GND
Analyzer
HP4192A
Impedance
Analyzer
or Equivalent
f = 1 MHz
VCOM
Off Isolation = 20 log V
NO/ NC
Figure 4. Off-Isolation
Figure 5. Channel Off/On Capacitance
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?72030.
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Document Number: 72030
S11-1185-Rev. D, 13-Jun-11
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Package Information
Vishay Siliconix
MSOP:
10−LEADS
JEDEC Part Number: MO-187, (Variation AA and BA)
(N/2) Tips)
2X
5
A B C 0.20
N N-1
0.60
0.48 Max
Detail “B”
(Scale: 30/1)
Dambar Protrusion
E
1 2
0.50
N/2
0.60
0.08 M C B S
b
A S
7
Top View
b1
e1
With Plating
e
A
See Detail “B”
c1
0.10 C
-H-
A1
D
6
Seating Plane
c
Section “C-C”
Scale: 100/1
(See Note 8)
Base Metal
-A-
3
See Detail “A”
Side View
0.25
BSC
C
Parting Line
0.07 R. Min
2 Places
C
ς
A2
Seating Plane
0.05 S
E1
-B-
L 4
T
-C-
3
0.95
End View
Detail “A”
(Scale: 30/1)
NOTES:
1.
2.
Dimensioning and tolerances per ANSI.Y14.5M-1994.
3.
Dimensions “D” and “E1” do not include mold flash or protrusions, and are
measured at Datum plane -H- , mold flash or protrusions shall not exceed
0.15 mm per side.
4.
Dimension is the length of terminal for soldering to a substrate.
5.
Terminal positions are shown for reference only.
6.
Formed leads shall be planar with respect to one another within 0.10 mm at
seating plane.
7.
N = 10L
Die thickness allowable is 0.203"0.0127.
The lead width dimension does not include Dambar protrusion. Allowable
Dambar protrusion shall be 0.08 mm total in excess of the lead width
dimension at maximum material condition. Dambar cannot be located on the
lower radius or the lead foot. Minimum space between protrusions and an
adjacent lead to be 0.14 mm. See detail “B” and Section “C-C”.
8.
Section “C-C” to be determined at 0.10 mm to 0.25 mm from the lead tip.
9.
Controlling dimension: millimeters.
10. This part is compliant with JEDEC registration MO-187, variation AA and BA.
11. Datums -A- and -B- to be determined Datum plane -H- .
12. Exposed pad area in bottom side is the same as teh leadframe pad size.
Document Number: 71245
12-Jul-02
MILLIMETERS
Dim
Min
Nom
Max
A
A1
A2
b
b1
c
c1
D
E
E1
e
e1
L
N
T
-
-
1.10
0.05
0.10
0.15
0.75
0.85
0.95
0.17
-
0.27
8
0.17
0.20
0.23
8
0.13
-
0.23
0.15
0.18
0.13
3.00 BSC
Note
3
4.90 BSC
2.90
3.00
3.10
3
0.70
4
0.50 BSC
2.00 BSC
0.40
0.55
10
0_
4_
5
6_
ECN: T-02080—Rev. C, 15-Jul-02
DWG: 5867
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requirements as per JEDEC JS709A standards. Please note that some Vishay documentation may still make reference
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Revision: 02-Oct-12
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Document Number: 91000