Ultralow Noise Synthesizers

Ultralow Noise Synthesizers
LTC6946
REF
OSC
VCO
Output
Divider
PLL
Low Noise and Spurious Levels, 350MHz to 6.39GHz Frequency Synthesizers
Our new ultralow noise, integer-N frequency synthesizers provide best-in-class phase noise and spurious performance. The
LTC®6946 is a complete frequency synthesizer that includes a high performance, low noise, 6.39GHz phase-locked loop (PLL) with a
fully integrated, low phase noise VCO. The LTC6945 separates the low 1/f corner PLL core for use with an external VCO up to 6GHz.
The free, easy-to-use PLLWizard™ CAD tool quickly and accurately simulates synthesizer performance to ensure an optimal design.
LTC6946-3 PLL Phase Noise
Features
nn
nn
nn
nn
nn
nn
nn
nn
Integrated VCO, Up to 6.39GHz (LTC6946)
350MHz to 6GHz VCO Input Range (LTC6945)
Low –226dBc/Hz Normalized In-Band Phase Noise Floor
–157dBc/Hz Wideband Output Phase Noise Floor
Industry’s Lowest –274dBc/Hz Normalized In-Band 1/f Noise
Spurious Levels < –100dBc
High Current 11mA Output Charge Pump Minimizes Loop
Compensation Thermal Noise
Programmable Output Divider for Wide Operating Frequency Range
28-Pin (4mm × 5mm) QFN Packages
–80
–90
PHASE NOISE (dBc/Hz)
nn
–100
–110
–120
–130
RMS NOISE = 0.61°
–140 RMS JITTER = 296fs
fRF = 5.7GHz
–150 fPFD = 10MHz
BW = 85kHz
–160
1M
100
1k
10k
100k
OFFSET FREQUENCY (Hz)
Frequency Coverage Options
LTC6946-1
LTC6946-2
LTC6946-3
LTC6946-4
VCO Frequency (GHz)
2.240 to 3.740
3.080 to 4.910
3.840 to 5.790
4.200 to 6.390
OUT DIV = 1
2.240 to 3.740
3.080 to 4.910
3.840 to 5.790
4.200 to 6.390
OUT DIV = 2
1.120 to 1.870
1.540 to 2.455
1.920 to 2.895
2.100 to 3.195
OUT DIV = 3
0.747 to 1.247
1.027 to 1.637
1.280 to 1.930
1.400 to 2.130
OUT DIV = 4
0.560 to 0.935
0.770 to 1.228
0.960 to 1.448
1.050 to 1.598
OUT DIV = 5
0.448 to 0.748
0.616 to 0.982
0.768 to 1.158
0.840 to 1.278
OUT DIV = 6
0.373 to 0.623
0.513 to 0.818
0.640 to 0.965
0.700 to 1.065
L, LT, LTC, LTM, Linear Technology and the Linear logo are
registered trademarks and PLLWizard is a trademark of Linear
Technology Corporation. All other trademarks are the property of
their respective owners.
10M 40M
LTC6946-X Frequency Synthesizer Block Diagram
V+ (3.3V)
REF INPUT (10MHz to 250MHz)
• Single-Ended or Differential
• Sine Wave or Logic
REF IN
Proprietery noise-limiting
input section delivers optimal
phase noise performance with
sine wave input signals.
VCP+ (5V)
÷1 to 1023
≤ 100MHz
R_DIV
PFD
Low noise charge
pump with programmable
output current up to 11mA
CP
CH PUMP
LOCK IND
REF OUT
N_DIV
Buffered REF OUT
(10MHz to 250MHz)
VCO
TUNE
÷32 to 65535
SDO
SPI Serial Port
Configurable
Status Output
On-chip temperaturecompensated VCO
(external on LTC6945).
Never needs recalibration.
SCLK
SDI
Normalized
in-band phase
noise floor =
–226dBc/Hz
Serial
Port
÷1 to 6
CS
STAT
Programmable output
divider settable to any
integer from 1 to 6.
RF OUT
OUT_DIV
GND
Mutable output amplifier
controlled via dedicated pin
or serial port
MUTE
Programmable output
divider gives each part
broad frequency coverage.
Output is always 50%
duty cycle.
PLLWizard Tool Provides Design Support
Design Features
nn
nn
nn
nn
nn
Find Part Parameters Based on Your Frequency Plan
Design Noise-Optimized Loop Filters
Simulate Loop Frequency Response and Stability
Simulate VCO and Reference Source Noise
Simulate Output Noise Characteristics and Statistics
Evaluation Features
nn
nn
nn
nn
Read and Write All Device Registers
Configure Using a Block Diagram Programming Interface
Troubleshoot Common Set-Up Problems
Receive Alerts Due to Programming Errors
www.linear.com/pllwizard
www.linear.com/6946 n 1-800-4-LINEAR
0315B