T NT DU C PRO LACEME r at E T O LE REP rt Cente tsc O B S EN D ED m/ p po MM nical Su tersil.co O C E h w.in October 1994, Rev A NO R ouData r TecSheet r ww o t L c I a S t n R o E c 8-INT 1-88 EL4451 ® Wideband Variable-Gain Amplifier, Gain of 2 The EL4451 is a complete variable gain circuit. It offers wide bandwidth and excellent linearity while including a powerful output voltage amplifier, drawing modest supply current. FN7169 Features • Complete variable-gain amplifier with output amplifier, requires no extra components • Excellent linearity of 0.2% • 70MHz signal bandwidth • Operates on ±5V to ±15V supplies The EL4451 operates on ±5V to ±15V supplies and has an analog input range of ±2V, making it ideal for video signal processing. AC characteristics do not change appreciably over the ±5V to ±15V supply range. • All inputs are differential The circuit has an operational temperature range of -40°C to +85°C and is packaged in plastic 14-pin DIP and 14-pin SO. Applications • 400V/µs slew rate • > 70dB attenuation @ 4MHz • Leveling of varying inputs The EL4451 is fabricated with Elantec’s proprietary complementary bipolar process which provides excellent signal symmetry and is free from latch up. • Variable filters Pinout • Text insertion into video • Fading Ordering Information EL4451 (14-PIN PDIP, SO) TOP VIEW 1 PART NUMBER TEMP. RANGE PACKAGE PKG. NO. EL4451CN -40°C to +85°C 14-Pin PDIP MDP0031 EL4451CS -40°C to +85°C 14-Pin SO MDP0027 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright © Intersil Americas Inc. 2003. All Rights Reserved. Elantec is a registered trademark of Elantec Semiconductor, Inc. All other trademarks mentioned are the property of their respective owners. EL4451 Absolute Maximum Ratings (TA = 25°C) V+ VS VIN ∆VIN IIN Positive Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . 16.5V V+ to V- Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . .33V Voltage at any Input or Feedback . . . . . . . . . . . . . . . V+ to VDifference between Pairs of Inputs or Feedback. . . . . . . . .6V Current into any Input, or Feedback Pin . . . . . . . . . . . . . 4mA IOUT PD TA TS Continuous Output Current . . . . . . . . . . . . . . . . . . . . . . 30mA Maximum Power Dissipation . . . . . . . . . . . . . . . . See Curves Operating Temperature Range . . . . . . . . . . . .-40°C to +85°C Storage Temperature Range. . . . . . . . . . . . .-60°C to +150°C CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests are at the specified temperature and are pulsed tests, therefore: TJ = TC = TA Open-Loop DC Electrical Specifications PARAMETER VDIFF Power Supplies at ±5V, TA = 25°C, RL = 500Ω. DESCRIPTION Signal input differential input voltage Clipping MIN TYP 1.8 2.0 V 1.3 V ±2.8 V ±12.8 V 0.2% nonlinearity VCM Common-mode range of VIN; VDIFF = 0, VS = ±5V ±2.0 VS = ±15V MAX UNITS VOS Input offset voltage 7 25 mV VOS, FB Output offset voltage 8 25 mV VG, 100% Extrapolated voltage for 100% gain 1.9 2.1 2.2 V VG, 0% Extrapolated voltage for 0% gain -0.16 -0.06 0.06 V VG, 1V Gain at VGAIN = 1V 0.95 1.05 1.15 V/V IB Input bias current (all inputs) -20 -9 0 µA IOS Input offset current between VIN +and VIN-, Gain+ and Gain-, FB and Ref 0.2 4 µA NL Nonlinearity, VIN between -1V and +1V, VG = 1V 0.2 0.5 % Ft Signal feedthrough, VG = -1V -100 -70 dB RIN, VIN Input resistance, VIN 100 230 kΩ RIN, FB Input resistance, FB 200 460 kΩ RIN, RGAIN Input resistance, gain input 50 100 kΩ CMRR Common-mode rejection ratio of VIN 70 90 dB PSRR Power supply rejection ratio of VOS, FB, VS = ±5V to ±15V 50 60 dB VO Output voltage swing (VIN = 0, VREF varied) VS = ±5V ±2.5 ±2.8 V VS = ±15V ±12.5 ±12.8 40 85 ISC Output short-circuit current IS Supply current, VS = ±15V 2 15.5 mA 18 mA EL4451 Closed-Loop AC Electrical Specifications PARAMETER Power supplies at ±12V, TA = 25°C. RL = 500Ω, CL = 15pF, VG = 1V DESCRIPTION MIN TYP MAX UNITS BW, -3dB -3dB small-signal bandwidth, signal input 70 MHz BW, ±0.1dB 0.1dB flatness bandwidth, signal input 10 MHz Peaking Frequency response peaking 0.6 dB BW, gain -3dB small-signal bandwidth, gain input 70 MHz SR Slew rate, VOUT between -2V and +2V, RF = RG = 500Ω 400 V/µs VN Input referred noise voltage density 110 nV/√Hz dG Differential gain error, Voffset between -0.7V and +0.7V 0.9 % dθ Differential phase error, Voffset between -0.7V and +0.7V 0. 2 ° Test Circuit Note: For typical performance curves, RF = 0, RG = ∞, VGAIN = 1V, RL = 500Ω, and CL = 15pF unless otherwise noted. 3 EL4451 Typical Performance Curves Frequency Response for Various Feedback Divider Ratios Gain, -3dB Bandwidth, and Peaking vs Load Resistance Frequency Response for Various Gain Settings 4 Frequency Response for Various RL, CL VS = ±5V -3dB Bandwidth and Peaking vs Supply Voltage Slew Rate vs Supply Voltage Frequency Response for Various RL, CL VS = ±15V -3dB Bandwidth and Peaking vs Die Temperature Slew Rate vs Die Temperature EL4451 Typical Performance Curves Common-Mode Rejection Ratio vs Frequency Differential Gain Error vs Input Offset Voltage VS = ±5V or ±12V Differential Gain and Phase Errors vs Gain Setting 5 (Continued) Input Voltage Noise vs Frequency Nonlinearity vs Input Signal Differential Gain Differential Phase Error vs Input Offset Voltage VS = ±5V Differential Phase Error vs Input Offset Voltage VS = ±12V Differential Gain and Phase Errors vs Load Resistance EL4451 Typical Performance Curves (Continued) Gain vs VGAIN Change in VG, 100% and VG, 0% vs Die Temperature Offset Voltage vs Die Temperature Bias Current vs Die Temperature Supply Current vs Die Temperature Supply Current vs Supply Voltage Applications Information The EL4451 is a complete two-quadrant multiplier/gain control with 70MHz bandwidth. It has three sets of inputs; a differential signal input VIN, a differential gain-controlling input VGAIN, and another differential input which is used to 6 VG, 0% and VG, 100% vs Supply Voltage Common Mode Input Range vs Supply Voltage 14-Pin Package Power Dissipation vs Ambient Temperature complete a feedback loop with the output. Here is a typical connection: EL4451 The gain of the feedback divider is: H = RG/(RG + RF) The transfer function of the part is: VOUT = AO × (((VIN+) - (VIN-)) × ((VGAIN+) - (VGAIN-)) + (VREF - VFB)) VFB is connected to VOUT through a feedback network, so VFB = H × VOUT. AO is the open-loop gain of the amplifier, and is approximately 600. The large value of AO drives: ((VIN+)-(VIN-))×((VGAIN+)-(VGAIN-))+(VREF - VFB) → 0 Rearranging and substituting for VFB: VOUT = (((VIN+) - (VIN-)) × ((VGAIN+) - (VGAIN)) + VREF)/H or VOUT = (VIN × VGAIN + VREF)/H Thus the output is equal to the difference of the VIN’s times the difference of VGAIN’S and offset by VREF, all gained up by the feedback divider ratio. The EL4451 is stable for a direct connection between VOUT and FB, and the divider may be used for higher output gain, although with the traditional loss of bandwidth. It is important to keep the feedback divider’s impedance at the FB terminal low so that stray capacitance does not diminish the loop’s phase margin. The pole caused by the parallel impedance of the feedback resistors and stray capacitance should be at least 150MHz; typical strays of 3pF thus require a feedback impedance of 360Ω or less. Alternatively, a small capacitor across RF can be used to create more of a frequency-compensated divider. The value of the capacitor should scale with the parasitic capacitance at the FB input. It is also practical to place small capacitors across both the feedback and the gain resistors (whose values maintain the desired gain) to swamp out parasitics. For instance, two 10pF capacitors across equal divider resistors for a maximum gain of 4 will dominate parasitic effects and allow a higher divider resistance. The REF pin can be used as the output’s ground reference, for DC offsetting of the output, or it can be used to sum in another signal. Gain-Control Characteristics The quantity VGAIN in the above equations is bounded as 0 ≤ VGAIN ≤ 2, even though the externally applied voltages exceed this range. Actually, the gain transfer function around 0 and 2V is “soft”, that is, the gain does not clip abruptly below the 0%-VGAIN voltage nor above the 100%-VGAIN level. An overdrive of 0.3V must be applied to VGAIN to obtain truly 0% or 100%. Because the 0%- or 100%- VGAIN levels cannot be precisely determined, they are extrapolated from two points measured inside the slope of the gain 7 transfer curve. Generally, an applied VGAIN range of -0.5V to +2.5V will assure the full numerical span of 0 ≤ VGAIN ≤ 2. The gain control has a small-signal bandwidth equal to the VIN channel bandwidth, and overload recovery resolves in about 20nsec. Input Connections The input transistors can be driven from resistive and capacitive sources, but are capable of oscillation when presented with an inductive input. It takes about 80nH of series inductance to make the inputs actually oscillate, equivalent to four inches of unshielded wiring or 6 of unterminated input transmission line. The oscillation has a characteristic frequency of 500MHz. Often placing one’s finger (via a metal probe) or an oscilloscope probe on the input will kill the oscillation. Normal high-frequency construction obviates any such problems, where the input source is reasonably close to the input. If this is not possible, one can insert series resistors of around 51Ω to de-Q the inputs. Signal Amplitudes Signal input common-mode voltage must be between (V-)+3V and (V+)-3V to ensure linearity. Additionally, the differential voltage on any input stage must be limited to ±6V to prevent damage. The differential signal range is ±2V in the EL4451. The input range is substantially constant with temperature. The Ground Pin The ground pin draws only 6µA maximum DC current, and may be biased anywhere between(V-)+2.5V and (V+)-3.5V. The ground pin is connected to the IC’s substrate and frequency compensation components. It serves as a shield within the IC and enhances input stage CMRR and feedthrough over frequency, and if connected to a potential other than ground, it must be bypassed. Power Supplies The EL4451 works with any supplies from ±3V to ±15V. The supplies may be of different voltages as long as the requirements of the ground pin are observed (see the Ground Pin section). The supplies should be bypassed close to the device with short leads. 4.7µF tantalum capacitors are very good, and no smaller bypasses need be placed in parallel. Capacitors as small as 0.01µF can be used if small load currents flow. Single-polarity supplies, such as +12V with +5V can be used, where the ground pin is connected to +5V and V- to ground. The inputs and outputs will have to have their levels shifted above ground to accommodate the lack of negative supply. The power dissipation of the EL4451 increases with power supply voltage, and this must be compatible with the EL4451 package chosen. This is a close estimate for the dissipation of a circuit: PD = 2 × VS × IS, max + (VS - VO) × VO/RPAR where IS, max is the maximum supply current VS is the ± supply voltage (assumed equal) Leveling Circuits Often a variable-gain control is used to normalize an input signal to a standard amplitude from a modest range of possible input amplitude. A good example is in video systems, where an unterminated cable will yield a twicesized standard video amplitude, and an erroneously twiceterminated cable gives a 2/3-sized input. Here is a ±6dB range preamplifier: VO is the output voltage RPAR is the parallel of all resistors loading the output For instance, the EL4451 draws a maximum of 18mA. With light loading, RPAR →∞ and the dissipation with ±5V supplies is 180mW. The maximum supply voltage that the device can run on for a given PD and other parameters is: VS, max = (PD + VO2/RPAR) / (2IS + VO/RPAR) The maximum dissipation a package can offer is: PD, max = (TJ, max-TA, max) / θJA Where TJ,max is the maximum die temperature, 150°C for reliability, less to retain optimum electrical performance TA,max is the ambient temperature, 70°C for commercial and 85°C for industrial range θJAis the thermal resistance of the mounted package, obtained from data sheet dissipation curves The more difficult case is the SO-14 package. With a maximum die temperature of 150°C and a maximum ambient temperature of 85°C, the 65°C temperature rise and package thermal resistance of 120°C/W gives a dissipation of 542mW at 85°C. This allows the full maximum operating supply voltage unloaded, but reduced if loaded. Output Loading The output stage of the EL4451 is very powerful. It typically can source 80mA and sink 120mA. Of course, this is too much current to sustain and the part will eventually be destroyed by excessive dissipation or by metal traces on the die opening. The metal traces are completely reliable while delivering the 30mA continuous output given in the Absolute Maximum Ratings table in this data sheet, or higher purely transient currents. Gain changes only 0.2% from no load to 100Ω load. Heavy resistive loading will degrade frequency response and video distortion for loads < 100Ω. Capacitive loads will cause peaking in the frequency response. If capacitive loads must be driven, a small-valued series resistor can be used to isolate it. 12Ω to 51Ω should suffice. A 22Ω series resistor will limit peaking to 2.5dB with even a 220pF load. 8 FIGURE 1. LINEARIZED LEVELING AMPLIFIER In this arrangement, the EL4451 outputs a mixture of the signal routed through the multiplier and the REF terminal. The multiplier port produces the most distortion and needs to handle a fraction of an oversized video input, whereas the REF port is just like an op-amp input summing into the output. Thus, for oversized inputs the gain will be decreased and the majority of the signal is routed through the linear REF terminal. For undersized inputs, the gain is increased and the multiplier’s contribution added to the output. Here are some component values for two designs: ATTENUATION RATIO RF RG R1 R2 R3 -3dB BANDWIDTH 1.5 200Ω 400Ω 300Ω 100Ω 200Ω 47MHz 2 400Ω 400Ω 500Ω 100Ω 200Ω 28MHz EL4451 EL4451 Leveler Circuit Attenuation Ratio = 1.5 Here is the EL4451 used as an oscillator with simple AGC: EL4451 Leveler Circuit Attenuation Ratio = 2 FIGURE 2. LOW-DISTORTION SINEWAVE OSCILLATOR With the higher attenuation ratio, the multiplier sees a smaller input amplitude and distorts less, however the higher output gain reduces circuit bandwidth. As seen in the next curves, the peak differential gain error is 0.47% for the attenuation ratio of 1.5, but only 0.27% with the gain of 2 constants. To maintain bandwidth, an external op amp can be used instead of the RF - RG divider to boost the EL4451’s output by the attenuation ratio. Sinewave Oscillators Generating a stable, low distortion sinewave has long been a difficult task. Because a linear oscillator’s output tends to grow or diminish continuously, either a clipping circuit or automatic gain control (AGC) is needed. Clipping circuits generate severe distortion which needs subsequent filtering, and AGCs can be complicated. The oscillation frequency is set by the resonance of a seriestuned circuit, which may be an L-C combination or a crystal. At resonance, the series impedance of the tuned circuit drops and its phase lag is 0°, so the EL4451 needs a gain just over unity to sustain oscillation. The VGAIN- terminal is initially at -0.7V and the VGAIN+ terminal at about +2.1V, setting the maximum gain in the EL4451. At such high gain, the loop oscillates and output amplitude grows until D1 rectifies more positive voltage at VGAIN-, ultimately reducing gain until a stable 0.5Vrms output is produced. Using a 2MHz crystal, output distortion was -53dBc, or 0.22%. Sideband modulation was only 14Hz wide at -90dBc, limited by the filter of the spectrum analyzer used. The circuit works up to 30MHz. A parallel-tuned circuit can replace the 510Ω resistor and the 510Ω resistor moved in place of the series-tuned element to allow grounding of the tuned components. Filters The EL4451 can be connected to act as a voltage-variable integrator as shown: EL4451 CONNECTED AS VARIABLE INTEGRATOR 9 EL4451 The input RC cancels a zero produced by the output op-amp feedback connection at = 1/RC. With the input RC connected VOUT/VIN = 1/sRC; without it VOUT/VIN = (1 + sRC)/sRC. This variable integrator may be used in networks such as the Bi-quad. In some applications the input RC may be omitted. If a negative gain is required, the VIN+ and VIN- terminals can be exchanged. A voltage-controlled equalizer and cable driver can be constructed so: EQUALIZATION AND LINE DRIVER AMPLIFIER The main signal path is via the REF pin. This ensures maximum signal linearity, while the multiplier input is used to allow a variable amount of frequency-shaped input from R1, R2, and C. For optimum linearity, the multiplier input is attenuated by R1 and R2. This may not be necessary, depending on input signal amplitude, and R1 might be set to 0. R1and R2 should be set to provide sufficient peaking, depending on cable high-frequency losses, at maximum gain. RF and RG are chosen to provide the desired circuit gain, including backmatch resistor loss. All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 10