T U CT ROD ACEMEN at P E r T L e E P t en OL RE OBS ENDED upport C om/tsc M S l.c COM chnical w.intersi EData R e Sheet January 1995, Rev A O T w N r w ct ou RSIL or a t n E co 8-INT 1-88 EL4453 ® FN7171 Video Fader Features The EL4453 is a complete fader subsystem. It variably blends two inputs together for such applications as video picture-in-picture effects. • Complete two-input fader with output amplifier—uses no extra components The EL4453 operates on ±5V to ±15V supplies and has an analog differential input range of ±2V. AC characteristics do not change appreciably over the supply range. The circuit has an operational temperature of -40°C to +85°C and is packaged in 14-pin PDIP and SO-14. The EL4453 is fabricated with Elantec’s proprietary complementary bipolar process which gives excellent signal symmetry and is free from latch up. Pinout • 80MHz bandwidth • Fast fade control speed • Operates on ±5V to ±15V supplies • > 60dB attenuation @ 5MHz Applications • Mixing two inputs • Picture-in-picture • Text overlay onto video • General gain control EL4453 (14-PIN PDIP, SO) TOP VIEW 1 Ordering Information PART NUMBER TEMP. RANGE PACKAGE PKG. NO. EL4453CN -40°C to +85°C 14-Pin PDIP MDP0031 EL4453CS -40°C to +85°C 14-Pin SOIC MDP0027 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright © Intersil Americas Inc. 2003. All Rights Reserved. Elantec is a registered trademark of Elantec Semiconductor, Inc. All other trademarks mentioned are the property of their respective owners. EL4453 Absolute Maximum Ratings (TA = 25°C) V+ VS VIN VIN ∆IIN Positive Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . 16.5V V+ to V- Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . .33V Voltage at any Input or Feedback . . . . . . . . . . . . . . . V+ to VDifference between Pairs of Inputs or Feedback. . . . . . . . .6V Current into any Input, or Feedback Pin . . . . . . . . . . . . . 4mA IOUT PD TA TS Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30mA Maximum Power Dissipation . . . . . . . . . . . . . . . . See Curves Operating Temperature Range . . . . . . . . . . . .-40°C to +85°C Storage Temperature Range- . . . . . . . . . . . . 60°C to +150°C CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests are at the specified temperature and are pulsed tests, therefore: TJ = TC = TA Open-Loop DC Electrical Specifications PARAMETER VDIFF Power Supplies at ±5V, Sum+ = Sum- = 0, TA = 25°C DESCRIPTION VINA, VINB, or Sum Differential Input Voltage Clipping MIN TYP 1.8 2.0 V 0.7 V 0.2% Nonlinearity VCM Common-Mode Range (All Inputs; VDIFF = 0) MAX UNITS VS = ±5V ±2.5 ±2.8 V VS = ±15V ±12.5 ±12.8 V VOS A or B Input Offset Voltage VFADE, 100% Extrapolated Voltage for 100% Gain for VINA 0.9 VFADE, 0% Extrapolated Voltage for 0% Gain for VINA -1.2 IB Input Bias Current (All Inputs) with all VIN = 0 IOS Input Offset Current between VINA+ and VINA-, VINB+ and VINB-, Fade+ and Fade-, and Sum+ and Sum- FT VINA Signal Feedthrough, VFADE = -1.5V NL A or B Input Nonlinearity, VIN between +1V and -1V 25 mV 1.05 1.2 V -1.15 -0.9 V 9 20 µA 0.2 4 µA -100 -60 dB VINA or VINB 0.2 0.5 % Sum Input 0.5 % RIN, Signal Input Resistance, A, B, or Sum Input 230 kΩ RIN, Fade Input Resistance, Fade Input 120 kΩ CMRR Common-Mode Rejection Ratio, VINA or VINB 70 80 dB PSRR Power Supply Rejection Ratio 50 70 dB EG Gain Error, VFADE = 1.5V VO Output Voltage Swing (VIN = 0, VREF Varied) ISC Output Short-Circuit Current IS Supply Current, VS = ±15V 2 VINA or VINB -2 +2 % Sum Input -4 +4 % VS = ±5V ±2.5 ±2.8 V VS = ±15V ±12.5 ±12.8 V 40 85 mA 17 21 mA EL4453 Open-Loop DC Electrical Specifications Power supplies at ±12V, TA = 25°C, RL = 500Ω, CL = 15pF, VFADE = 1.5V, Sum+ = Sum- = 0 PARAMETER DESCRIPTION MIN TYP MAX UNITS BW, -3dB -3dB Small-Signal Bandwidth, VINA or VINB 80 MHz BW, ±0.1dB 0.1dB Flatness Bandwidth, VINA or VINB 9 MHz Peaking Frequency Response Peaking 1.0 dB BW, Fade -3dB Small-Signal Bandwidth, Fade Input 80 MHz SR Slew Rate, VOUT between -2V and +2V 380 V/µs VN Input-Referred Noise Voltage Density 160 nV/Hz FT Feedthrough of Faded-Out Channel, F = 3.58MHz -63 dB dG Differential Gain Error, VOFFSET from 0 to ±0.714V, Fade at 100% VINA or VINB 0.05 % Sum Input 0.35 % Differential Phase Error, VOFFSET from 0 to ±0.71V, Fade at 100% VINA or VINB 0.05 (°) Sum Input 0.1 (°) dθ TBD Test Circuit Note: For typical performance curves Sum+ = Sum- = 0, RF = 0W, RG = ∞, VFADE = +1.5V, and CL = 15pF, unless otherwise noted. 3 EL4453 Typical Performance Curves Frequency Response Frequency Response vs Gain Frequency Response for Various Loads, VS = ±5V Frequency Response for Various Loads, VS = ±15V -3dB Bandwidth and Peaking vs Supply Voltage 4 -3dB Bandwidth and Peaking vs Die Temperature EL4453 Typical Performance Curves (Continued) Frequency Response for Different Gains, VS = ±5V VIN Differential Gain and Phase Error vs Gain VIN Differential Phase Error vs Input Offset Voltage for Gain = 100%, 75%, 50% and 25%. VS = ±5V 5 Input Common-Mode Rejection Ratio vs Frequency Input Voltage and Current Noise vs Frequency VIN Differential Gain Error vs Input Offset Voltage for Gain = 100%, 75%, 50% and 25% VIN Differential Phase Error vs Input Offset Voltage for Gain = 100%, 75%, 50% and 25%. VS = ±12V EL4453 Typical Performance Curves (Continued) Nonlinearity vs VIN Signal Span Slew Rate vs Supply Voltage VINA Gain vs VFADE 6 Nonlinearity vs Sum Signal Span Slew Rate vs Die Temperature Frequency Response of Fade Input EL4453 Typical Performance Curves (Continued) Transient Response of Fade Input Constant Signal into VINA VINA Transient Response for Various Gains Supply Current vs Supply Voltage 7 Overdrive Recovery Glitch from VFADE, No Input Signal Cross-Fade Balance with VINA = VINB = 0 Supply Current vs Die Temperature EL4453 FIGURE 1. Applications Information The EL4453 is a complete two-quadrant fader/gain control with 80MHz bandwidth. It has four sets of inputs; a differential signal input VINA, a differential signal input VINB, a differential fade-controlling input VFADE, and another differential input Sum which can be used to add in a third input at full gain. This is the general connection of the EL4453 (Figure 1). The gain of the feedback dividers are HA and HB, and 0 ≤ H ≤ 1. The transfer function of the part is: VOUT = AO × [((VINA+) – HA × VOUT) × (1 + (VFADE+) - (VFADE-)) / 2 + ((VINB+) – HB × VOUT) × (1 - (VFADE+) + (VFADE-)) / 2 + (Sum+) – (Sum-))], with -1 ≤ (VFADE+)–(VFADE-) ≤ +1 numerically. AO is the open-loop gain of the amplifier, and is about 600. The large value of AO drives: ((VINA+) – HA × VOUT) × (1 + (VFADE+) – (VFADE-)) / 2 + ((VINB+) – HB × VOUT) × (1- (VFADE+) + (VFADE-)) / 2 + (Sum+) – (Sum-))→0. Rearranging and substituting: F × V IN A + F × V IN B + Sum V OUT = ------------------------------------------------------------------------F × HA + F × HB F = ( 1 + ( V FADE+ ) – ( V FADE- ) ) ⁄ 2 F = ( 1 – ( V FADE+ ) + ( V FADE- ) ) ⁄ 2 and Sum = ( Sum+ ) – ( Sum- ) Where In the above equations, F represents the fade amount, with F = 1 giving 100% gain on VINA but 0% for VINB; F = 0 giving 0% gain for VINA but 100% to VINB. F is 1 - F, the complement of the fade gain. When F = 1, V IN A + Sum V OUT = --------------------------------HA 8 and the amplifier passes VINA and Sum with a gain of 1/HA. Similarly, for F = 0, V IN B + Sum V OUT = --------------------------------HA and the gains vary linearly between fade extremes. The EL4453 is stable for a direct connection between VOUT and VINA- or VINB-, yielding a gain of +1. The feedback divider may be used for higher output gain, although with the traditional loss of bandwidth. It is important to keep the feedback divider’s impedances low so that stray capacitance does not diminish the feedback loop’s phase margin. The pole caused by the parallel impedance of the feedback resistors and stray capacitance should be at least 150MHz; typical strays of 3pF thus require a feedback impedance of 360Ω or less. Alternatively, a small capacitor across RF can be used to create more of a frequency-compensated divider. The value of the capacitor should scale with the parasitic capacitance at the FB input. It is also practical to place small capacitors across both the feedback resistors (whose values maintain the desired gain) to swamp out parasitics. For instance, two 10pF capacitors across equal divider resistors for a gain of two will dominate parasitic effects and allow a higher divider resistance. Either input channel can be set up for inverting gain using traditional feedback resistor connections. At 100% gain, an input stage operates just like an op-amp’s input, and the gain error is very low, around -0.2%. Furthermore, nonlinearities are vastly improved since the gain core sees only small error signals, not full inputs. Unfortunately, distortions increase at lower fade gains for a given input channel. The Sum pins can be used to inject an additional input signal, but it is not as linear as the VIN paths. The gain error is also not as good as the main inputs, being about 1%. Both sum pins should be grounded if they are not to be used. EL4453 Fade-Control Characteristics The quantity VFADE in the above equations is bounded as -1 ≤ VFADE ≤ 1, even though the externally applied voltages often exceed this range. Actually, the gain transfer function around -1V and +1V is “soft”, that is, the gain does not clip abruptly below the 0%-VFADE voltage or above the 100%– VFADE level. An overdrive of 0.3V must be applied to VFADE to obtain truly 0% or 100%. Because the 0% = or 100%VFADE levels cannot be precisely determined, they are extrapolated from two points measured inside the slope of the gain transfer curve. Generally, an applied VFADE range of -1.5V to +1.5V will assure the full span of numerical -1 ≤ VFADE ≤ 1 and 0 ≤ F ≤1. The fade control has a small-signal bandwidth equal to the VIN channel bandwidth, and overload recovery resolves in about 20ns. tantalum capacitors are very good, and no smaller bypasses need be placed in parallel. Capacitors as small as 0.01µF can be used if small load currents flow. Singe-polarity supplies, such as +12V with +5V can be used, where the ground pin is connected to +5V and V- to ground. The inputs and outputs will have to have their levels shifted above ground to accommodate the lack of negative supply. The dissipation of the fader increases with power supply voltage, and this must be compatible with the package chosen. This is a close estimate for the dissipation of a circuit: PD = 2×VS, max×VS+(VS-VO)×VO/RPAR where IS, max is the maximum supply current Input Connections VS is the ± supply voltage (assumed equal) The input transistors can be driven from resistive and capacitive sources, but are capable of oscillation when presented with an inductive input. It takes about 80nH of series inductance to make the inputs actually oscillate, equivalent to four inches of unshielded wiring or about six inches of unterminated input transmission line. The oscillation has a characteristic frequency of 500MHz. Often placing one’s finger (via a metal probe) or an oscilloscope probe on the input will kill the oscillation. Normal high frequency construction obviates any such problems, where the input source is reasonably close to the fader input. If this is not possible, one can insert series resistors of around 51Ω to de-Q the inputs. VO is the output voltage Signal Amplitudes Signal input common-mode voltage must be between (V-) + 2.5V and (V+) - 2.5V to ensure linearity. Additionally, the differential voltage on any input stage must be limited to ±6V to prevent damage. The differential signal range is ±2V in the EL4453. The input range is substantially constant with temperature. The Ground Pin The ground pin draws only 6µA maximum DC current, and may be biased anywhere between (V-) +2.5V and (V+) - 3.5V. The ground pin is connected to the IC’s substrate and frequency compensation components. It serves as a shield within the IC and enhances input stage CMRR and channel-to-channel isolation over frequency, and if connected to a potential other than ground, it must be bypassed. Power Supplies The EL4453 works well on any supplies from ±3V to ±15V. The supplies may be of different voltages as long as the requirements of the GND pin are observed (see the Ground Pin section for a discussion). The supplies should be bypassed close to the device with short leads. 4.7µF 9 RPAR is the parallel of all resistors loading the output For instance, the EL4453 draws a maximum of 21 mA. With light loading, RPAR→∞ and the dissipation with ±5V supplies is 210mW. The maximum supply voltage that the device can run on for a given PD and the other parameters is: VS, max = (PD+VO2/RPAR)/(2IS+VO/RPAR) The maximum dissipation a package can offer is: PD, max = (TD, max - TA, max)/θJA where TD, max is the maximum die temperature, 150°C for reliability, less to retain optimum electrical performance TA, max is the ambient temperature, 70°C for commercial and 85°C for industrial range θJA is the thermal resistance of the mounted package, obtained from datasheet dissipation curves The more difficult case is the SO-14 package. With a maximum die temperature of 150°C and a maximum ambient temperature of 70°C, the 80°C temperature rise and package thermal resistance of 110°/W gives a dissipation of 636mW at 85°C. This allows ±15V operation over the commercial temperature range, but higher ambient temperature or output loading may require lower supply voltages. Output Loading The output stage of the EL4453 is very powerful. It typically can source 80mA and sink 120mA. Of course, this is too much current to sustain and the part will eventually be destroyed by excessive dissipation or by metal traces on the die opening. The metal traces are completely reliable while delivering the 30mA continuous output given in the Absolute EL4453 Maximum Ratings table in this data sheet, or higher purely transient currents. Gain changes only 0.2% from no load to 100Ω load. Heavy resistive loading will degrade frequency response and video distortion for loads < 100Ω. Capacitive loads will cause peaking in the frequency response. If capacitive loads must be driven, a small-valued series resistor can be used to isolate it. 12Ω to 51Ω should suffice. A 22Ω series resistor will limit peaking to 2.5dB with even a 220pF load. All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 10