Data Sheet

74HC4852-Q100; 74HCT4852-Q100
Dual 4-channel analog multiplexer/demultiplexer with
injection-current effect control
Rev. 1 — 12 July 2012
Product data sheet
1. General description
The 74HC4852-Q100; 74HCT4852-Q100 are high-speed Si-gate CMOS devices and are
specified in compliance with JEDEC standard no. 7A.
The 74HC4852-Q100; 74HCT4852-Q100 are dual 4-channel analog
multiplexers/demultiplexers with common select inputs (S0 and S1). Both multiplexers
have a common active LOW enable input (E), four independent inputs/outputs (nY0 to
nY3) and two common inputs/outputs (1Z, 2Z). The devices feature injection-current effect
control, which has excellent value in automotive applications where voltages in excess of
the supply voltage are common.
With E LOW, two of the eight switches are selected (low impedance ON-state) by S0 and
S1. With E HIGH, all switches are in the high-impedance OFF-state, independent of S0
and S1.
The injection-current effect control allows signals at disabled analog input channels to
exceed the supply voltage without affecting the signal of the enabled analog channel. This
eliminates the need for external diode/resistor networks typically used to keep the analog
channel signals within the supply-voltage range.
This product has been qualified to the Automotive Electronics Council (AEC) standard
Q100 (Grade 1) and is suitable for use in automotive applications.
2. Features and benefits
 Automotive product qualification in accordance with AEC-Q100 (Grade 1)
 Specified from 40 C to +85 C and from 40 C to +125 C
 Injection-current cross coupling < 1 mV/mA
 Wide supply voltage range from 2.0 V to 6.0 V for 74HC4852-Q100
 ESD protection:
 MIL-STD-883, method 3015 exceeds 2000 V
 HBM JESD22-A114F exceeds 2000 V
 MM JESD22-A115-A exceeds 200 V (C = 200 pf, R = 0 )
 Latch-up performance exceeds 100 mA per JESD 78 Class II level A
 Low ON-state resistance:
 400  (typical) at VCC = 2.0 V
 215  (typical) at VCC = 3.0 V
 120  (typical) at VCC = 3.3 V
 76  (typical) at VCC = 4.5 V
 59  (typical) at VCC = 6.0 V
74HC4852-Q100; 74HCT4852-Q100
NXP Semiconductors
Dual 4-channel analog multiplexer/demultiplexer with injection-current
effect control
3. Applications




Analog multiplexing and demultiplexing
Digital multiplexing and demultiplexing
Signal gating
Automotive application
4. Ordering information
Table 1.
Ordering information
Type number
Package
74HC4852D-Q100
Temperature range Name
Description
Version
40 C to +125 C
SO16
plastic small outline package; 16 leads;
body width 3.9 mm
SOT109-1
40 C to +125 C
TSSOP16
plastic thin shrink small outline package; 16 leads; SOT403-1
body width 4.4 mm
40 C to +125 C
DHVQFN16 plastic dual in-line compatible thermal enhanced
very thin quad flat package; no leads; 16
terminals; body 2.5  3.5  0.85 mm
74HCT4852D-Q100
74HC4852PW-Q100
74HCT4852PW-Q100
74HC4852BQ-Q100
74HCT4852BQ-Q100
SOT763-1
5. Functional diagram
10
9
13
1Z
10
S0
6
1Y0
12
1Y1
14
1Y2
15
0
4×
1
G4
MUX/DMUX
0
3
9
6
S1
E
2Z
1Y3
11
2Y0
1
2Y1
5
2Y2
2
2Y3
4
0
3
1
2
3
0
13
1
2
3
3
Fig 1.
Logic symbol
74HC_HCT4852_Q100
Product data sheet
001aag093
1
5
2
4
12
14
15
11
001aag094
Fig 2.
IEC logic symbol
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 12 July 2012
© NXP B.V. 2012. All rights reserved.
2 of 21
74HC4852-Q100; 74HCT4852-Q100
NXP Semiconductors
Dual 4-channel analog multiplexer/demultiplexer with injection-current
effect control
VCC
16
S0
10
1-OF-4
DECODER
S1
E
9
6
INJECTION
CURRENT
CONTROL
13
INJECTION
CURRENT
CONTROL
12
INJECTION
CURRENT
CONTROL
14
INJECTION
CURRENT
CONTROL
15
INJECTION
CURRENT
CONTROL
11
INJECTION
CURRENT
CONTROL
1
INJECTION
CURRENT
CONTROL
5
INJECTION
CURRENT
CONTROL
2
INJECTION
CURRENT
CONTROL
4
INJECTION
CURRENT
CONTROL
3
1Z
1Y0
1Y1
1Y2
1Y3
2Y0
2Y1
2Y2
2Y3
2Z
GND
8
Fig 3.
001aag095
Functional diagram
74HC_HCT4852_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 12 July 2012
© NXP B.V. 2012. All rights reserved.
3 of 21
74HC4852-Q100; 74HCT4852-Q100
NXP Semiconductors
Dual 4-channel analog multiplexer/demultiplexer with injection-current
effect control
6. Pinning information
6.1 Pinning
74HC4852-Q100
74HCT4852-Q100
2Z
3
14 1Y1
2Y3
4
13 1Z
2Y1
5
12 1Y0
E
6
11 1Y3
n.c.
7
10 S0
GND
8
9
2Y0
15 1Y2
1
2
2Y2
2
15 1Y2
2Z
3
14 1Y1
2Y3
4
13 1Z
2Y1
5
12 1Y0
E
6
n.c.
7
S1
GND(1)
11 1Y3
10 S0
9
2Y2
terminal 1
index area
8
16 VCC
S1
1
GND
2Y0
16 VCC
74HC4852-Q100
74HCT4852-Q100
aaa-003470
Transparent top view
aaa-003469
(1) This is not a supply pin. The substrate is attached to this
pad using conductive die attach material. There is no
electrical or mechanical requirement to solder this pad.
However, if it is soldered, the solder land should remain
floating or be connected to GND.
Fig 4.
Pin configuration SO16 and TSSOP16
Fig 5.
Pin configuration DHVQFN16
6.2 Pin description
Table 2.
Pin description
Symbol
Pin
Description
2Y0
1
independent input/output
2Y2
2
independent input/output
2Z
3
common input/output
2Y3
4
independent input/output
2Y1
5
independent input/output
E
6
enable input (active LOW)
n.c.
7
not connected
GND
8
ground (0 V)
S1
9
select input
S0
10
select input
1Y3
11
independent input/output
1Y0
12
independent input/output
1Z
13
common input/output
1Y1
14
independent input/output
1Y2
15
independent input/output
VCC
16
supply voltage
74HC_HCT4852_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 12 July 2012
© NXP B.V. 2012. All rights reserved.
4 of 21
74HC4852-Q100; 74HCT4852-Q100
NXP Semiconductors
Dual 4-channel analog multiplexer/demultiplexer with injection-current
effect control
7. Functional description
Table 3.
Function table[1]
Input
Channel ON
E
S1
S0
L
L
L
L
L
H
nY1 to nZ
L
H
L
nY2 to nZ
L
H
H
nY3 to nZ
H
X
X
-
[1]
nY0 to nZ
H = HIGH voltage level;
L = LOW voltage level;
X = don’t care.
8. Limiting values
Table 4.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
Parameter
VCC
supply voltage
VI
input voltage
VSW
switch voltage
Conditions
Min
Max
Unit
0.5
+7.0
V
[1]
0.5
VCC + 0.5
V
[2]
0.5
VCC + 0.5
V
IIK
input clamping current
VI < 0.5 V or VI > VCC + 0.5 V
-
20
mA
ISK
switch clamping current
VSW < 0.5 V or VSW > VCC + 0.5 V
-
20
mA
ISW
switch current
VSW > 0.5 V or VSW < VCC + 0.5 V
-
25
mA
ICC
supply current
-
50
mA
IGND
ground current
50
-
mA
Tstg
storage temperature
65
+150
C
-
500
mW
total power dissipation
Ptot
Tamb = 40 C to +125 C
[3]
[1]
The minimum and maximum input voltage rating may be exceeded if the input clamping current rating is observed.
[2]
The minimum and maximum switch voltage rating may be exceeded if the switch clamping current rating is observed.
[3]
For SO16 package: Ptot derates linearly with 8 mW/K above 70 C.
For TSSOP16 package: Ptot derates linearly with 5.5 mW/K above 60 C.
For DHVQFN16 packages: Ptot derates linearly with 4.5 mW/K above 60 C.
74HC_HCT4852_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 12 July 2012
© NXP B.V. 2012. All rights reserved.
5 of 21
74HC4852-Q100; 74HCT4852-Q100
NXP Semiconductors
Dual 4-channel analog multiplexer/demultiplexer with injection-current
effect control
9. Recommended operating conditions
Table 5.
Symbol
Recommended operating conditions
Parameter
Conditions
VCC
supply voltage
74HC4852-Q100
74HCT4852-Q100
Min
Typ
Unit
Min
Typ
Max
Max
2.0
-
6.0
4.5
5.0
5.5
V
VI
input voltage
0
-
VCC
0
-
VCC
V
VSW
switch voltage
0
-
VCC
0
-
VCC
V
Tamb
ambient temperature
40
-
+125
40
-
+125
C
t/V
input transition rise and
fall rate
VCC = 2.0 V
-
6.0
1000
-
-
-
ns/V
VCC = 3.0 V
-
6.0
800
-
-
-
ns/V
VCC = 3.3 V
-
6.0
800
-
-
-
ns/V
VCC = 4.5 V
-
6.0
500
-
6.0
500
ns/V
VCC = 6.0 V
-
6.0
400
-
-
-
ns/V
10. Static characteristics
Table 6.
RON resistance
At recommended operating conditions; voltages are referenced to GND (ground 0 V); For test circuit see Figure 8.
Symbol
Parameter
25 C
Conditions
40 C to +85 C 40 C to +125 C Unit
Min
Typ
Max
Min
Max
Min
Max
RON(peak) ON resistance VI = VCC to GND; E = VIL
(peak)
VCC = 2.0 V; ISW = 2 mA
-
400
650
-
670
-
700

VCC = 3.0 V; ISW  2 mA
-
215
330
-
360
-
380

VCC = 3.3 V; ISW 2 mA
-
120
270
-
305
-
345

VCC = 4.5 V; ISW 2 mA
-
76
210
-
240
-
270

VCC = 6.0 V; ISW 2 mA
-
59
195
-
220
-
250

-
4
10
-
15
-
20

-
2
8
-
12
-
16

74HC4852-Q100
RON
ON resistance VI = 0.5  VCC; E = VIL
mismatch
VCC = 2.0 V; ISW = 2 mA
between
VCC = 3.0 V; ISW  2 mA
channels
VCC = 3.3 V; ISW 2 mA
-
2
8
-
12
-
16

VCC = 4.5 V; ISW 2 mA
-
2
8
-
12
-
16

VCC = 6.0 V; ISW 2 mA
-
3
9
-
13
-
18

RON(peak) ON resistance VI = VCC to GND; E = VIL
(peak)
VCC = 4.5 V; ISW 2 mA
-
76
210
-
240
-
270

-
2
8
-
12
-
16

74HCT4852-Q100
RON
ON resistance VI = 0.5  VCC; E = VIL
mismatch
VCC = 4.5 V; ISW 2 mA
between
channels
74HC_HCT4852_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 12 July 2012
© NXP B.V. 2012. All rights reserved.
6 of 21
74HC4852-Q100; 74HCT4852-Q100
NXP Semiconductors
Dual 4-channel analog multiplexer/demultiplexer with injection-current
effect control
Table 7.
Injection current coupling
At recommended operating conditions; voltages are referenced to GND (ground 0 V); For test circuit see Figure 9.
Symbol
Parameter
Conditions
74HC4852/Q100
74HCT4852/Q100
Min
Typ[1]
Max
Min
Typ[1]
Unit
Max
VCC = 3.3 V
-
0.05
1
-
-
-
mV
VCC = 5.0 V
-
0.03
1
-
0.03
1
mV
VCC = 3.3 V
-
0.55
5
-
-
-
mV
VCC = 5.0 V
-
0.27
5
-
0.27
5
mV
VCC = 3.3 V
-
0.04
2
-
-
-
mV
VCC = 5.0 V
-
0.03
2
-
0.03
2
mV
VCC = 3.3 V
-
0.56
20
-
-
-
mV
VCC = 5.0 V
-
0.48
20
-
0.48
20
mV
Tamb = 40 C to +125 C
VO
ISW  1 mA; RS 3.9 k
output voltage
variation
[2][3]
ISW  10 mA; RS 3.9 k
ISW  1 mA; RS 20 k
ISW  10 mA; RS 20 k
[1]
Typical values are measured at Tamb = 25 C.
[2]
VO here is the maximum variation of output voltage of an enabled analog channel when current is injected into any disabled channel.
[3]
ISW = total current injected into all disabled channels.
Table 8.
Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground 0 V).
25 C
Symbol Parameter
Conditions
40 C to +85 C 40 C to +125 C
Min
Typ
Max
Min
Max
Min
Max
Unit
VCC = 2.0 V
1.5
-
-
1.5
-
1.5
-
V
VCC = 3.0 V
2.1
-
-
2.1
-
2.1
-
V
74HC4852-Q100
VIH
VIL
II
HIGH-level
input
voltage
LOW-level
input
voltage
input
leakage
current
74HC_HCT4852_Q100
Product data sheet
control inputs
VCC = 3.3 V
2.3
-
-
2.3
-
2.3
-
V
VCC = 4.5 V
3.15
-
-
3.15
-
3.15
-
V
VCC = 6.0 V
4.2
-
-
4.2
-
4.2
-
V
VCC = 2.0 V
-
-
0.5
-
0.5
-
0.5
V
VCC = 3.0 V
-
-
0.9
-
0.9
-
0.9
V
VCC = 3.3 V
-
-
1.0
-
1.0
-
1.0
V
VCC = 4.5 V
-
-
1.35
-
1.35
-
1.35
V
VCC = 6.0 V
-
-
1.8
-
1.8
-
1.8
V
-
-
0.1
-
0.1
-
1.0
A
control inputs
control inputs;
VI = GND or VCC
VCC = 6.0 V
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 12 July 2012
© NXP B.V. 2012. All rights reserved.
7 of 21
74HC4852-Q100; 74HCT4852-Q100
NXP Semiconductors
Dual 4-channel analog multiplexer/demultiplexer with injection-current
effect control
Table 8.
Static characteristics …continued
At recommended operating conditions; voltages are referenced to GND (ground 0 V).
25 C
Symbol Parameter
Conditions
IS(OFF)
E = VIH; VI = GND or VCC;
VO = VCC or GND; VCC = 6.0
V; see Figure 6
OFF-state
leakage
current
40 C to +85 C 40 C to +125 C
Min
Typ
Max
Min
Max
Min
Max
Unit
nYn; per channel
-
-
0.1
-
0.5
-
1.0
A
nZ; all channels
-
-
0.2
-
2.0
-
4.0
A
-
-
0.1
-
0.5
-
1.0
A
IS(ON)
ON-state
leakage
current
E = VIL; VI = GND or VCC;
VO = VCC or GND; VCC = 6.0
V; see Figure 7
ICC
supply
current
VI = GND or VCC
-
-
2.0
-
5.0
-
20.0
A
CI
input
S0, S1, S2 and E
capacitance
-
2
10
-
10
-
10
pF
Csw
switch
nZ; OFF-state
capacitance nYn; OFF-state
-
15
40
-
40
-
40
pF
-
3
15
-
15
-
15
pF
2.0
-
-
2.0
-
2.0
-
V
-
-
0.8
-
0.8
-
0.8
V
-
-
0.1
-
0.1
-
1.0
A
per channel
-
-
0.1
-
0.5
-
1.0
A
all channels
-
-
0.2
-
2.0
-
4.0
A
-
-
0.1
-
0.5
-
1.0
A
VCC = 6.0 V
74HCT4852-Q100
VIH
VIL
II
IS(OFF)
HIGH-level
input
voltage
control inputs
LOW-level
input
voltage
control inputs
input
leakage
current
control inputs;
VI = GND or VCC
OFF-state
leakage
current
E = VIH; VI = GND or VCC;
VO = VCC or GND;
VCC = 5.5 V; see Figure 6
VCC = 4.5 V to 5.5 V
VCC = 4.5 V to 5.5 V
VCC = 5.5 V
IS(ON)
ON-state
leakage
current
E = VIL; VI = GND or VCC;
VO = VCC or GND;
VCC = 5.5 V; see Figure 7
ICC
supply
current
VI = GND or VCC
ICC
additional
supply
current
control inputs;
VI = VCC  2.1 V;
other inputs at VCC or GND;
VCC = 4.5 V to 5.5 V; IO = 0 A
CI
Csw
-
-
2.0
-
5.0
-
20.0
A
-
-
300
-
370
-
370
A
input
S0, S1, S2 and E
capacitance
-
2
10
-
10
-
10
pF
switch
nZ; OFF-state
capacitance
-
9
40
-
40
-
40
pF
-
3
15
-
15
-
15
pF
VCC = 5.5 V
nYn; OFF-state
74HC_HCT4852_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 12 July 2012
© NXP B.V. 2012. All rights reserved.
8 of 21
74HC4852-Q100; 74HCT4852-Q100
NXP Semiconductors
Dual 4-channel analog multiplexer/demultiplexer with injection-current
effect control
VCC
IS
selected channel(1)
nYn
VI
nZ
n.c.
VCC
E
VIH
IS
E
VIL
nYn
nZ
nYn
IS
any disabled channel
GND
VI
VO
VO
GND
001aag099
001aag098
(1) Channel is selected by S0 and S1.
Fig 6.
Test circuit for measuring OFF-state leakage
current
Fig 7.
Test circuit for measuring ON-state leakage
current
VCC
nYn
VI(1)
any disabled channel
ISW
nZ
VSW
V
VCC
E
VIL
VIL
E
VI(2)
nYn
selected channel(1)
nYn
VI
nZ
RS
GND
ISW
GND
VO
VI
001aag101
001aag100
RON = VSW / ISW.
(1) Channel is selected by S0 and S1.
VI(1) < GND or VI(1) > VCC.
GND < VI(2) < VCC.
Fig 8.
Test circuit for measuring ON resistance
74HC_HCT4852_Q100
Product data sheet
Fig 9.
Test circuit for injection current coupling
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 12 July 2012
© NXP B.V. 2012. All rights reserved.
9 of 21
NXP Semiconductors
74HC4852-Q100; 74HCT4852-Q100
Dual 4-channel analog multiplexer/demultiplexer with injection-current
effect control
11. Dynamic characteristics
Table 9.
Dynamic characteristics
At recommended operating conditions; voltages are referenced to GND (ground 0 V); for load circuit see Figure 14.
Symbol Parameter
25 C
Conditions
40 C to +85 C 40 C to +125 C Unit
Min
Typ
Max
Min
Max
Min
Max
2.2
9.3
33
2.2
34
2.2
35
VCC = 3.0 V
2.2
4.9
16.5
1.9
18
1.9
19.5
ns
VCC = 3.3 V
2.0
4.4
15.0
1.6
16.5
1.6
18.5
ns
VCC = 4.5 V
1.6
3.2
11.6
1.1
12.5
1.1
13.5
ns
1.5
2.5
10.2
0.9
11
0.9
12
ns
VCC = 2.0 V
7.7
16.8
38
6.3
40
6.3
42
ns
VCC = 3.0 V
4.9
8.8
20
3.9
21.5
3.9
23
ns
74HC4852-Q100
tpd
propagation delay
nZ, nYn to nYn, nZ;
see Figure 10
[1]
VCC = 2.0 V
VCC = 6.0 V
Sn to nZ, nYn;
see Figure 11
[1]
VCC = 3.3 V
4.4
7.9
17.5
3.4
19
3.4
22
ns
VCC = 4.5 V
3.2
5.8
14
2.3
15
2.3
17
ns
2.4
4.8
12.6
1.6
14.5
1.6
16.5
ns
VCC = 2.0 V
10.5
20.5
47.5
8.5
52.5
8.5
57.5
ns
VCC = 3.0 V
6.2
10.6
45
5.2
50
5.2
55
ns
VCC = 3.3 V
5.6
9.4
42.5
4.6
47.5
4.6
52.5
ns
VCC = 4.5 V
4.2
6.9
40
3
45
3
50
ns
VCC = 6.0 V
3.2
5.6
39
2.2
40
2.2
40
ns
VCC = 2.0 V
39.5
75.4
100
39.3
105
39
115
ns
VCC = 3.0 V
35.2
69.5
90
35.5
100
35
110
ns
VCC = 3.3 V
34.6
68.1
85
34.6
95
34.5
105
ns
VCC = 4.5 V
28.5
63
80
28.2
90
28
100
ns
14.4
57.9
78
13.5
80
13.0
80
ns
VCC = 3.3 V
-
42
-
-
-
-
-
pF
VCC = 5.0 V
-
47
-
-
-
-
-
pF
VCC = 6.0 V
ten
tdis
enable time
disable time
E to nZ, nYn;
see Figure 12
E to nZ, nYn;
see Figure 12
[2]
[3]
VCC = 6.0 V
CPD
power dissipation
capacitance
74HC_HCT4852_Q100
Product data sheet
ns
per channel;
see Figure 13
[4]
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 12 July 2012
© NXP B.V. 2012. All rights reserved.
10 of 21
74HC4852-Q100; 74HCT4852-Q100
NXP Semiconductors
Dual 4-channel analog multiplexer/demultiplexer with injection-current
effect control
Table 9.
Dynamic characteristics …continued
At recommended operating conditions; voltages are referenced to GND (ground 0 V); for load circuit see Figure 14.
Symbol Parameter
25 C
Conditions
40 C to +85 C 40 C to +125 C Unit
Min
Typ
Max
Min
Max
Min
Max
1.6
3.5
11.5
1.1
12.5
1.1
13.5
ns
3.2
7.6
13
2.3
15
1.6
17
ns
4.2
8.3
25
3.0
30
3.0
35
ns
28.5
61.8
80
28.2
90
28.0
100
ns
-
47
-
-
-
-
-
pF
74HCT4852-Q100
tpd
propagation delay
[1]
nZ, nYn to nYn, nZ;
see Figure 10
VCC = 4.5 V
[1]
Sn to nZ, nYn;
see Figure 11
VCC = 4.5 V
ten
enable time
E to nZ, nYn;
see Figure 12
tdis
disable time
E to nZ, nYn;
see Figure 12
[2]
VCC = 4.5 V
[3]
VCC = 4.5 V
CPD
power dissipation
capacitance
[4]
per channel;
see Figure 13
VCC = 5.0 V
[1]
tpd is the same as tPLH and tPHL.
[2]
ten is the same as tPZH and tPZL.
[3]
tdis is the same as tPLZ and tPHZ.
[4]
CPD is used to determine the dynamic power dissipation (PD in W):
PD = CPD  VCC2  fi + {(CL + Csw)  VCC2  fo} where:
fi = input frequency in MHz;
fo = output frequency in MHz;
{(CL + Csw)  VCC2  fo} = sum of outputs;
CL = output load capacitance in pF;
Csw = switch capacitance in pF;
VCC = supply voltage in V.
12. Waveforms
VCC
nZ or nYn
input
0.5VCC
GND
tPLH
tPHL
VCC
nYn or nZ
output
0.5VCC
GND
001aah578
Fig 10. Input (nZ, nYn) to output (nYn, nZ) propagation delays
74HC_HCT4852_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 12 July 2012
© NXP B.V. 2012. All rights reserved.
11 of 21
74HC4852-Q100; 74HCT4852-Q100
NXP Semiconductors
Dual 4-channel analog multiplexer/demultiplexer with injection-current
effect control
VI
VM
Sn input
GND
tPLH
tPHL
VCC
nYn or nZ
output
VM
GND
001aah579
Measurement points are given in Table 10.
Fig 11. Input (Sn) to output (nYn, nZ) propagation delays
VI
E input
VM
VM
0V
tPLZ
tPZL
VCC
VM
nZ or nYn output
VX
VOL
tPHZ
VOH
tPZH
VY
VM
nZ or nYn output
GND
switch ON
switch OFF
switch ON
001aah580
Measurement points are shown in Table 10.
Logic levels: VOL and VOH are typical output voltage levels that occur with the output load.
Fig 12. Enable and disable times
Table 10.
Measurement points
Type
Input
Output
VM
VI
VM
VX
VY
74HC4852-Q100
0.5VCC
VCC
0.5VCC
VOL + 0.1(VCC  VOL)
0.9VOH
74HCT4852-Q100
1.3 V
3.0 V
0.5VCC
VOL + 0.1(VCC  VOL)
0.9VOH
74HC_HCT4852_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 12 July 2012
© NXP B.V. 2012. All rights reserved.
12 of 21
NXP Semiconductors
74HC4852-Q100; 74HCT4852-Q100
Dual 4-channel analog multiplexer/demultiplexer with injection-current
effect control
VCC
A
nYn
G
selected
channel
Sn
nZ
E
n.c.
nYn
disabled
channel
GND
001aah581
Fig 13. Test circuit for measuring power dissipation capacitance
74HC_HCT4852_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 12 July 2012
© NXP B.V. 2012. All rights reserved.
13 of 21
74HC4852-Q100; 74HCT4852-Q100
NXP Semiconductors
Dual 4-channel analog multiplexer/demultiplexer with injection-current
effect control
VI
tW
90 %
90 %
negative
pulse
VM
0V
tf
tr
tr
tf
VI
90 %
positive
pulse
0V
VM
10 %
VM
VM
10 %
10 %
tW
001aac221
a. Input pulse definition
switch
VCC
VCC
open
RL
G
VI
VO
DUT
CL
RT
GND
001aaf883
Definitions for test circuit:
RL = load resistance.
CL = load capacitance including jig and probe capacitance.
RT = termination resistance should be equal to the output impedance Zo of the pulse generator.
b. Load circuit
Test data is given in Table 11.
Fig 14. Input pulse definition and load circuit
Table 11.
Test data
Test
Input
Output
S1 position
Control E, Sn
Switch nYn (nZ) tr, tf
Switch nZ (nYn)
VI[1]
VI
CL
RL
tPHL, tPLH
VCC
VCC
6 ns
50 pF
-
open
tPHZ, tPZH
VCC
VCC
6 ns
50 pF
10 k
GND
tPLZ, tPZL
VCC
VCC
6 ns
50 pF
10 k
VCC
CPD
VCC
VCC
6 ns
0 pF
-
open
[1]
For 74HCT4852-Q100: input voltage VI = 3.0 V.
74HC_HCT4852_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 12 July 2012
© NXP B.V. 2012. All rights reserved.
14 of 21
74HC4852-Q100; 74HCT4852-Q100
NXP Semiconductors
Dual 4-channel analog multiplexer/demultiplexer with injection-current
effect control
13. Package outline
SO16: plastic small outline package; 16 leads; body width 3.9 mm
SOT109-1
D
E
A
X
c
y
HE
v M A
Z
16
9
Q
A2
A
(A 3)
A1
pin 1 index
θ
Lp
1
L
8
e
0
detail X
w M
bp
2.5
5 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
UNIT
A
max.
A1
A2
A3
bp
c
D (1)
E (1)
e
HE
L
Lp
Q
v
w
y
Z (1)
mm
1.75
0.25
0.10
1.45
1.25
0.25
0.49
0.36
0.25
0.19
10.0
9.8
4.0
3.8
1.27
6.2
5.8
1.05
1.0
0.4
0.7
0.6
0.25
0.25
0.1
0.7
0.3
0.01
0.019 0.0100 0.39
0.014 0.0075 0.38
0.039
0.016
0.028
0.020
inches
0.010 0.057
0.069
0.004 0.049
0.16
0.15
0.05
0.244
0.041
0.228
0.01
0.01
0.028
0.004
0.012
θ
8o
o
0
Note
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.
REFERENCES
OUTLINE
VERSION
IEC
JEDEC
SOT109-1
076E07
MS-012
JEITA
EUROPEAN
PROJECTION
ISSUE DATE
99-12-27
03-02-19
Fig 15. Package outline SOT109-1 (SO16)
74HC_HCT4852_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 12 July 2012
© NXP B.V. 2012. All rights reserved.
15 of 21
74HC4852-Q100; 74HCT4852-Q100
NXP Semiconductors
Dual 4-channel analog multiplexer/demultiplexer with injection-current
effect control
TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4.4 mm
SOT403-1
E
D
A
X
c
y
HE
v M A
Z
9
16
Q
(A 3)
A2
A
A1
pin 1 index
θ
Lp
L
1
8
detail X
w M
bp
e
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
max.
A1
A2
A3
bp
c
D (1)
E (2)
e
HE
L
Lp
Q
v
w
y
Z (1)
θ
mm
1.1
0.15
0.05
0.95
0.80
0.25
0.30
0.19
0.2
0.1
5.1
4.9
4.5
4.3
0.65
6.6
6.2
1
0.75
0.50
0.4
0.3
0.2
0.13
0.1
0.40
0.06
8o
o
0
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.
OUTLINE
VERSION
SOT403-1
REFERENCES
IEC
JEDEC
JEITA
EUROPEAN
PROJECTION
ISSUE DATE
99-12-27
03-02-18
MO-153
Fig 16. Package outline SOT403-1 (TSSOP16)
74HC_HCT4852_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 12 July 2012
© NXP B.V. 2012. All rights reserved.
16 of 21
74HC4852-Q100; 74HCT4852-Q100
NXP Semiconductors
Dual 4-channel analog multiplexer/demultiplexer with injection-current
effect control
DHVQFN16: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads;
SOT763-1
16 terminals; body 2.5 x 3.5 x 0.85 mm
A
B
D
A
A1
E
c
detail X
terminal 1
index area
terminal 1
index area
C
e1
e
2
7
y
y1 C
v M C A B
w M C
b
L
1
8
Eh
e
16
9
15
10
Dh
X
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
mm
A(1)
max.
A1
b
1
0.05
0.00
0.30
0.18
c
D (1)
Dh
E (1)
Eh
0.2
3.6
3.4
2.15
1.85
2.6
2.4
1.15
0.85
e
0.5
e1
L
v
w
y
y1
2.5
0.5
0.3
0.1
0.05
0.05
0.1
Note
1. Plastic or metal protrusions of 0.075 mm maximum per side are not included.
REFERENCES
OUTLINE
VERSION
IEC
JEDEC
JEITA
SOT763-1
---
MO-241
---
EUROPEAN
PROJECTION
ISSUE DATE
02-10-17
03-01-27
Fig 17. Package outline SOT763-1 (DHVQFN16)
74HC_HCT4852_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 12 July 2012
© NXP B.V. 2012. All rights reserved.
17 of 21
NXP Semiconductors
74HC4852-Q100; 74HCT4852-Q100
Dual 4-channel analog multiplexer/demultiplexer with injection-current
effect control
14. Abbreviations
Table 12.
Abbreviations
Acronym
Description
CDM
Charged Device Model
CMOS
Complementary Metal Oxide Semiconductor
DUT
Device Under Test
ESD
ElectroStatic Discharge
HBM
Human Body Model
MM
Machine Model
15. Revision history
Table 13.
Revision history
Document ID
Release date
Data sheet status
Change
notice
Supersedes
74HC_HCT4852_Q100_1
20120712
Product data sheet
-
-
74HC_HCT4852_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 12 July 2012
© NXP B.V. 2012. All rights reserved.
18 of 21
NXP Semiconductors
74HC4852-Q100; 74HCT4852-Q100
Dual 4-channel analog multiplexer/demultiplexer with injection-current
effect control
16. Legal information
16.1 Data sheet status
Document status[1][2]
Product status[3]
Definition
Objective [short] data sheet
Development
This document contains data from the objective specification for product development.
Preliminary [short] data sheet
Qualification
This document contains data from the preliminary specification.
Product [short] data sheet
Production
This document contains the product specification.
[1]
Please consult the most recently issued document before initiating or completing a design.
[2]
The term ‘short data sheet’ is explained in section “Definitions”.
[3]
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
16.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
NXP Semiconductors and its customer, unless NXP Semiconductors and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the NXP Semiconductors product is
deemed to offer functions and qualities beyond those described in the
Product data sheet.
16.3 Disclaimers
Limited warranty and liability — Information in this document is believed to
be accurate and reliable. However, NXP Semiconductors does not give any
representations or warranties, expressed or implied, as to the accuracy or
completeness of such information and shall have no liability for the
consequences of use of such information. NXP Semiconductors takes no
responsibility for the content in this document if provided by an information
source outside of NXP Semiconductors.
In no event shall NXP Semiconductors be liable for any indirect, incidental,
punitive, special or consequential damages (including - without limitation - lost
profits, lost savings, business interruption, costs related to the removal or
replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Notwithstanding any damages that customer might incur for any reason
whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of NXP Semiconductors.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
74HC_HCT4852_Q100
Product data sheet
Suitability for use in automotive applications — This NXP
Semiconductors product has been qualified for use in automotive
applications. Unless otherwise agreed in writing, the product is not designed,
authorized or warranted to be suitable for use in life support, life-critical or
safety-critical systems or equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors and its suppliers accept no liability for
inclusion and/or use of NXP Semiconductors products in such equipment or
applications and therefore such inclusion and/or use is at the customer's own
risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Customers are responsible for the design and operation of their applications
and products using NXP Semiconductors products, and NXP Semiconductors
accepts no liability for any assistance with applications or customer product
design. It is customer’s sole responsibility to determine whether the NXP
Semiconductors product is suitable and fit for the customer’s applications and
products planned, as well as for the planned application and use of
customer’s third party customer(s). Customers should provide appropriate
design and operating safeguards to minimize the risks associated with their
applications and products.
NXP Semiconductors does not accept any liability related to any default,
damage, costs or problem which is based on any weakness or default in the
customer’s applications or products, or the application or use by customer’s
third party customer(s). Customer is responsible for doing all necessary
testing for the customer’s applications and products using NXP
Semiconductors products in order to avoid a default of the applications and
the products or of the application or use by customer’s third party
customer(s). NXP does not accept any liability in this respect.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
Terms and conditions of commercial sale — NXP Semiconductors
products are sold subject to the general terms and conditions of commercial
sale, as published at http://www.nxp.com/profile/terms, unless otherwise
agreed in a valid written individual agreement. In case an individual
agreement is concluded only the terms and conditions of the respective
agreement shall apply. NXP Semiconductors hereby expressly objects to
applying the customer’s general terms and conditions with regard to the
purchase of NXP Semiconductors products by customer.
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 12 July 2012
© NXP B.V. 2012. All rights reserved.
19 of 21
NXP Semiconductors
74HC4852-Q100; 74HCT4852-Q100
Dual 4-channel analog multiplexer/demultiplexer with injection-current
effect control
No offer to sell or license — Nothing in this document may be interpreted or
construed as an offer to sell products that is open for acceptance or the grant,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.
Translations — A non-English (translated) version of a document is for
reference only. The English version shall prevail in case of any discrepancy
between the translated and English versions.
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from competent authorities.
16.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
17. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
74HC_HCT4852_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 12 July 2012
© NXP B.V. 2012. All rights reserved.
20 of 21
NXP Semiconductors
74HC4852-Q100; 74HCT4852-Q100
Dual 4-channel analog multiplexer/demultiplexer with injection-current
effect control
18. Contents
1
2
3
4
5
6
6.1
6.2
7
8
9
10
11
12
13
14
15
16
16.1
16.2
16.3
16.4
17
18
General description . . . . . . . . . . . . . . . . . . . . . . 1
Features and benefits . . . . . . . . . . . . . . . . . . . . 1
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Ordering information . . . . . . . . . . . . . . . . . . . . . 2
Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2
Pinning information . . . . . . . . . . . . . . . . . . . . . . 4
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4
Functional description . . . . . . . . . . . . . . . . . . . 5
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 5
Recommended operating conditions. . . . . . . . 6
Static characteristics. . . . . . . . . . . . . . . . . . . . . 6
Dynamic characteristics . . . . . . . . . . . . . . . . . 10
Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Package outline . . . . . . . . . . . . . . . . . . . . . . . . 15
Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Revision history . . . . . . . . . . . . . . . . . . . . . . . . 18
Legal information. . . . . . . . . . . . . . . . . . . . . . . 19
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 19
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Contact information. . . . . . . . . . . . . . . . . . . . . 20
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2012.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
Date of release: 12 July 2012
Document identifier: 74HC_HCT4852_Q100