74HC238-Q100; 74HCT238-Q100 3-to-8 line decoder/demultiplexer Rev. 1 — 19 February 2013 Product data sheet 1. General description The 74HC_HCT238_Q100 decodes three binary weighted address inputs (A0, A1 and A2) to eight mutually exclusive outputs (Y0 to Y7). The device features three enable inputs (E1, E2 and E3). Every output is LOW unless E1 and E2 are LOW and E3 is HIGH. This multiple enable function allows easy parallel expansion to a 1-of-32 (5 to 32 lines) decoder with just four 74HC_HCT238_Q100 ICs and one inverter. The 74HC_HCT238_Q100 can be used as an eight output demultiplexer by using one of the active LOW enable inputs as the data input and the remaining enable inputs as strobes. Inputs include clamp diodes that enable the use of current limiting resistors to interface inputs to voltages in excess of VCC. This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications. 2. Features and benefits Automotive product qualification in accordance with AEC-Q100 (Grade 1) Specified from 40 C to +85 C and from 40 C to +125 C Input levels: For 74HC238-Q100: CMOS level For 74HCT238-Q100: TTL level Demultiplexing capability Multiple input enable for easy expansion Ideal for memory chip select decoding Active HIGH mutually exclusive outputs Multiple package options Complies with JEDEC standard no. 7A ESD protection: MIL-STD-883, method 3015 exceeds 2000 V HBM JESD22-A114F exceeds 2000 V MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 ) 74HC238-Q100; 74HCT238-Q100 NXP Semiconductors 3-to-8 line decoder/demultiplexer 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74HC238D-Q100 40 C to +125 C SO16 plastic small outline package; 16 leads; body width 3.9 mm SOT109-1 74HC238PW-Q100 40 C to +125 C TSSOP16 plastic thin shrink small outline package; 16 leads; body width 4.4 mm SOT403-1 74HC238BQ-Q100 40 C to +125 C DHVQFN16 plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 16 terminals; body 2.5 3.5 0.85 mm SOT763-1 74HCT238D-Q100 40 C to +125 C SO16 plastic small outline package; 16 leads; body width 3.9 mm SOT109-1 74HCT238PW-Q100 40 C to +125 C TSSOP16 plastic thin shrink small outline package; 16 leads; body width 4.4 mm SOT403-1 74HCT238BQ-Q100 40 C to +125 C DHVQFN16 plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 16 terminals; body 2.5 3.5 0.85 mm SOT763-1 4. Functional diagram 15 A0 A1 A2 1 2 3 3 TO 8 DECODER 15 Y0 14 Y1 13 Y2 ENABLE 12 EXITING 11 Y3 10 Y5 9 Y6 7 Y7 14 A0 A1 A2 E2 E3 Fig 1. 74HC_HCT238_Q100 Product data sheet ENABLE EXITING 12 11 10 7 E2 5 Logic symbol 3 3 TO 8 DECODER 9 4 6 2 Y4 E1 E1 13 1 E3 Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7 4 5 6 001aag753 001aag752 Fig 2. Functional diagram All information provided in this document is subject to legal disclaimers. Rev. 1 — 19 February 2013 © NXP B.V. 2013. All rights reserved. 2 of 17 74HC238-Q100; 74HCT238-Q100 NXP Semiconductors 3-to-8 line decoder/demultiplexer Y0 E1 Y1 E2 Y2 E3 Y3 Y4 Y5 A0 Y6 A1 Y7 A2 001aag754 Fig 3. Logic diagram 5. Pinning information 5.1 Pinning +&4 +&74 $ WHUPLQDO LQGH[DUHD 9&& +&4 +&74 9&& $ < $ < $ < $ < ( < ( ( < < < *1' ( < < < ( *1' < < *1' ( $ < < < DDD 7UDQVSDUHQWWRSYLHZ DDD (1) This is not a supply pin. The substrate is attached to this pad using conductive die attach material. There is no electrical or mechanical requirement to solder this pad. However, if it is soldered, the solder land should remain floating or be connected to GND. Fig 4. Pin configuration SO16 and TSSOP16 74HC_HCT238_Q100 Product data sheet Fig 5. Pin configuration DHVQFN16 All information provided in this document is subject to legal disclaimers. Rev. 1 — 19 February 2013 © NXP B.V. 2013. All rights reserved. 3 of 17 74HC238-Q100; 74HCT238-Q100 NXP Semiconductors 3-to-8 line decoder/demultiplexer 5.2 Pin description Table 2. Pin description Symbol Pin Description A[0:2] 1, 2, 3 address input E1 4 enable input (active LOW) E2 5 enable input (active LOW) E3 6 enable input (active HIGH) Y[0:7] 15, 14, 13, 12, 11, 10, 9, 7 output (active HIGH) GND 8 ground (0 V) VCC 16 supply voltage 6. Functional description Function table[1] Table 3. Inputs Outputs E1 E2 E3 A0 A1 A2 Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7 H X X X X X L L L L L L L L X H X X X X L L L L L L L L X X L X X X L L L L L L L L L L H L L L H L L L L L L L L L H H L L L H L L L L L L L L H L H L L L H L L L L L L L H H H L L L L H L L L L L L H L L H L L L L H L L L L L H H L H L L L L L H L L L L H L H H L L L L L L H L L L H H H H L L L L L L L H [1] H = HIGH voltage level; L = LOW voltage level; X = don’t care. 74HC_HCT238_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 19 February 2013 © NXP B.V. 2013. All rights reserved. 4 of 17 74HC238-Q100; 74HCT238-Q100 NXP Semiconductors 3-to-8 line decoder/demultiplexer 7. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter VCC supply voltage Conditions Min Max Unit 0.5 +7 V - 20 mA - 20 mA - 25 mA 50 mA IIK input clamping current VI < 0.5 V or VI > VCC + 0.5 V [1] IOK output clamping current VO < 0.5 V or VO > VCC + 0.5 V [1] IO output current 0.5 V < VO < VCC + 0.5 V ICC supply current - IGND ground current 50 - mA Tstg storage temperature 65 +150 C - 500 mW [2] total power dissipation Ptot [1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed. [2] For SO16 packages: above 70 C the value of Ptot derates linearly at 8 mW/K. For TSSOP16 packages: above 60 C the value of Ptot derates linearly at 5.5 mW/K. For DHVQFN16 packages: above 60 C the value of Ptot derates linearly at 4.5 mW/K. 8. Recommended operating conditions Table 5. Recommended operating conditions Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions 74HC238-Q100 74HCT238-Q100 Unit Min Typ Max Min Typ Max VCC supply voltage 2.0 5.0 6.0 4.5 5.0 5.5 V VI input voltage 0 - VCC 0 - VCC V VO output voltage 0 - VCC 0 - VCC V Tamb ambient temperature 40 - +125 40 - +125 C t/V input transition rise and fall rate VCC = 2.0 V - - 625 - - - ns/V VCC = 4.5 V - 1.67 139 - 1.67 139 ns/V VCC = 6.0 V - - 83 - - - ns/V 74HC_HCT238_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 19 February 2013 © NXP B.V. 2013. All rights reserved. 5 of 17 74HC238-Q100; 74HCT238-Q100 NXP Semiconductors 3-to-8 line decoder/demultiplexer 9. Static characteristics Table 6. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter 25 C Conditions 40 C to +85 C 40 C to +125 C Unit Min Typ Max Min Max Min Max VCC = 2.0 V 1.5 1.2 - 1.5 - 1.5 - V VCC = 4.5 V 3.15 2.4 - 3.15 - 3.15 - V VCC = 6.0 V 4.2 3.2 - 4.2 - 4.2 - V 74HC238-Q100 VIH VIL VOH VOL HIGH-level input voltage LOW-level input voltage VCC = 2.0 V - 0.8 0.5 - 0.5 - 0.5 V VCC = 4.5 V - 2.1 1.35 - 1.35 - 1.35 V VCC = 6.0 V - 2.8 1.8 - 1.8 - 1.8 V HIGH-level VI = VIH or VIL output voltage IO = 20 A; VCC = 2.0 V 1.9 2.0 - 1.9 - 1.9 - V IO = 20 A; VCC = 4.5 V 4.4 4.5 - 4.4 - 4.4 - V IO = 20 A; VCC = 6.0 V 5.9 6.0 - 5.9 - 5.9 - V IO = 4.0 mA; VCC = 4.5 V 3.98 4.32 - 3.84 - 3.7 - V IO = 5.2 mA; VCC = 6.0 V 5.48 5.81 - 5.34 - 5.2 - V LOW-level VI = VIH or VIL output voltage IO = 20 A; VCC = 2.0 V - 0 0.1 - 0.1 - 0.1 V IO = 20 A; VCC = 4.5 V - 0 0.1 - 0.1 - 0.1 V IO = 20 A; VCC = 6.0 V - 0 0.1 - 0.1 - 0.1 V IO = 4.0 mA; VCC = 4.5 V - 0.15 0.26 - 0.33 - 0.4 V IO = 5.2 mA; VCC = 6.0 V - 0.16 0.26 - 0.33 - 0.4 V - - 0.1 - 1.0 - 1.0 A II input leakage current VI = VCC or GND; VCC = 6.0 V ICC supply current VI = VCC or GND; IO = 0 A; VCC = 6.0 V - - 8.0 - 80 - 160 A CI input capacitance - 3.5 - - - - - pF 74HCT238-Q100 VIH HIGH-level input voltage VCC = 4.5 V to 5.5 V 2.0 1.6 - 2.0 - 2.0 - V VIL LOW-level input voltage VCC = 4.5 V to 5.5 V - 1.2 0.8 - 0.8 - 0.8 V VOH HIGH-level VI = VIH or VIL; VCC = 4.5 V output voltage IO = 20 A 4.4 4.5 - 4.4 - 4.4 - V 3.98 4.32 - 3.84 - 3.7 - V IO = 4.0 mA VOL II LOW-level VI = VIH or VIL; VCC = 4.5 V output voltage IO = 20 A input leakage current 74HC_HCT238_Q100 Product data sheet - 0 0.1 - 0.1 - 0.1 V IO = 4.0 mA - 0.16 0.26 - 0.33 - 0.4 V VI = VCC or GND; VCC = 5.5 V - - 0.1 - 1.0 - 1.0 A All information provided in this document is subject to legal disclaimers. Rev. 1 — 19 February 2013 © NXP B.V. 2013. All rights reserved. 6 of 17 74HC238-Q100; 74HCT238-Q100 NXP Semiconductors 3-to-8 line decoder/demultiplexer Table 6. Static characteristics …continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter 25 C Conditions Min Typ Max Min Max Min Max - - 8.0 - 80 - 160 A An inputs - 70 252 - 315 - 343 A E1, E2 inputs - 40 144 - 180 - 196 A - 145 522 - 653 - 711 A - 3.5 - - - - - pF ICC supply current VI = VCC or GND; VCC = 5.5 V; IO = 0 A ICC additional per input pin; supply current VI = VCC 2.1 V; other inputs at VCC or GND; VCC = 4.5 V to 5.5 V; IO = 0 A E3 input CI 40 C to +85 C 40 C to +125 C Unit input capacitance 10. Dynamic characteristics Table 7. Dynamic characteristics GND = 0 V; test circuit see Figure 8. Symbol Parameter 25 C Conditions 40 C to +125 C Min Typ Max Max (85 C) Max Unit (125 C) VCC = 2.0 V - 47 150 190 225 ns VCC = 4.5 V - 17 30 38 45 ns VCC = 5.0 V; CL = 15 pF - 14 - - - ns - 14 26 33 38 ns VCC = 2.0 V - 52 160 200 240 ns VCC = 4.5 V - 19 32 40 48 ns VCC = 5.0 V; CL = 15 pF - 16 - - - ns - 15 27 34 41 ns VCC = 2.0 V - 50 155 195 235 ns VCC = 4.5 V - 18 31 39 47 ns VCC = 5.0 V; CL = 15 pF - 17 - - - ns VCC = 6.0 V - 14 26 33 40 ns VCC = 2.0 V - 19 75 95 110 ns VCC = 4.5 V - 7 15 19 22 ns VCC = 6.0 V - 6 13 16 19 ns - 72 - - - pF 74HC238-Q100 tpd propagation delay An to Yn; see Figure 6 [1] VCC = 6.0 V E3 to Yn; see Figure 6 [1] VCC = 6.0 V En to Yn or see Figure 7 tt CPD transition time power dissipation capacitance 74HC_HCT238_Q100 Product data sheet see Figure 6 and Figure 7 per package; VI = GND to VCC [1] [2] [3] All information provided in this document is subject to legal disclaimers. Rev. 1 — 19 February 2013 © NXP B.V. 2013. All rights reserved. 7 of 17 74HC238-Q100; 74HCT238-Q100 NXP Semiconductors 3-to-8 line decoder/demultiplexer Table 7. Dynamic characteristics GND = 0 V; test circuit see Figure 8. Symbol Parameter 25 C Conditions 40 C to +125 C Min Typ Max Max (85 C) Max Unit (125 C) - 19 35 44 53 ns - 18 - - - ns - 20 37 46 56 ns - 20 - - - ns 74HCT238-Q100 [1] propagation delay An to Yn; see Figure 6 tpd VCC = 4.5 V VCC = 5.0 V; CL = 15 pF [1] E3 to Yn; see Figure 6 VCC = 4.5 V VCC = 5.0 V; CL = 15 pF [1] En to Yn or see Figure 7 VCC = 4.5 V - 20 35 44 53 ns VCC = 5.0 V; CL = 15 pF - 21 - - - ns tt transition time VCC = 4.5 V; see Figure 6 and Figure 7 [2] - 7 15 19 22 ns CPD power dissipation capacitance per package; VI = GND to VCC 1.5 V [3] - 76 - - - pF [1] tpd is the same as tPHL and tPLH. [2] tt is the same as tTHL and tTLH. [3] CPD is used to determine the dynamic power dissipation (PD in W): PD = CPD VCC2 fi N + (CL VCC2 fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in V; N = number of inputs switching; (CL VCC2 fo) = sum of outputs. 11. Waveforms An, E3 input VM tPHL tPLH VY VM VX Yn output tTHL tTLH 001aag757 Measurement points are given in Table 8. VOL and VOH are typical voltage output levels that occur with the output load. Fig 6. Input (An, E3) to output (Yn) propagation delays and output transition times 74HC_HCT238_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 19 February 2013 © NXP B.V. 2013. All rights reserved. 8 of 17 74HC238-Q100; 74HCT238-Q100 NXP Semiconductors 3-to-8 line decoder/demultiplexer E1, E2 input VM tPHL tPLH VY VM VX Yn output tTHL tTLH 001aag758 Measurement points are given in Table 8. VOL and VOH are typical voltage output levels that occur with the output load. Fig 7. Table 8. Input (E1, E2) to output (Yn) propagation delays and output transition times Measurement points Type Input Output VM VM VX VY 74HC238-Q100 0.5VCC 0.5VCC 0.1VCC 0.9VCC 74HCT238-Q100 1.3 V 1.3 V 0.1VCC 0.9VCC 74HC_HCT238_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 19 February 2013 © NXP B.V. 2013. All rights reserved. 9 of 17 74HC238-Q100; 74HCT238-Q100 NXP Semiconductors 3-to-8 line decoder/demultiplexer VI tW 90 % negative pulse VM 0V VI tf tr tr tf 90 % positive pulse 0V VM 10 % VM VM 10 % tW VCC VCC G VI VO RL S1 open DUT CL RT 001aad983 Test data is given in Table 9. Definitions for test circuit: RT = Termination resistance should be equal to output impedance Zo of the pulse generator. CL = Load capacitance including jig and probe capacitance. RL = Load resistance. S1 = Test selection switch Fig 8. Table 9. Load circuit for measuring switching times Test data Type Input Load S1 position VI tr, tf CL RL tPHL, tPLH 74HC238-Q100 VCC 6 ns 15 pF, 50 pF 1 k open 74HCT238-Q100 3V 6 ns 15 pF, 50 pF 1 k open 74HC_HCT238_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 19 February 2013 © NXP B.V. 2013. All rights reserved. 10 of 17 74HC238-Q100; 74HCT238-Q100 NXP Semiconductors 3-to-8 line decoder/demultiplexer 12. Package outline SO16: plastic small outline package; 16 leads; body width 3.9 mm SOT109-1 D E A X c y HE v M A Z 16 9 Q A2 A (A 3) A1 pin 1 index θ Lp 1 L 8 e 0 detail X w M bp 2.5 5 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y Z (1) mm 1.75 0.25 0.10 1.45 1.25 0.25 0.49 0.36 0.25 0.19 10.0 9.8 4.0 3.8 1.27 6.2 5.8 1.05 1.0 0.4 0.7 0.6 0.25 0.25 0.1 0.7 0.3 0.01 0.019 0.0100 0.39 0.014 0.0075 0.38 0.039 0.016 0.028 0.020 inches 0.010 0.057 0.069 0.004 0.049 0.16 0.15 0.05 0.244 0.041 0.228 0.01 0.01 0.028 0.004 0.012 θ 8o o 0 Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. Fig 9. REFERENCES OUTLINE VERSION IEC JEDEC SOT109-1 076E07 MS-012 JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-19 Package outline SOT109-1 (SO16) 74HC_HCT238_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 19 February 2013 © NXP B.V. 2013. All rights reserved. 11 of 17 74HC238-Q100; 74HCT238-Q100 NXP Semiconductors 3-to-8 line decoder/demultiplexer TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4.4 mm SOT403-1 E D A X c y HE v M A Z 9 16 Q (A 3) A2 A A1 pin 1 index θ Lp L 1 8 e detail X w M bp 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (2) e HE L Lp Q v w y Z (1) θ mm 1.1 0.15 0.05 0.95 0.80 0.25 0.30 0.19 0.2 0.1 5.1 4.9 4.5 4.3 0.65 6.6 6.2 1 0.75 0.50 0.4 0.3 0.2 0.13 0.1 0.40 0.06 8o o 0 Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT403-1 REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-18 MO-153 Fig 10. Package outline SOT403-1 (TSSOP16) 74HC_HCT238_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 19 February 2013 © NXP B.V. 2013. All rights reserved. 12 of 17 74HC238-Q100; 74HCT238-Q100 NXP Semiconductors 3-to-8 line decoder/demultiplexer DHVQFN16: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; SOT763-1 16 terminals; body 2.5 x 3.5 x 0.85 mm A B D A A1 E c detail X terminal 1 index area terminal 1 index area C e1 e 2 7 y y1 C v M C A B w M C b L 1 8 Eh e 16 9 15 10 Dh X 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A(1) max. A1 b 1 0.05 0.00 0.30 0.18 mm c D (1) Dh E (1) Eh 0.2 3.6 3.4 2.15 1.85 2.6 2.4 1.15 0.85 e 0.5 e1 L v w y y1 2.5 0.5 0.3 0.1 0.05 0.05 0.1 Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. REFERENCES OUTLINE VERSION IEC JEDEC JEITA SOT763-1 --- MO-241 --- EUROPEAN PROJECTION ISSUE DATE 02-10-17 03-01-27 Fig 11. Package outline SOT763-1 (DHVQFN16) 74HC_HCT238_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 19 February 2013 © NXP B.V. 2013. All rights reserved. 13 of 17 74HC238-Q100; 74HCT238-Q100 NXP Semiconductors 3-to-8 line decoder/demultiplexer 13. Abbreviations Table 10. Abbreviations Acronym Description CMOS Complementary Metal Oxide Semiconductor DUT Device Under Test ESD ElectroStatic Discharge HBM Human Body Model MM Machine Model MIL Military TTL Transistor-Transistor Logic 14. Revision history Table 11. Revision history Document ID Release date Data sheet status Change notice Supersedes 74HC_HCT238_Q100 v.1 20130219 Product data sheet - 74HC_HCT238_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 19 February 2013 - © NXP B.V. 2013. All rights reserved. 14 of 17 74HC238-Q100; 74HCT238-Q100 NXP Semiconductors 3-to-8 line decoder/demultiplexer 15. Legal information 15.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] Please consult the most recently issued document before initiating or completing a design. [2] The term ‘short data sheet’ is explained in section “Definitions”. [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 15.2 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. 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This document supersedes and replaces all information supplied prior to the publication hereof. 74HC_HCT238_Q100 Product data sheet Suitability for use in automotive applications — This NXP Semiconductors product has been qualified for use in automotive applications. Unless otherwise agreed in writing, the product is not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors and its suppliers accept no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer's own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products, and NXP Semiconductors accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). NXP does not accept any liability in this respect. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of NXP Semiconductors products by customer. All information provided in this document is subject to legal disclaimers. Rev. 1 — 19 February 2013 © NXP B.V. 2013. All rights reserved. 15 of 17 NXP Semiconductors 74HC238-Q100; 74HCT238-Q100 3-to-8 line decoder/demultiplexer No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Translations — A non-English (translated) version of a document is for reference only. The English version shall prevail in case of any discrepancy between the translated and English versions. Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. 15.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 16. Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] 74HC_HCT238_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 19 February 2013 © NXP B.V. 2013. All rights reserved. 16 of 17 NXP Semiconductors 74HC238-Q100; 74HCT238-Q100 3-to-8 line decoder/demultiplexer 17. Contents 1 2 3 4 5 5.1 5.2 6 7 8 9 10 11 12 13 14 15 15.1 15.2 15.3 15.4 16 17 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4 Functional description . . . . . . . . . . . . . . . . . . . 4 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 5 Recommended operating conditions. . . . . . . . 5 Static characteristics. . . . . . . . . . . . . . . . . . . . . 6 Dynamic characteristics . . . . . . . . . . . . . . . . . . 7 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 11 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 14 Legal information. . . . . . . . . . . . . . . . . . . . . . . 15 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 15 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Contact information. . . . . . . . . . . . . . . . . . . . . 16 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2013. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] Date of release: 19 February 2013 Document identifier: 74HC_HCT238_Q100