1 2 3 4 5 6 Revision History Rev. ECO Description Date Approved TP1 1 GND A A 2 1 J1 ED120/2DS PGND TP11 TP10 SW TP2 TP9 LOWDR HIGHDR 1 1 TP8 TP12 GND GND 1 1 PGND PGND 1 1 VIN C1 22uF R1 0 C2 10uF PGND D1 G B0530WS MCP87050 Q1 B S R4 100 U1 6.8nF COMP 4 C10 7 LOWDR PWRGD C11 MCP19035 C5 3.3 0.33uF G VOUT C6 MCP87022 Q2 6 VCC 1 1.5uH/19.5A R6 100uF C7 100uF C8 100uF C9 1uF J2 ED120/2DS 11 1uF 8 BOOT VIN 5 68pF PHASE TP14 L1 9 1 2 7.5k FB 3 GND C4 10 HIGHDR D SHDN 2 S 1 R5 TP13 1 R3 100k 1 B R2 22uF D 5.1k TP3 C3 R7 PGOOD TP15 100k R8 C12 4.7uF 0805 1 Q3 2N7002-7-F 5.1k 1 TP4 PGND C PGND GND PGND PGND C R9 5.1k R11 TP5 PGOOD R10 20k 49.9 1 PGOOD R12 R14 TP6 R13 C13 750 820pF 10k 1 10k TP19 TP16 GND 1 1 GND 1 TP17 TP18 1 CH A CH B EXTPGOOD SGND SGND SGND SGND TP7 GND NET_TIE_0.5mm 1 0 NT1 SGND SGND Drawn PGND Sergiu Oprea Checked D Printed 10/17/2012 1 2 3 4 Date Approved Date Approved Date Approved Date at 9:26:49 AM Template FileName 02-03-2011 Date Title D MCP19035 300kHz Evaluation Board Size B B_Microchip SCH.SchDoc Doc. Number Rev. 103-00434 2.0 Sheet 1 of 1 5 6