Data Sheet

74HC1G14-Q100; 74HCT1G14-Q100
Inverting Schmitt trigger
Rev. 2 — 27 December 2012
Product data sheet
1. General description
74HC1G14-Q100 and 74HCT1G14-Q100 are high-speed Si-gate CMOS devices. They
provide an inverting buffer function with Schmitt trigger action. These devices are capable
of transforming slowly changing input signals into sharply defined, jitter-free output
signals.
The HC device has CMOS input switching levels and supply voltage range 2 V to 6 V.
The HCT device has TTL input switching levels and supply voltage range 4.5 V to 5.5 V.
The standard output currents are half of those of the 74HC14-Q100 and 74HCT14-Q100.
This product has been qualified to the Automotive Electronics Council (AEC) standard
Q100 (Grade 1) and is suitable for use in automotive applications.
2. Features and benefits
 Automotive product qualification in accordance with AEC-Q100 (Grade 1)
 Specified from 40 C to +85 C and from 40 C to +125 C
 Input levels:
 For 74HC1G14-Q100: CMOS level
 For 74HCT1G14-Q100: TTL level
 Symmetrical output impedance
 High noise immunity
 Low power dissipation
 Balanced propagation delays
 ESD protection:
 MIL-STD-883, method 3015 exceeds 2000 V
 HBM JESD22-A114F exceeds 2000 V
 MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 )
 SOT353-1 and SOT753 package options
3. Applications
 Wave and pulse shapers
 Astable multivibrators
 Monostable multivibrators
74HC1G14-Q100; 74HCT1G14-Q100
NXP Semiconductors
Inverting Schmitt trigger
4. Ordering information
Table 1.
Ordering information
Type number
Package
74HC1G14GW-Q100
Temperature range
Name
Description
Version
40 C to +125 C
TSSOP5
plastic thin shrink small outline package;
5 leads; body width 1.25 mm
SOT353-1
40 C to +125 C
SC-74A
plastic surface-mounted package; 5 leads
SOT753
74HCT1G14GW-Q100
74HC1G14GV-Q100
74HCT1G14GV-Q100
5. Marking
Table 2.
Marking codes
Type number
Marking code[1]
74HC1G14GW-Q100
HF
74HCT1G14GW-Q100
TF
74HC1G14GV-Q100
H14
74HCT1G14GV-Q100
T14
[1]
The pin 1 indicator is located on the lower left corner of the device, below the marking code.
6. Functional diagram
2
A
Y
4
2
4
mna023
Fig 1. Logic symbol
A
Y
mna025
mna024
Fig 2. IEC logic symbol
Fig 3. Logic diagram
7. Pinning information
7.1 Pinning
+&*4
+&7*4
QF
$
*1'
9&&
<
DDD
Fig 4. Pin configuration
74HC_HCT1G14_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 27 December 2012
© NXP B.V. 2012. All rights reserved.
2 of 16
74HC1G14-Q100; 74HCT1G14-Q100
NXP Semiconductors
Inverting Schmitt trigger
7.2 Pin description
Table 3.
Pin description
Symbol
Pin
Description
n.c.
1
not connected
A
2
data input
GND
3
ground (0 V)
Y
4
data output
VCC
5
supply voltage
8. Functional description
Table 4.
Function table
H = HIGH voltage level; L = LOW voltage level
Input
Output
A
Y
L
H
H
L
9. Limiting values
Table 5.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). [1]
Symbol
Parameter
VCC
supply voltage
IIK
input clamping current
VI < 0.5 V or VI > VCC + 0.5 V
IOK
output clamping current
IO
output current
ICC
IGND
Tstg
storage temperature
Ptot
Max
Unit
0.5
+7.0
V
-
20
mA
VO < 0.5 V or VO > VCC + 0.5 V
-
20
mA
0.5 V < VO < VCC + 0.5 V
-
12.5
mA
supply current
-
25
mA
ground current
25
-
mA
65
+150
C
-
200
mW
total power dissipation
Conditions
Min
Tamb = 40 C to +125 C
[2]
[1]
The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2]
Above 55 C, the value of Ptot derates linearly with 2.5 mW/K.
10. Recommended operating conditions
Table 6.
Recommended operating conditions
Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
VCC
supply voltage
74HC_HCT1G14_Q100
Product data sheet
Conditions
74HC1G14-Q100
74HCT1G14-Q100
Min
Typ
Max
Min
Typ
Max
2.0
5.0
6.0
4.5
5.0
5.5
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Rev. 2 — 27 December 2012
Unit
V
© NXP B.V. 2012. All rights reserved.
3 of 16
NXP Semiconductors
74HC1G14-Q100; 74HCT1G14-Q100
Inverting Schmitt trigger
Table 6.
Recommended operating conditions …continued
Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
VI
input voltage
VO
output voltage
Tamb
ambient temperature
Conditions
74HC1G14-Q100
74HCT1G14-Q100
Unit
Min
Typ
Max
Min
Typ
Max
0
-
VCC
0
-
VCC
V
0
-
VCC
0
-
VCC
V
40
+25
+125
40
+25
+125
C
11. Static characteristics
Table 7.
Static characteristics
Voltages are referenced to GND (ground = 0 V). All typical values are measured at Tamb = 25 C.
Symbol
Parameter
40 C to +85 C
Conditions
40 C to +125 C
Unit
Min
Typ
Max
Min
Max
IO = 20 A; VCC = 2.0 V
1.9
2.0
-
1.9
-
V
IO = 20 A; VCC = 4.5 V
4.4
4.5
-
4.4
-
V
For type 74HC1G14-Q100
VOH
VOL
HIGH-level output
voltage
LOW-level output
voltage
VI = VT+ or VT
IO = 20 A; VCC = 6.0 V
5.9
6.0
-
5.9
-
V
IO = 2.0 mA; VCC = 4.5 V
4.13
4.32
-
3.7
-
V
IO = 2.6 mA; VCC = 6.0 V
5.63
5.81
-
5.2
-
V
VI = VT+ or VT
IO = 20 A; VCC = 2.0 V
-
0
0.1
-
0.1
V
IO = 20 A; VCC = 4.5 V
-
0
0.1
-
0.1
V
IO = 20 A; VCC = 6.0 V
-
0
0.1
-
0.1
V
IO = 2.0 mA; VCC = 4.5 V
-
0.15
0.33
-
0.4
V
IO = 2.6 mA; VCC = 6.0 V
-
0.16
0.33
-
0.4
V
II
input leakage current
VI = VCC or GND; VCC = 6.0 V
-
-
1.0
-
1.0
A
ICC
supply current
VI = VCC or GND; IO = 0 A;
VCC = 6.0 V
-
-
10
-
20
A
CI
input capacitance
-
1.5
-
-
-
pF
VT+
positive-going
threshold voltage
VCC = 2.0 V
0.7
1.09
1.5
0.7
1.5
V
VCC = 4.5 V
1.7
2.36
3.15
1.7
3.15
V
VCC = 6.0 V
2.1
3.12
4.2
2.1
4.2
V
VCC = 2.0 V
0.3
0.60
0.9
0.3
0.9
V
VCC = 4.5 V
0.9
1.53
2.0
0.9
2.0
V
VCC = 6.0 V
1.2
2.08
2.6
1.2
2.6
V
VCC = 2.0 V
0.2
0.48
1.0
0.2
1.0
V
VCC = 4.5 V
0.4
0.83
1.4
0.4
1.4
V
VCC = 6.0 V
0.6
1.04
1.6
0.6
1.6
V
VT
VH
negative-going
threshold voltage
hysteresis voltage
74HC_HCT1G14_Q100
Product data sheet
see Figure 7 and 8
see Figure 7 and 8
see Figure 7 and 8
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Rev. 2 — 27 December 2012
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4 of 16
74HC1G14-Q100; 74HCT1G14-Q100
NXP Semiconductors
Inverting Schmitt trigger
Table 7.
Static characteristics …continued
Voltages are referenced to GND (ground = 0 V). All typical values are measured at Tamb = 25 C.
Symbol
Parameter
40 C to +85 C
Conditions
40 C to +125 C
Unit
Min
Typ
Max
Min
Max
IO = 20 A; VCC = 4.5 V
4.4
4.5
-
4.4
-
V
IO = 2.0 mA; VCC = 4.5 V
4.13
4.32
-
3.7
-
V
For type 74HCT1G14-Q100
VOH
VOL
HIGH-level output
voltage
VI = VT+ or VT
LOW-level output
voltage
VI = VT+ or VT
IO = 20 A; VCC = 4.5 V
-
0
0.1
-
0.1
V
IO = 2.0 mA; VCC = 4.5 V
-
0.15
0.33
-
0.4
V
II
input leakage current
VI = VCC or GND; VCC = 5.5 V
-
-
1.0
-
1.0
A
ICC
supply current
VI = VCC or GND; IO = 0 A;
VCC = 5.5 V
-
-
10
-
20
A
ICC
additional supply
current
per input; VCC = 4.5 V to 5.5 V;
VI = VCC  2.1 V; IO = 0 A
-
-
500
-
850
A
CI
input capacitance
-
1.5
-
-
-
pF
VT+
positive-going
threshold voltage
VCC = 4.5 V
1.2
1.55
1.9
1.2
1.9
V
VCC = 5.5 V
1.4
1.80
2.1
1.4
2.1
V
VCC = 4.5 V
0.5
0.76
1.2
0.5
1.2
V
VCC = 5.5 V
0.6
0.90
1.4
0.6
1.4
V
VCC = 4.5 V
0.4
0.80
-
0.4
-
V
VCC = 5.5 V
0.4
0.90
-
0.4
-
V
VT
VH
see Figure 7 and 8
negative-going
threshold voltage
see Figure 7 and 8
hysteresis voltage
see Figure 7 and 8
12. Dynamic characteristics
Table 8.
Dynamic characteristics
GND = 0 V; tr = tf  6.0 ns; All typical values are measured at Tamb = 25 C. For test circuit see Figure 6
Symbol Parameter
40 C to +85 C
Conditions
40 C to +125 C Unit
Min
Typ
Max
Min
Max
VCC = 2.0 V; CL = 50 pF
-
25
155
-
190
ns
VCC = 4.5 V; CL = 50 pF
-
12
31
-
38
ns
VCC = 5.0 V; CL = 15 pF
-
10
-
-
-
ns
-
11
26
-
32
ns
-
20
-
-
-
pF
For type 74HC1G14-Q100
tpd
propagation delay A to Y; see Figure 5
[1]
VCC = 6.0 V; CL = 50 pF
CPD
power dissipation VI = GND to VCC
capacitance
74HC_HCT1G14_Q100
Product data sheet
[2]
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Rev. 2 — 27 December 2012
© NXP B.V. 2012. All rights reserved.
5 of 16
74HC1G14-Q100; 74HCT1G14-Q100
NXP Semiconductors
Inverting Schmitt trigger
Table 8.
Dynamic characteristics …continued
GND = 0 V; tr = tf  6.0 ns; All typical values are measured at Tamb = 25 C. For test circuit see Figure 6
Symbol Parameter
40 C to +85 C
Conditions
40 C to +125 C Unit
Min
Typ
Max
Min
Max
-
17
43
-
51
ns
-
15
-
-
-
ns
-
22
-
-
-
pF
For type 74HCT1G14-Q100
[1]
propagation delay A to Y; see Figure 5
tpd
VCC = 4.5 V; CL = 50 pF
VCC = 5.0 V; CL = 15 pF
power dissipation VI = GND to VCC  1.5 V
capacitance
CPD
[1]
[2]
[2]
tpd is the same as tPLH and tPHL.
CPD is used to determine the dynamic power dissipation PD (W).
PD = CPD  VCC2  fi +  (CL  VCC2  fo) where:
fi = input frequency in MHz; fo = output frequency in MHz
CL = output load capacitance in pF; VCC = supply voltage in Volts
 (CL  VCC2  fo) = sum of outputs
13. Waveforms
A input
VM
tPHL
Y output
tPLH
VM
mna033
Measurement points are given in Table 9.
Fig 5. The input (A) to output (Y) propagation delays
Table 9.
Measurement points
Type number
Input
VI
VM
VM
74HC1G14-Q100
GND to VCC
0.5  VCC
0.5  VCC
74HCT1G14-Q100
GND to 3.0 V
1.5 V
0.5  VCC
74HC_HCT1G14_Q100
Product data sheet
Output
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Rev. 2 — 27 December 2012
© NXP B.V. 2012. All rights reserved.
6 of 16
74HC1G14-Q100; 74HCT1G14-Q100
NXP Semiconductors
Inverting Schmitt trigger
VCC
PULSE
GENERATOR
VI
VO
DUT
CL
50 pF
RT
mna034
Test data is given in Table 8. Definitions for test circuit:
CL = Load capacitance including jig and probe capacitance.
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.
Fig 6. Load circuitry for switching times
14. Transfer characteristics waveforms
VO
VI
VT+
VH
VT−
VO
VH
VT−
VI
VT+
mna027
mna026
Fig 7. Transfer characteristic
Fig 8.
mna028
100
The definitions of VT+, VT and VH; where VT+
and VT are between limits of 20 % and 70 %
mna029
1.0
ICC
(mA)
ICC
(μA)
0.8
0.6
50
0.4
0.2
0
0
0
Fig 9.
1.0
VI (V)
Typical 74HC1G14-Q100 transfer
characteristics; VCC = 2.0 V
74HC_HCT1G14_Q100
Product data sheet
2.0
0
2.5
VI (V)
5.0
Fig 10. Typical 74HC1G14-Q100 transfer
characteristics; VCC = 4.5 V
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Rev. 2 — 27 December 2012
© NXP B.V. 2012. All rights reserved.
7 of 16
NXP Semiconductors
74HC1G14-Q100; 74HCT1G14-Q100
Inverting Schmitt trigger
mna030
1.6
ICC
(mA)
0.8
0
0
3.0
VI (V)
6.0
Fig 11. Typical 74HC1G14-Q100 transfer characteristics; VCC = 6.0 V
mna031
2.0
mna032
3.0
ICC
(mA)
ICC
(mA)
2.0
1.0
1.0
0
0
0
2.5
VI (V)
0
5.0
3.0
VI (V)
6.0
Fig 13. Typical 74HCT1G14-Q100 transfer
characteristics; VCC = 5.5 V
Fig 12. Typical 74HCT1G14-Q100 transfer
characteristics; VCC = 4.5 V
15. Application information
The slow input rise and fall times cause additional power dissipation. The additional power
dissipation can be calculated using the following formula:
Padd = fi  (tr  ICC(AV) + tf  ICC(AV))  VCC
Where:
Padd = additional power dissipation (W)
fi = input frequency (MHz)
tr = rise time (ns); 10 % to 90 %
74HC_HCT1G14_Q100
Product data sheet
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Rev. 2 — 27 December 2012
© NXP B.V. 2012. All rights reserved.
8 of 16
74HC1G14-Q100; 74HCT1G14-Q100
NXP Semiconductors
Inverting Schmitt trigger
tf = fall time (ns); 90 % to 10 %
ICC(AV) = average additional supply current (A)
ICC(AV) differs with positive or negative input transitions, as shown in Figure 14 and 15.
74HC1G14-Q100 and 74HCT1G14-Q100 used in relaxation oscillator circuit,
see Figure 16.
Remark: All values given are typical unless otherwise specified.
mna036
200
mna058
200
ΔICC(AV)
(μA)
ΔICC(AV)
(μA)
150
150
positive-going
edge
positive-going
edge
100
100
50
50
negative-going
edge
negative-going
edge
0
0
0
2.0
4.0
VCC (V)
6.0
Fig 14. ICC(AV) for 74HC1G14-Q100 devices; linear
change of VI between 0.1  VCC to 0.9  VCC
74HC_HCT1G14_Q100
Product data sheet
0
2
4
VCC (V)
6
Fig 15. ICC(AV) for 74HCT1G14-Q100 devices; linear
change of VI between 0.1  VCC to 0.9  VCC
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NXP Semiconductors
74HC1G14-Q100; 74HCT1G14-Q100
Inverting Schmitt trigger
R
C
mna035
For 74HC1G14-Q100 and 74HCT1G14-Q100:
1
1
f = ---  -----------------T K  RC
For K-factor, see Figure 17
Fig 16. Relaxation oscillator
DDD
.
DDD
.
9&&9
K-factor for 74HC1G14-Q100
9&&9
K-factor for 74HCT1G14-Q100
Fig 17. Typical K-factor for relaxation oscillator
74HC_HCT1G14_Q100
Product data sheet
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Rev. 2 — 27 December 2012
© NXP B.V. 2012. All rights reserved.
10 of 16
74HC1G14-Q100; 74HCT1G14-Q100
NXP Semiconductors
Inverting Schmitt trigger
16. Package outline
TSSOP5: plastic thin shrink small outline package; 5 leads; body width 1.25 mm
E
D
SOT353-1
A
X
c
y
HE
v M A
Z
5
4
A2
A
(A3)
A1
θ
1
Lp
3
L
e
w M
bp
detail X
e1
0
1.5
3 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
max.
A1
A2
A3
bp
c
D(1)
E(1)
e
e1
HE
L
Lp
v
w
y
Z(1)
θ
mm
1.1
0.1
0
1.0
0.8
0.15
0.30
0.15
0.25
0.08
2.25
1.85
1.35
1.15
0.65
1.3
2.25
2.0
0.425
0.46
0.21
0.3
0.1
0.1
0.60
0.15
7°
0°
Note
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
OUTLINE
VERSION
SOT353-1
REFERENCES
IEC
JEDEC
JEITA
MO-203
SC-88A
EUROPEAN
PROJECTION
ISSUE DATE
00-09-01
03-02-19
Fig 18. Package outline SOT353-1 (TSSOP5)
74HC_HCT1G14_Q100
Product data sheet
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Rev. 2 — 27 December 2012
© NXP B.V. 2012. All rights reserved.
11 of 16
74HC1G14-Q100; 74HCT1G14-Q100
NXP Semiconductors
Inverting Schmitt trigger
Plastic surface-mounted package; 5 leads
SOT753
D
E
B
y
A
X
HE
5
v M A
4
Q
A
A1
c
1
2
3
Lp
detail X
bp
e
w M B
0
1
2 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
A1
bp
c
D
E
e
HE
Lp
Q
v
w
y
mm
1.1
0.9
0.100
0.013
0.40
0.25
0.26
0.10
3.1
2.7
1.7
1.3
0.95
3.0
2.5
0.6
0.2
0.33
0.23
0.2
0.2
0.1
OUTLINE
VERSION
REFERENCES
IEC
JEDEC
SOT753
JEITA
SC-74A
EUROPEAN
PROJECTION
ISSUE DATE
02-04-16
06-03-16
Fig 19. Package outline SOT753 (SC-74A)
74HC_HCT1G14_Q100
Product data sheet
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Rev. 2 — 27 December 2012
© NXP B.V. 2012. All rights reserved.
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74HC1G14-Q100; 74HCT1G14-Q100
NXP Semiconductors
Inverting Schmitt trigger
17. Abbreviations
Table 10.
Abbreviations
Acronym
Description
DUT
Device Under Test
TTL
Transistor-Transistor Logic
18. Revision history
Table 11.
Revision history
Document ID
Release date
74HC_HCT1G14_Q100 v.2 20121227
Modifications:
•
Product data sheet
Change notice Supersedes
Product data sheet
-
74HC_HCT1G14_Q100 v.1
Table 3: Pin number Y output changed from 5 to 4 (errata).
74HC_HCT1G14_Q100 v.1 20120820
74HC_HCT1G14_Q100
Data sheet status
Product data sheet
-
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 27 December 2012
-
© NXP B.V. 2012. All rights reserved.
13 of 16
NXP Semiconductors
74HC1G14-Q100; 74HCT1G14-Q100
Inverting Schmitt trigger
19. Legal information
19.1 Data sheet status
Document status[1][2]
Product status[3]
Definition
Objective [short] data sheet
Development
This document contains data from the objective specification for product development.
Preliminary [short] data sheet
Qualification
This document contains data from the preliminary specification.
Product [short] data sheet
Production
This document contains the product specification.
[1]
Please consult the most recently issued document before initiating or completing a design.
[2]
The term ‘short data sheet’ is explained in section “Definitions”.
[3]
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
19.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
NXP Semiconductors and its customer, unless NXP Semiconductors and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the NXP Semiconductors product is
deemed to offer functions and qualities beyond those described in the
Product data sheet.
19.3 Disclaimers
Limited warranty and liability — Information in this document is believed to
be accurate and reliable. However, NXP Semiconductors does not give any
representations or warranties, expressed or implied, as to the accuracy or
completeness of such information and shall have no liability for the
consequences of use of such information. NXP Semiconductors takes no
responsibility for the content in this document if provided by an information
source outside of NXP Semiconductors.
In no event shall NXP Semiconductors be liable for any indirect, incidental,
punitive, special or consequential damages (including - without limitation - lost
profits, lost savings, business interruption, costs related to the removal or
replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Notwithstanding any damages that customer might incur for any reason
whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of NXP Semiconductors.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
74HC_HCT1G14_Q100
Product data sheet
Suitability for use in automotive applications — This NXP
Semiconductors product has been qualified for use in automotive
applications. Unless otherwise agreed in writing, the product is not designed,
authorized or warranted to be suitable for use in life support, life-critical or
safety-critical systems or equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors and its suppliers accept no liability for
inclusion and/or use of NXP Semiconductors products in such equipment or
applications and therefore such inclusion and/or use is at the customer's own
risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Customers are responsible for the design and operation of their applications
and products using NXP Semiconductors products, and NXP Semiconductors
accepts no liability for any assistance with applications or customer product
design. It is customer’s sole responsibility to determine whether the NXP
Semiconductors product is suitable and fit for the customer’s applications and
products planned, as well as for the planned application and use of
customer’s third party customer(s). Customers should provide appropriate
design and operating safeguards to minimize the risks associated with their
applications and products.
NXP Semiconductors does not accept any liability related to any default,
damage, costs or problem which is based on any weakness or default in the
customer’s applications or products, or the application or use by customer’s
third party customer(s). Customer is responsible for doing all necessary
testing for the customer’s applications and products using NXP
Semiconductors products in order to avoid a default of the applications and
the products or of the application or use by customer’s third party
customer(s). NXP does not accept any liability in this respect.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
Terms and conditions of commercial sale — NXP Semiconductors
products are sold subject to the general terms and conditions of commercial
sale, as published at http://www.nxp.com/profile/terms, unless otherwise
agreed in a valid written individual agreement. In case an individual
agreement is concluded only the terms and conditions of the respective
agreement shall apply. NXP Semiconductors hereby expressly objects to
applying the customer’s general terms and conditions with regard to the
purchase of NXP Semiconductors products by customer.
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 27 December 2012
© NXP B.V. 2012. All rights reserved.
14 of 16
NXP Semiconductors
74HC1G14-Q100; 74HCT1G14-Q100
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No offer to sell or license — Nothing in this document may be interpreted or
construed as an offer to sell products that is open for acceptance or the grant,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.
Translations — A non-English (translated) version of a document is for
reference only. The English version shall prevail in case of any discrepancy
between the translated and English versions.
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from competent authorities.
19.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
20. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
74HC_HCT1G14_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 27 December 2012
© NXP B.V. 2012. All rights reserved.
15 of 16
NXP Semiconductors
74HC1G14-Q100; 74HCT1G14-Q100
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21. Contents
1
2
3
4
5
6
7
7.1
7.2
8
9
10
11
12
13
14
15
16
17
18
19
19.1
19.2
19.3
19.4
20
21
General description . . . . . . . . . . . . . . . . . . . . . . 1
Features and benefits . . . . . . . . . . . . . . . . . . . . 1
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Ordering information . . . . . . . . . . . . . . . . . . . . . 2
Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2
Pinning information . . . . . . . . . . . . . . . . . . . . . . 2
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3
Functional description . . . . . . . . . . . . . . . . . . . 3
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 3
Recommended operating conditions. . . . . . . . 3
Static characteristics. . . . . . . . . . . . . . . . . . . . . 4
Dynamic characteristics . . . . . . . . . . . . . . . . . . 5
Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Transfer characteristics waveforms. . . . . . . . . 7
Application information. . . . . . . . . . . . . . . . . . . 8
Package outline . . . . . . . . . . . . . . . . . . . . . . . . 11
Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Revision history . . . . . . . . . . . . . . . . . . . . . . . . 13
Legal information. . . . . . . . . . . . . . . . . . . . . . . 14
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 14
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Contact information. . . . . . . . . . . . . . . . . . . . . 15
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2012.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
Date of release: 27 December 2012
Document identifier: 74HC_HCT1G14_Q100