ICs for TV
AN5441S
Deflection distortion correction IC
■ Overview
14
15
17.81±0.3
0.4±0.25 0.45
28
0.3
7.2±0.3
9.4±0.3
2.0±0.2
0.15
0.925
• Distortion correcting functions
• Vertical amplitude
• Vertical linearity
• Vertical S-shape
• Vertical position
• Vertical EHT
• Horizontal amplitude
• EW parabola
• Trapezoidal
• Upper/lower EW corner
• Horizontal EHT
• Built-in horizontal and vertical blanking pulse generation circuit
• Supports I2C bus control
1
1.27
■ Features
Unit: mm
0.1±0.1
The AN5441S is a distortion correction processing IC
for deflection system of color televisions and wide screen
televisions.
SOP028-P-0375A
■ Applications
• Color televisions and wide screen televisions
1
2
V-SAW 14
10
9
28
11
GND1
27
8
GND2
V-BLK
generation
H-BLK
generation
HAGC
24
VAGC
Ramp
generation
23
7
VCC2 (12 V)
19
Pulse
shaping
External
trapezoidal
correction
V/I
conversion
5
FBP 3
VD 26
Corner slice
I2C
Superimposed
caption control
Linearity
correction
Gain control
EHT correction
V-amplitude
control
H-amplitude
control
6
S-shaped
correction
N.C.
EW corner
correction
V out
EW out
16 Feedback
17
18
AN5441S
ICs for TV
■ Block Diagram
20
21
2
4
22
15
13
25
EHT (AC)
EHT (DC)
1 SDA
SCL
VCC1 (5 V)
Key (DC)
VCC3 (12 V)
Broken neck
12 Horizontal
and vertical
BLK output
ICs for TV
AN5441S
■ Pin Descriptions
Pin No.
Description
Pin No.
Description
1
I2C
SDA input
15
VCC3 (12 V)
2
I2C
SCL input
16
Vertical feedback input
3
Horizontal FBP input
17
Vertical pre-drive output
4
VCC1 (5 V)
18
EW output
5
Test pin
19
Corner slice voltage
6
N.C.
20
EHT-AC input
7
H-BLK high-level slice voltage
21
EHT-DC input
8
H-BLK low-level slice voltage
22
Control for keystone correction
9
V-BLK high-level slice voltage
23
Capacitor for ramp generation
10
V-BLK low-level slice voltage
24
Capacitor for V-AGC
11
Capacitor for H-AGC
25
VCC2 (12 V)
12
Horizontal and vertical BLK output
26
VD pulse input
13
Broken neck detection
27
GND2
14
V-BLK sawtooth input
28
GND1
■ Absolute Maximum Ratings
Parameter
Symbol
Supply voltage
Unit
VCC1
5.6
V
VCC2 , VCC3
13.4
ICC1
24.5
ICC2
24.0
ICC3
3.2
VCC
Supply current
Power dissipation
Rating
ICC
*2
Operating ambient temperature
Storage temperature
*2
*1
mA
PD
449
mW
Topr
−20 to +70
°C
Tstg
−55 to +150
°C
Note) *1 : Except for the operating ambient temperature and storage temperature, all ratings are for Ta = 25°C.
*2 : The power dissipation shown is the value for Ta = 70°C.
■ Recommended Operating Range
Parameter
Supply voltage
Symbol
Range
Unit
VCC1
4.5 to 5.5
V
VCC2
10.8 to 13.2
VCC3
10.8 to 13.2
3
AN5441S
ICs for TV
■ Electrical Characteristics at Ta = 25°C
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
Circuit current ICC1
I4
VCC1 = 5 V, VCC2 = 12 V, VCC3 = 12 V
11.7
17.0
20.2
mA
Circuit current ICC2
I25
VCC1 = 5 V, VCC2 = 12 V, VCC3 = 12 V
13.1
16.6
20.2
mA
Circuit current ICC3
I15
VCC1 = 5 V, VCC2 = 12 V, VCC3 = 12 V
1.8
2.1
2.3
mA
V20-27, 28 VCC1 = 5 V, VCC2 = 12 V, VCC3 = 12 V
2.6
3.0
3.4
V
EHT-AC input pin voltage
Vertical pull-in frequency 1
fV1
fV = 50 Hz input
45
50
55
Hz
Vertical pull-in frequency 2
fV2
fV = 60 Hz input
55
60
65
Hz
Typical vertical output amplitude
eV(typ)
typ.
2.3
2.7
3.1
V[p-p]
Typical EW output amplitude
eE(typ)
typ.
1.42
1.82
2.22
V[p-p]
Vertical BLK output pulse width
tVB
Wide
3.3
4.8
6.2
ms
Horizontal BLK output pulse width 1
tHB(1)
Normal
11.7
12.2
12.7
µs
Horizontal BLK output pulse width 2
tHB(2)
Wide
37
39
41
µs
Vertical output amplitude change
ratio (max.)
ev(max)
ev(typ)
V amplitude typ. → max. ratio
42
48
54
%
Vertical output amplitude change
ratio (min.)
ev(min)
ev(typ)
V amplitude typ. → min. ratio
−54
−48
− 42
%
Vertical output S-shape change ratio 1
∆eVS1
Vertical S-shape min. → max. ratio
−20
−13
−6
%
Vertical output S-shape change ratio 2
∆eVS2
Vertical S-shape min. → max. ratio
(change of V out 40% to 60% point)
1.5
6.0
%
Vertical output (upper side)
linearity change ratio 1
∆eVC1
Vertical linearity (upper side) typ. →
max. 6
10
14
%
Vertical output (upper side)
linearity change ratio 2
∆eVC2
Vertical linearity (upper side) typ. →
max.
−14
−10
−6
%
Vertical output position change
amount (max.)
∆eVP(max) Vertical position typ. → max.
−1.0
− 0.8
− 0.6
V
Vertical output position change
amount (min.)
∆eVP(min) Vertical position typ. → min.
0.5
0.7
0.9
V
Vertical output (lower side)
linearity change ratio 1
Vertical linearity (lower side) typ. →
max.
8
12
16
%
Vertical output (lower side)
linearity change ratio 2
Vertical linearity (lower side) typ. →
min.
−16
−12
−8
%
Vertical output EHT-DC change
4
∆eVED
EHT-DC = 6 V,
vertical EHT, min. → max.
−24.8 −21.8 −18.8
%
Vertical output EHT-AC change 1 ∆eVEA(1) EHT-AC = 2V, VEHT: max.,
EHT gain, min. → max. −16
−12
−8
%
Vertical output EHT-AC change 2 ∆eVEA(2) EHT-AC = 4 V, VEHT: max.,
EHT gain, min. → max. 9
13
17
%
Vertical output superimposed
caption change 1
∆eVJ(1)
Vertical superimposed caption min. →
max.
−13
−10
−7
%
Vertical output superimposed
caption change 2
∆eVJ(2)
Vertical superimposed caption min. →
max., V amplitude typ. → min. −15
−11
−7
%
ICs for TV
AN5441S
■ Electrical Characteristics at Ta = 25°C (continued)
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
Vertical output amplitude (max.) ∆eV(max) V amplitude max.
3.5
3.9
4.3
V
Vertical output amplitude (min.) ∆eV(min) V amplitude min.
1.1
1.4
1.7
V
4.5
4.9
5.3
V
Vertical output center DC level
∆eVDC
typ.
EW output parabolic amplitude
change (min.)
eE(min)
Parabolic amplitude min.
0
0.1
0.5
V[p-p]
EW output parabolic amplitude
change (max.)
eE(max)
Parabolic amplitude max.
2.5
3.5
4.5
V[p-p]
EW output horizontal amplitude
change (min.)
eED(min) Horizontal amplitude min.
5.45
6.0
6.93
V
EW output horizontal amplitude
change (max.)
eED(max) Horizontal amplitude max.
0.7
2.0
2.6
V
EW output trapezoidal change
(min.)
∆eET(min) Trapzoidal SW : On, trapezoidal typ.
→ min.
64
96
126
%
EW output trapezoidal change
(max.)
∆eET(max) Trapzoidal SW : On, trapezoidal typ.
→ max.
−130
−100
−68
%
EW output upper corner change ∆eECT(min) Upper corner min.
(min.)
−95
−65
−35
%
EW output upper corner change ∆eECT(max) Upper corner max.
(max.)
30
60
90
%
EW output lower corner change ∆eECB(min) Lower corner min.
(min.)
−95
−65
−35
%
EW output lower corner change ∆eECB(max) Lower corner max.
(max.)
25
55
85
%
2.1
2.6
3.1
V
EW output (bottom voltage)
EHT-DC change
∆eEED
EHT-DC: 6 V
Horizontal EHT min. → max.
EW output (bottom voltage)
EHT-AC change 1
∆eEEA(1) EHT-AC: 2 V, horizontal EHT: max.,
EHT gain min. → max.
1.2
1.4
1.6
V
EW output (bottom voltage)
EHT-AC change 2
∆eEEA(2) EHT-AC: 4 V , horizontal EHT: max.,
EHT gain min. → max.
−1.8
−1.5
−1.2
V
EW output (EW amplitude)
KEY change 1 (min.)
∆eEK(min1) KEY = 2 V, trapezoidal SW: On,
trapezoidal max. → min.
95
120
145
%
EW output (EW amplitude)
KEY change 1 (max.)
∆eEK(max1) KEY = 3.2 V, trapezoidal SW: On,
trapezoidal min. → max.
−145
−120
−95
%
2.9
4.0
5.1
V
−145
−120
−95
%
95
120
145
%
0.7
1.1
1.5
mA
EW output parabolic DC level
eEB
typ.
EW output (EW amplitude)
KEY change 2 (min.)
∆eEK(min2) KEY = 2 V, trapezoidal SW: Off,
trapezoidal max. → min.
EW output (EW amplitude)
KEY change 2 (max.)
∆eEK(max2) KEY = 3.2 V, trapezoidal SW: Off,
trapezoidal min. → max.
EW output drive current 1
IEW(1)
Pin 18: 11 V
V-AGC input and output current
IVAGC
0.5
0.8
1.1
mA
H-AGC input and output current
IHAGC
0.7
1.0
1.3
mA
5
AN5441S
ICs for TV
■ Electrical Characteristics at Ta = 25°C (continued)
Parameter
Symbol
Ramp discharge current
IRD
Ramp charge current 1
IRC(1)
Vertical output at service SW
VSSW
Broken neck threshold voltage
VNeck
BLK output amplitude
VBO
Conditions
Pin 24: 1 V
Service SW: Off
Typ
Max
Unit
6.7
8.9
11.1
mA
40
45
52
µA
4.55
4.95
5.35
V
0.5
0.7
0.9
V
2.8
3.1
3.4
V
H-AGC voltage 1
VHAGC(1) HD: 14 kHz
2.6
3.25
3.9
V
H-AGC voltage 2
VHAGC(2) HD: 17 kHz
3.1
3.85
4.6
V
H-AGC pulse width
fHA
3 kΩ resistor between pin 11 and GND
1.5
2.2
3.0
µs
V-AGC pulse width
fVA
3 kΩ resistor between pin 24 and GND
75
110
150
µs
EW output drive current 2
IEW(2)
Pin 18: 1 V
−1.3
− 0.9
− 0.5
mA
Ramp charge current 2
IRC(2)
Pin 24: 10 V
7
10
13
µA
0.2
0.6
1.1
V
H-AGC current ∆V
VHAGC∆V HD: 17 kHz ∆V
VD input threshold value
VVD
0.9
1.3
1.7
V
FBP input threshold value
VFBP
0.5
0.7
0.9
V
I2 C
VSDA(H)
4.0
VCC1
V
VSDA(L)
0
0.7
V
High-level
low-level
I2C
SDA input
SDA input
High-level
I2 C
SCL input
VSCL(H)
4.0
VCC1
V
Low-level
I2C
SCL input
VSCL(L)
0
0.7
V
fi max
100
kHz
0
0.1
0.5
V
0.5
1.0
1.5
V
Maximum input allowable frequency
Vertical output amplitude with
supply voltage fluctuation
∆eV-Vcc Difference of VCC(max) −VCC(min)
Vertical output with DC supply ∆eVD-Vcc Difference of VCC(max) −VCC(min)
voltage fluctuation
EW output amplitude with
supply voltage fluctuation
∆eE-Vcc Difference of VCC(max) −VCC(min)
0
0.1
0.5
V
EW output with DC supply
voltage fluctuation
∆eED-Vcc Difference of VCC(max) −VCC(min)
0.4
1.0
1.6
V
2.5
mA
0.1
1.0
1.9
LSB/
step
7
11
15
mA
Sink current at ACK
3-bit, 4-bit, 6-bit, 7-bit DAC
DNLE
Vertical output drive current
6
Min
IACK
Maximum value of pin 1 sink current
at ACK
L3, 4, 6, 7 1LSB = {data (max.) − data (00)}/
7, 15, 63, 127
IV Out
ICs for TV
AN5441S
■ Terminal Equivalent Circuits
Pin No.
Equivalent circuit
1
5 V (VCC1)
75
µA
100 kΩ
200 Ω
Description
Voltage
I2C bus data input pin:
Sink current: typ. 2.5 mA
AC
(Pulse)
I2C bus clock input pin
AC
(Pulse)
FBP input pin:
AC
(Pulse)
100 kΩ
1.8 V
1
10
kΩ
1 kΩ
2
5 V (VCC1)
75
µA
100 kΩ
200 Ω
100 kΩ
1.8 V
2
10
kΩ
3
12 V (VCC3)
200 µA
50 µA
12 V (VCC2)
10 V
3V
600 Ω
14
kΩ
28
kΩ
3
20 kΩ
0V
4
VCC1 (typ. 5 V):
For I2C circuit
5
12 V (VCC2)
6 kΩ
6 kΩ
Test pin:
Attach a capacitor (0.082 µF) for filter
to GND.
DC
5V
DC
10.6 V
5
180 µA
to
250 µA
7
AN5441S
ICs for TV
■ Terminal Equivalent Circuits (continued)
Pin No.
Equivalent circuit
6
7
Description
N.C
100
µA
50
µA
50
µA
V7
H-SAW
V8
12 V (VCC2)
H-SAW
7
8
100
µA
50
µA
H-SAW
8
12 V (VCC3)
50
µA
100
µA
50
µA
12 V (VCC2)
H-SAW
9
DC
typ. 0 V
to 4 V
0V
FBP
BLK
output voltage
V7
H-SAW
V8
12 V (VCC2)
12 V (VCC2)
4V
HBLK low-level slice voltage:
12 V (VCC3)
50
µA
9
N.C.
HBLK high-level slice voltage:
12 V (VCC3)
Voltage
4V
DC
typ. 0 V
to 4 V
0V
FBP
BLK
output voltage
VBLK high-level slice voltage:
For I2C circuit
DC
typ. 0 V
to 10 V
V9
V-SAW
V10
14
BLK
output voltage
10
VBLK low-level slice voltage:
12 V (VCC3)
12 V (VCC2)
50
µA
100
µA
50
µA
12 V (VCC2)
V9
V-SAW
V10
V-SAW
10
14
BLK
output voltage
8
DC
0 V to
10 V
ICs for TV
AN5441S
■ Terminal Equivalent Circuits (continued)
Pin No.
11
Equivalent circuit
Description
12 V (VCC3)
Voltage
H sawtooth AGC voltage pin
DC
1.5 V to
10 V
Blanking pulse output pin:
Horizontal/vertical BLK output pin
Blanking output high-level with neck
input low-level
AC
(Pulse)
H-AGC pulse
12 V (VCC2)
11
H-AGC pulse
600 kΩ
12
12 V (VCC3)
12 V (VCC2)
12
200 Ω
30 kΩ
100 kΩ
13
12 V (VCC3)
12 V (VCC2)
140 kΩ
13
14
Refer to pin 9 and pin 10 equivalent circuit.
Broken neck detection pin:
Normal; High-level
(apply 1 V or more)
Abnormal; Low-levrl
(apply 0.4 V or more)
(Broken neck mode)
There is no broken neck operation
when service SW is on.
DC
Sawtooth input pin for V-BLK:
AC
V-SAW
15
VCC3 (typ. 12 V):
For BLK pulse generation circuit.
DC
12 V
9
AN5441S
ICs for TV
■ Terminal Equivalent Circuits (continued)
Pin No.
16
Equivalent circuit
Description
Vertical feedback input pin:
12 V (VCC2)
50 µA
50 µA
Voltage
AC
V out
15 kΩ
5V
16
400
µA
17
400
µA
Short-circuit this pin with pin 17 in
normal use
Vertical output pin:
12 V (VCC2)
AC
V out
17
Short-circuit this pin with pin 16 in
normal use
200 Ω
1.2 mA
18
EW output pin:
12 V (VCC2)
AC
EW out
40 kΩ
18
1.5 V
10 kΩ
19
Upper and lower corner slice voltage
input pin
12 V (VCC2)
50 µA
19
1.25 V
10
50 µA
DC
0 V to
1.5 V
ICs for TV
AN5441S
■ Terminal Equivalent Circuits (continued)
Pin No.
20
Equivalent circuit
12 V (VCC2)
6.5 kΩ
150 µA
20
20 kΩ
150 µA
EHT-DC input pin
DC
6 V to 10 V
(typ. 8 V)
External shape trapezoidal correction
DC control pin
DC
1.5 V to
3.5 V
(typ. 2.5 V)
Ramp reference waveform generation
pin:
AC
20 kΩ
20 kΩ 200 µA
200 µA
8.0 V
10 kΩ
6.6 V
50 µA
22
AC
Open
approx. 2.9 V
2.9 V
12 V (VCC2)
21
Voltage
50 µA
50 µA
21
Description
EHT-AC input pin
50 µA
12 V (VCC2)
50 µA
50 µA
24 kΩ
22
23
200 µA
200 µA
12 V (VCC2)
2.5 V
2.5 V
23
0V
20 kΩ
16.7 ms
11
AN5441S
ICs for TV
■ Terminal Equivalent Circuits (continued)
Pin No.
24
Equivalent circuit
Description
12 V (VCC2)
Voltage
AGC pin for ramp
AC
VCC2 (typ. 12 V):
For I2C circuit and correction system
circuit
DC
24
25
26
V pulse input pin:
12 V (VCC2)
AC
(Pulse)
4V
50 µA
0V
16.7 ms
3.0 V
26
12
27
GND2:
For analog circuit block
DC
28
GND1:
For digital circuit block
DC
ICs for TV
AN5441S
19
EHT correction
Gain control
16 Feedback
EHT (AC)
EHT (DC)
1 SDA
I2C
2
SCL
4
External
trapezoidal
correction
Corner slice
EW corner
correction
0.033 µF
20
21
Superimposed
caption control
S-shaped
correction
Linearity
correction
5
V/I
conversion
6
H-amplitude
control
N.C.
V-amplitude
control
18
17 V out
EW out
■ Application Circuit Example
VCC1 (5 V)
22
Key (DC)
Ramp
generation
15
23
0.18 µF
13
VCC3 (12 V)
Broken neck
Normal
Neck
0.33 µF
VCC2
(12 V)
12 Horizontal
and vertical
BLK output
VAGC
24
3V
25
10
9
11
8
H-BLK
generation
HAGC
7
FBP 3
10 V
3.3 µF
0V
0V
0V
V-SAW 14
4V
100 Ω
28
VD 26
GND1
27
Pulse
shaping
GND2
H-BLK
V-BLK
generation
V-BLK
12 V
9 500 Ω 1 500 Ω 790 Ω
12 V
7 500 Ω 3 900 Ω 130 Ω
13