Data Sheet

74AHC3G14-Q100;
74AHCT3G14-Q100
Triple inverting Schmitt trigger
Rev. 3 — 16 September 2013
Product data sheet
1. General description
74AHC3G14-Q100 and 74AHCT3G14-Q100 are high-speed Si-gate CMOS devices.
They provide three inverting buffers with Schmitt trigger action. These devices are
capable of transforming slowly changing input signals into sharply defined, jitter-free
output signals.
The AHC device has CMOS input switching levels and supply voltage range 2 V to 5.5 V.
The AHCT device has TTL input switching levels and supply voltage range 4.5 V to 5.5 V.
This product has been qualified to the Automotive Electronics Council (AEC) standard
Q100 (Grade 1) and is suitable for use in automotive applications.
2. Features and benefits
 Automotive product qualification in accordance with AEC-Q100 (Grade 1)
 Specified from 40 C to +85 C and from 40 C to +125 C
 Symmetrical output impedance
 High noise immunity
 Low power dissipation
 Balanced propagation delays
 ESD protection:
 MIL-STD-883, method 3015 exceeds 2000 V
 HBM JESD22-A114F exceeds 2000 V
 MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 )
 Multiple package options
3. Applications
 Wave and pulse shaper for highly noisy environment
 Astable multivibrator
 Monostable multivibrator
NXP Semiconductors
74AHC3G14-Q100; 74AHCT3G14-Q100
Triple inverting Schmitt trigger
4. Ordering information
Table 1.
Ordering information
Type number
Package
74AHC3G14DP-Q100
Temperature range
Name
Description
40 C to +125 C
TSSOP8
plastic thin shrink small outline package; 8 leads; SOT505-2
body width 3 mm; lead length 0.5 mm
40 C to +125 C
VSSOP8 plastic very thin shrink small outline package;
8 leads; body width 2.3 mm
SOT765-1
40 C to +125 C
XSON8
SOT996-2
74AHCT3G14DP-Q100
74AHC3G14DC-Q100
74AHCT3G14DC-Q100
74AHC3G14GD-Q100
74AHCT3G14GD-Q100
Version
plastic extremely thin small outline package; no
leads; 8 terminals; body 3  2  0.5 mm
5. Marking
Table 2.
Marking codes
Type number
Marking code[1]
74AHC3G14DP-Q100
A14
74AHCT3G14DP-Q100
C14
74AHC3G14DC-Q100
A14
74AHCT3G14DC-Q100
C14
74AHC3G14GD-Q100
A14
74AHCT3G14GD-Q100
C14
[1]
The pin 1 indicator is located on the lower left corner of the device, below the marking code.
6. Functional diagram
1A
1Y
3Y
3A
2A
2Y
A
mna025
001aah728
Fig 1.
Logic symbol
74AHC_AHCT3G14_Q100
Product data sheet
Y
001aah729
Fig 2.
IEC logic symbol
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 16 September 2013
Fig 3.
Logic diagram
(one Schmitt trigger)
© NXP B.V. 2013. All rights reserved.
2 of 18
74AHC3G14-Q100; 74AHCT3G14-Q100
NXP Semiconductors
Triple inverting Schmitt trigger
7. Pinning information
7.1 Pinning
$+&*4
$+&7*4
$
9&&
<
<
$
$
*1'
<
$+&*4
$+&7*4
$
9&&
<
<
$
$
*1'
<
DDD
7UDQVSDUHQWWRSYLHZ
DDD
Fig 4.
Pin configuration SOT505-2 and SOT765-1
Fig 5.
Pin configuration SOT996-2
7.2 Pin description
Table 3.
Pin description
Symbol
Pin
Description
1A, 2A, 3A
1, 3, 6
data input
GND
4
ground (0 V)
1Y, 2Y, 3Y
7, 5, 2
data output
VCC
8
supply voltage
8. Functional description
Table 4.
Function table [1]
Input nA
Output nY
L
H
H
L
[1]
H = HIGH voltage level; L = LOW voltage level
74AHC_AHCT3G14_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 16 September 2013
© NXP B.V. 2013. All rights reserved.
3 of 18
74AHC3G14-Q100; 74AHCT3G14-Q100
NXP Semiconductors
Triple inverting Schmitt trigger
9. Limiting values
Table 5.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
Parameter
VCC
supply voltage
VI
input voltage
IIK
input clamping current
VI < 0.5 V
IOK
output clamping current
VO < 0.5 V or VO > VCC + 0.5 V
IO
output current
0.5 V < VO < VCC + 0.5 V
ICC
IGND
Tstg
storage temperature
[1]
[2]
Min
Max
Unit
0.5
+7.0
V
0.5
+7.0
V
20
-
mA
-
20
mA
-
25
mA
supply current
-
75
mA
ground current
75
-
mA
65
+150
C
-
250
mW
total power dissipation
Ptot
Conditions
[1]
Tamb = 40 C to +125 C
[2]
The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
For TSSOP8 package: above 55 C the value of Ptot derates linearly at 2.5 mW/K.
For VSSOP8 package: above 110 C the value of Ptot derates linearly at 8 mW/K.
For XSON8 packages: above 118 C the value of Ptot derates linearly with 7.8 mW/K.
10. Recommended operating conditions
Table 6.
Recommended operating conditions
Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
74AHC3G14-Q100
Min
Typ
74AHCT3G14-Q100
Max
Min
Typ
Unit
Max
VCC
supply voltage
2.0
5.0
5.5
4.5
5.0
5.5
V
VI
input voltage
0
-
5.5
0
-
5.5
V
VO
output voltage
0
-
VCC
0
-
VCC
V
Tamb
ambient temperature
40
+25
+125
40
+25
+125
C
74AHC_AHCT3G14_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 16 September 2013
© NXP B.V. 2013. All rights reserved.
4 of 18
NXP Semiconductors
74AHC3G14-Q100; 74AHCT3G14-Q100
Triple inverting Schmitt trigger
11. Static characteristics
Table 7.
Static characteristics
Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
25 C
Conditions
40 C to +85 C 40 C to +125 C Unit
Min
Typ
Max
Min
Max
Min
Max
HIGH-level
VI = VT+ or VT
output voltage
IO = 50 A; VCC = 2.0 V
1.9
2.0
-
1.9
-
1.9
-
V
IO = 50 A; VCC = 3.0 V
2.9
3.0
-
2.9
-
2.9
-
V
IO = 50 A; VCC = 4.5 V
4.4
4.5
-
4.4
-
4.4
-
V
IO = 4.0 mA; VCC = 3.0 V
2.58
-
-
2.48
-
2.40
-
V
IO = 8.0 mA; VCC = 4.5 V
3.94
-
-
3.8
-
3.70
-
V
LOW-level
VI = VT+ or VT
output voltage
IO = 50 A; VCC = 2.0 V
-
0
0.1
-
0.1
-
0.1
V
IO = 50 A; VCC = 3.0 V
-
0
0.1
-
0.1
-
0.1
V
IO = 50 A; VCC = 4.5 V
-
0
0.1
-
0.1
-
0.1
V
IO = 4.0 mA; VCC = 3.0 V
-
-
0.36
-
0.44
-
0.55
V
IO = 8.0 mA; VCC = 4.5 V
-
-
0.36
-
0.44
-
0.55
V
-
-
0.1
-
1.0
-
2.0
A
74AHC3G14-Q100
VOH
VOL
II
input leakage
current
VI = 5.5 V or GND;
VCC = 0 V to 5.5 V
ICC
supply current VI = VCC or GND; IO = 0 A;
VCC = 5.5 V
-
-
1.0
-
10
-
40
A
CI
input
capacitance
-
1.5
10
-
10
-
10
pF
4.4
4.5
-
4.4
-
4.4
-
V
3.94
-
-
3.8
-
3.70
-
V
74AHCT3G14-Q100
VOH
HIGH-level
VI = VT+ or VT; VCC = 4.5 V
output voltage
IO = 50 A
IO = 8.0 mA
VOL
LOW-level
VI = VT+ or VT; VCC = 4.5 V
output voltage
IO = 50 A
IO = 8.0 mA
0
0.1
-
0.1
-
0.1
V
-
0.36
-
0.44
-
0.55
V
-
-
0.1
-
1.0
-
2.0
A
II
input leakage
current
ICC
supply current VI = VCC or GND; IO = 0 A;
VCC = 5.5 V
-
-
1.0
-
10
-
40
A
ICC
additional
per input pin; VI = 3.4 V;
supply current other inputs at VCC or GND;
IO = 0 A; VCC = 5.5 V
-
-
1.35
-
1.5
-
1.5
mA
CI
input
capacitance
-
1.5
10
-
10
-
10
pF
74AHC_AHCT3G14_Q100
Product data sheet
VI = 5.5 V or GND;
VCC = 0 V to 5.5 V
-
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Rev. 3 — 16 September 2013
© NXP B.V. 2013. All rights reserved.
5 of 18
NXP Semiconductors
74AHC3G14-Q100; 74AHCT3G14-Q100
Triple inverting Schmitt trigger
11.1 Transfer characteristics
Table 8.
Transfer characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V). See Figure 8 and Figure 9.
Symbol Parameter
25 C
Conditions
40 C to +85 C 40 C to +125 C Unit
Min
Typ
Max
Min
Max
Min
Max
VCC = 3.0 V
-
-
2.2
-
2.2
-
2.2
V
VCC = 4.5 V
-
-
3.15
-
3.15
-
3.15
V
VCC = 5.5 V
-
-
3.85
-
3.85
-
3.85
V
VCC = 3.0 V
0.9
-
-
0.9
-
0.9
-
V
VCC = 4.5 V
1.35
-
-
1.35
-
1.35
-
V
VCC = 5.5 V
1.65
-
-
1.65
-
1.65
-
V
VCC = 3.0 V
0.3
-
1.2
0.3
1.2
0.25
1.2
V
VCC = 4.5 V
0.4
-
1.4
0.4
1.4
0.35
1.4
V
VCC = 5.5 V
0.5
-
1.6
0.5
1.6
0.45
1.6
V
VCC = 4.5 V
-
-
2.0
-
2.0
-
2.0
V
VCC = 5.5 V
-
-
2.0
-
2.0
-
2.0
V
negative-going
threshold
voltage
VCC = 4.5 V
0.5
-
-
0.5
-
0.5
-
V
VCC = 5.5 V
0.6
-
-
0.6
-
0.6
-
V
hysteresis
voltage
VCC = 4.5 V
0.4
-
1.4
0.4
1.4
0.35
1.4
V
VCC = 5.5 V
0.4
-
1.6
0.4
1.6
0.35
1.6
V
74AHC3G14-Q100
VT+
VT
VH
positive-going
threshold
voltage
negative-going
threshold
voltage
hysteresis
voltage
74AHCT3G14-Q100
VT+
VT
VH
positive-going
threshold
voltage
12. Dynamic characteristics
Table 9.
Dynamic characteristics
GND = 0 V; tr = tf  3.0 ns; for test circuit see Figure 7.
Symbol Parameter
25 C
Conditions
40 C to +85 C 40 C to +125 C Unit
Min
Typ
Max
Min
Max
Min
Max
CL = 15 pF
-
4.2
12.8
1.0
15.0
1.0
16.5
ns
CL = 50 pF
-
6.0
16.3
1.0
18.5
1.0
20.5
ns
-
3.2
8.6
1.0
10.0
1.0
11.0
ns
-
4.6
10.6
1.0
12.0
1.0
13.5
ns
-
10
-
-
-
-
-
pF
74AHC3G14-Q100
tpd
propagation
delay
nA to nY; see Figure 6
[1]
VCC = 3.0 V to 3.6 V
[2]
VCC = 4.5 V to 5.5 V
[3]
CL = 15 pF
CL = 50 pF
CPD
power
dissipation
capacitance
74AHC_AHCT3G14_Q100
Product data sheet
per buffer;
CL = 50 pF; fi = 1 MHz;
VI = GND to VCC
[4]
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Rev. 3 — 16 September 2013
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6 of 18
74AHC3G14-Q100; 74AHCT3G14-Q100
NXP Semiconductors
Triple inverting Schmitt trigger
Table 9.
Dynamic characteristics …continued
GND = 0 V; tr = tf  3.0 ns; for test circuit see Figure 7.
Symbol Parameter
25 C
Conditions
40 C to +85 C 40 C to +125 C Unit
Min
Typ
Max
Min
Max
Min
Max
-
4.1
7.0
1.0
8.0
1.0
9.0
ns
-
5.9
8.5
1.0
10.0
1.0
11.0
ns
-
12
-
-
-
-
-
pF
74AHCT3G14-Q100
propagation
delay
tpd
[1]
nA to nY;
VCC = 4.5 V to 5.5 V
[3]
CL = 15 pF
CL = 50 pF
power
dissipation
capacitance
CPD
[4]
per buffer;
CL = 50 pF; fi = 1 MHz;
VI = GND to VCC
[1]
tpd is the same as tPLH and tPHL.
[2]
Typical values are measured at VCC = 3.3 V.
[3]
Typical values are measured at VCC = 5.0 V.
[4]
CPD is used to determine the dynamic power dissipation PD (W).
PD = CPD  VCC2  fi +  (CL  VCC2  fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in V;
(CL  VCC2  fo) = sum of the outputs.
13. Waveforms
A input
VM
VCC
tPHL
Y output
tPLH
PULSE
GENERATOR
VM
VI
VO
DUT
RT
mna033
CL
mna101
The test data is given in Table 10
Test data is given in Table 10.
Definitions for test circuit:
CL = Load capacitance.
RT = Termination resistance should be equal to output
impedance Zo of the pulse generator.
Fig 6.
Table 10.
The input (nA) to output (nY) propagation
delays
Fig 7.
Test circuit for measuring switching times
Test data
Type number
Input
VI
VM
VM
74AHC3G14-Q100
GND to VCC
0.5  VCC
0.5  VCC
74AHCT3G14-Q100
GND to 3.0 V
1.5 V
0.5  VCC
74AHC_AHCT3G14_Q100
Product data sheet
Output
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 16 September 2013
© NXP B.V. 2013. All rights reserved.
7 of 18
74AHC3G14-Q100; 74AHCT3G14-Q100
NXP Semiconductors
Triple inverting Schmitt trigger
13.1 Transfer characteristic waveforms
VO
VT+
VI
VH
VT−
VH
VT−
Fig 8.
VO
VI
VT+
mna027
mna026
Transfer characteristic
Fig 9.
mna401
1.5
ICC
(mA)
The definitions of VT+, VT and VH
mna402
5
ICC
(mA)
4
1
3
2
0.5
1
0
0
0
1
2
VI (V)
VCC = 3.0 V.
Product data sheet
0
1
2
3
4 V (V) 5
I
VCC = 4.5 V.
Fig 10. Typical 74AHC3G14-Q100 transfer
characteristics
74AHC_AHCT3G14_Q100
3
Fig 11. Typical 74AHC3G14-Q100 transfer
characteristics
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Rev. 3 — 16 September 2013
© NXP B.V. 2013. All rights reserved.
8 of 18
74AHC3G14-Q100; 74AHCT3G14-Q100
NXP Semiconductors
Triple inverting Schmitt trigger
mna403
8
ICC
(mA)
6
4
2
0
0
2
4
VI (V)
6
VCC = 5.5 V.
Fig 12. Typical 74AHC3G14-Q100 transfer characteristics
mna404
5
ICC
(mA)
mna405
8
ICC
(mA)
4
6
3
4
2
2
1
0
0
0
1
2
3
4 V (V) 5
I
VCC = 4.5 V.
Product data sheet
2
4
VI (V)
6
VCC = 5.5 V.
Fig 13. Typical 74AHCT3G14-Q100 transfer
characteristics
74AHC_AHCT3G14_Q100
0
Fig 14. Typical 74AHCT3G14-Q100 transfer
characteristics
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Rev. 3 — 16 September 2013
© NXP B.V. 2013. All rights reserved.
9 of 18
74AHC3G14-Q100; 74AHCT3G14-Q100
NXP Semiconductors
Triple inverting Schmitt trigger
14. Application information
The slow input rise and fall times cause additional power dissipation, which can be
calculated using the following formula:
Padd = fi  (tr  ICC(AV) + tf  ICC(AV))  VCC where:
Padd = additional power dissipation (W);
fi = input frequency (MHz);
tr = input rise time (ns); 10 % to 90 %;
tf = input fall time (ns); 90 % to 10 %;
ICC(AV) = average additional supply current (A).
ICC(AV) differs with positive or negative input transitions, as shown in Figure 15
and Figure 16.
For 74AHC3G14-Q100 and 74AHCT3G14-Q100 used in relaxation oscillator circuit,
see Figure 17.
Note to the application information:
1. All values given are typical unless otherwise specified.
mna036
200
mna058
200
ΔICC(AV)
(μA)
ΔICC(AV)
(μA)
150
150
positive-going
edge
positive-going
edge
100
100
50
50
negative-going
edge
negative-going
edge
0
0
0
2.0
4.0
VCC (V)
6.0
Linear change of VI between 0.1VCC to 0.9VCC
Fig 15. Average additional ICC for 74AHC3G14-Q100
Schmitt trigger devices
74AHC_AHCT3G14_Q100
Product data sheet
0
2
4
VCC (V)
6
Linear change of VI between 0.1VCC to 0.9VCC
Fig 16. Average additional ICC for 74AHCT3G14-Q100
Schmitt trigger devices
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 16 September 2013
© NXP B.V. 2013. All rights reserved.
10 of 18
NXP Semiconductors
74AHC3G14-Q100; 74AHCT3G14-Q100
Triple inverting Schmitt trigger
R
C
mna035
For 74AHC3G14-Q100:
For 74AHCT3G14-Q100:
1
1
f = ---  -----------------------T 0.55  RC
1
1
f = ---  -----------------------T 0.60  RC
Fig 17. Relaxation oscillator using the 74AHC3G14-Q100 and 74AHCT3G14-Q100
74AHC_AHCT3G14_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 16 September 2013
© NXP B.V. 2013. All rights reserved.
11 of 18
74AHC3G14-Q100; 74AHCT3G14-Q100
NXP Semiconductors
Triple inverting Schmitt trigger
15. Package outline
TSSOP8: plastic thin shrink small outline package; 8 leads; body width 3 mm; lead length 0.5 mm
D
E
A
SOT505-2
X
c
HE
y
v M A
Z
5
8
A
A2
(A3)
A1
pin 1 index
θ
Lp
L
1
4
e
detail X
w M
bp
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
max.
A1
A2
A3
bp
c
D(1)
E(1)
e
HE
L
Lp
v
w
y
Z(1)
θ
mm
1.1
0.15
0.00
0.95
0.75
0.25
0.38
0.22
0.18
0.08
3.1
2.9
3.1
2.9
0.65
4.1
3.9
0.5
0.47
0.33
0.2
0.13
0.1
0.70
0.35
8°
0°
Note
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
OUTLINE
VERSION
SOT505-2
REFERENCES
IEC
JEDEC
JEITA
EUROPEAN
PROJECTION
ISSUE DATE
02-01-16
---
Fig 18. Package outline SOT505-2 (TSSOP8)
74AHC_AHCT3G14_Q100
Product data sheet
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Rev. 3 — 16 September 2013
© NXP B.V. 2013. All rights reserved.
12 of 18
74AHC3G14-Q100; 74AHCT3G14-Q100
NXP Semiconductors
Triple inverting Schmitt trigger
VSSOP8: plastic very thin shrink small outline package; 8 leads; body width 2.3 mm
D
E
SOT765-1
A
X
c
y
HE
v M A
Z
5
8
Q
A
A2
A1
pin 1 index
(A3)
θ
Lp
1
4
e
L
detail X
w M
bp
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
max.
A1
A2
A3
bp
c
D(1)
E(2)
e
HE
L
Lp
Q
v
w
y
Z(1)
θ
mm
1
0.15
0.00
0.85
0.60
0.12
0.27
0.17
0.23
0.08
2.1
1.9
2.4
2.2
0.5
3.2
3.0
0.4
0.40
0.15
0.21
0.19
0.2
0.13
0.1
0.4
0.1
8°
0°
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
OUTLINE
VERSION
SOT765-1
REFERENCES
IEC
JEDEC
JEITA
MO-187
EUROPEAN
PROJECTION
ISSUE DATE
02-06-07
Fig 19. Package outline SOT765-1 (VSSOP8)
74AHC_AHCT3G14_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 16 September 2013
© NXP B.V. 2013. All rights reserved.
13 of 18
74AHC3G14-Q100; 74AHCT3G14-Q100
NXP Semiconductors
Triple inverting Schmitt trigger
XSON8: plastic extremely thin small outline package; no leads;
8 terminals; body 3 x 2 x 0.5 mm
B
D
SOT996-2
A
E
A
A1
detail X
terminal 1
index area
e1
1
4
8
5
C
C A B
C
v
w
b
e
L1
y
y1 C
L2
L
X
0
1
2 mm
scale
Dimensions (mm are the original dimensions)
Unit(1)
mm
max
nom
min
A
A1
b
0.05 0.35
D
E
2.1
3.1
0.5
0.00 0.15
1.9
e
e1
0.5
1.5
2.9
L
L1
L2
0.5
0.15
0.6
0.3
0.05
0.4
v
0.1
w
y
0.05 0.05
y1
0.1
sot996-2_po
Outline
version
References
IEC
JEDEC
JEITA
European
projection
Issue date
07-12-21
12-11-20
SOT996-2
Fig 20. Package outline SOT996-2 (XSON8)
74AHC_AHCT3G14_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 16 September 2013
© NXP B.V. 2013. All rights reserved.
14 of 18
74AHC3G14-Q100; 74AHCT3G14-Q100
NXP Semiconductors
Triple inverting Schmitt trigger
16. Abbreviations
Table 11.
Abbreviations
Acronym
Description
CDM
Charged Device Model
CMOS
Complementary Metal-Oxide Semiconductor
DUT
Device Under Test
ESD
ElectroStatic Discharge
HBM
Human Body Model
MM
Machine Model
TTL
Transistor-Transistor Logic
MIL
Military
17. Revision history
Table 12.
Revision history
Document ID
Release date
Data sheet status
Change notice
Supersedes
74AHC_AHCT3G14_Q100 v.3
20130916
Product data sheet
-
74AHC_AHCT3G14_Q100 v.2
Modifications:
•
Added type number 74AHC3G14GD-Q100 and 74AHCT3G14GD-Q100.
74AHC_AHCT3G14_Q100 v.2
20130128
Product data sheet
-
74AHC_AHCT3G14_Q100 v.1
74AHC_AHCT3G14_Q100 v.1
20121001
Product data sheet
-
-
74AHC_AHCT3G14_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 16 September 2013
© NXP B.V. 2013. All rights reserved.
15 of 18
NXP Semiconductors
74AHC3G14-Q100; 74AHCT3G14-Q100
Triple inverting Schmitt trigger
18. Legal information
18.1 Data sheet status
Document status[1][2]
Product status[3]
Definition
Objective [short] data sheet
Development
This document contains data from the objective specification for product development.
Preliminary [short] data sheet
Qualification
This document contains data from the preliminary specification.
Product [short] data sheet
Production
This document contains the product specification.
[1]
Please consult the most recently issued document before initiating or completing a design.
[2]
The term ‘short data sheet’ is explained in section “Definitions”.
[3]
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
18.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
NXP Semiconductors and its customer, unless NXP Semiconductors and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the NXP Semiconductors product is
deemed to offer functions and qualities beyond those described in the
Product data sheet.
18.3 Disclaimers
Limited warranty and liability — Information in this document is believed to
be accurate and reliable. However, NXP Semiconductors does not give any
representations or warranties, expressed or implied, as to the accuracy or
completeness of such information and shall have no liability for the
consequences of use of such information. NXP Semiconductors takes no
responsibility for the content in this document if provided by an information
source outside of NXP Semiconductors.
In no event shall NXP Semiconductors be liable for any indirect, incidental,
punitive, special or consequential damages (including - without limitation - lost
profits, lost savings, business interruption, costs related to the removal or
replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Notwithstanding any damages that customer might incur for any reason
whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of NXP Semiconductors.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
74AHC_AHCT3G14_Q100
Product data sheet
Suitability for use in automotive applications — This NXP
Semiconductors product has been qualified for use in automotive
applications. Unless otherwise agreed in writing, the product is not designed,
authorized or warranted to be suitable for use in life support, life-critical or
safety-critical systems or equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors and its suppliers accept no liability for
inclusion and/or use of NXP Semiconductors products in such equipment or
applications and therefore such inclusion and/or use is at the customer's own
risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Customers are responsible for the design and operation of their applications
and products using NXP Semiconductors products, and NXP Semiconductors
accepts no liability for any assistance with applications or customer product
design. It is customer’s sole responsibility to determine whether the NXP
Semiconductors product is suitable and fit for the customer’s applications and
products planned, as well as for the planned application and use of
customer’s third party customer(s). Customers should provide appropriate
design and operating safeguards to minimize the risks associated with their
applications and products.
NXP Semiconductors does not accept any liability related to any default,
damage, costs or problem which is based on any weakness or default in the
customer’s applications or products, or the application or use by customer’s
third party customer(s). Customer is responsible for doing all necessary
testing for the customer’s applications and products using NXP
Semiconductors products in order to avoid a default of the applications and
the products or of the application or use by customer’s third party
customer(s). NXP does not accept any liability in this respect.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
Terms and conditions of commercial sale — NXP Semiconductors
products are sold subject to the general terms and conditions of commercial
sale, as published at http://www.nxp.com/profile/terms, unless otherwise
agreed in a valid written individual agreement. In case an individual
agreement is concluded only the terms and conditions of the respective
agreement shall apply. NXP Semiconductors hereby expressly objects to
applying the customer’s general terms and conditions with regard to the
purchase of NXP Semiconductors products by customer.
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 16 September 2013
© NXP B.V. 2013. All rights reserved.
16 of 18
NXP Semiconductors
74AHC3G14-Q100; 74AHCT3G14-Q100
Triple inverting Schmitt trigger
No offer to sell or license — Nothing in this document may be interpreted or
construed as an offer to sell products that is open for acceptance or the grant,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.
Translations — A non-English (translated) version of a document is for
reference only. The English version shall prevail in case of any discrepancy
between the translated and English versions.
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from competent authorities.
18.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
19. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
74AHC_AHCT3G14_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 16 September 2013
© NXP B.V. 2013. All rights reserved.
17 of 18
NXP Semiconductors
74AHC3G14-Q100; 74AHCT3G14-Q100
Triple inverting Schmitt trigger
20. Contents
1
2
3
4
5
6
7
7.1
7.2
8
9
10
11
11.1
12
13
13.1
14
15
16
17
18
18.1
18.2
18.3
18.4
19
20
General description . . . . . . . . . . . . . . . . . . . . . . 1
Features and benefits . . . . . . . . . . . . . . . . . . . . 1
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Ordering information . . . . . . . . . . . . . . . . . . . . . 2
Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2
Pinning information . . . . . . . . . . . . . . . . . . . . . . 3
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3
Functional description . . . . . . . . . . . . . . . . . . . 3
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4
Recommended operating conditions. . . . . . . . 4
Static characteristics. . . . . . . . . . . . . . . . . . . . . 5
Transfer characteristics . . . . . . . . . . . . . . . . . . 6
Dynamic characteristics . . . . . . . . . . . . . . . . . . 6
Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Transfer characteristic waveforms . . . . . . . . . . 8
Application information. . . . . . . . . . . . . . . . . . 10
Package outline . . . . . . . . . . . . . . . . . . . . . . . . 12
Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Revision history . . . . . . . . . . . . . . . . . . . . . . . . 15
Legal information. . . . . . . . . . . . . . . . . . . . . . . 16
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 16
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Contact information. . . . . . . . . . . . . . . . . . . . . 17
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2013.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
Date of release: 16 September 2013
Document identifier: 74AHC_AHCT3G14_Q100