EVB-LAN9252-4PORT Evaluation Board Schematics

5
4
3
2
1
LAN9252-SPI+MII-EVB
D
D
(Config 6-SPI+MII
3 Port & 4 Port Expansion mode)
Page No.
C
B
Schematic Page
1
Title
2
Block Diagram
3
Power Supply & RST
4
LAN9252
5
Copper Mode Interface
6
SFP Interface
7
STRAP,GPIO,I2C & FXLOS
8
B2B Interface
9
PIM+ON-Board-PIC32MX
10
Expansion ModeInterface
11
Enhanced link detection
C
B
A
A
Chennai
India
Part Number: LAN9252-SPI+MII-EVB
Page:
TITLE
Project
Board
Size:
LAN9252-SPI+MII-EVB Name: EVB4-LAN9252-SPI+MII
B
Name:
Date: Monday, October 27, 2014
5
4
3
2
Sheet 1
1
Rev
of
B
11
5
4
3
2
1
BLOCK DIAGRAM : JUTLAND EVB
D
D
C
C
B
B
A
A
Chennai
India
Part Number: LAN9252-SPI+MII-EVB
Page:
Block Diagram
Project
Board
Size:
LAN9252-SPI+MII-EVB Name: EVB4-LAN9252-SPI+MII
B
Name:
Date: Thursday, August 06, 2015
5
4
3
2
Sheet 2
1
Rev
of
B
11
5
4
3
D
2
1
D
POWER SUPPLY
5V_SW
3
EN12_1
2A/0.05DCR
2
Switch, SPDT, Slide
P/N:1101M2S3CQE2
J1
R1
2
1
0E
C2
10uF
25V
C3
0.1uF
VIN
ENABLE
VOUT
TRIM
3_Amp
GND
4
5
3
OKR-T/3-W12-C
R2
1K
DNP
C1
R3
3.30K
1%
R4
470E
1%
(Ra)
(Rb)
R4A
33E
1%
C4
C5
10uF
0.1uF
4.7uF
1
3
U1
FB1
2
A
1
3V3
3V3
D1
GRN
C
5V_EXT
TP2
ORANGE
"3V3 Present"
SW1
1
3 V REGULATOR, 3A
( 3V3 fixed when Rb=470E)
5V
2
TP1
RED
C
C
RESET Options
3V3
3V3
3V3
Reset Generator
2
B
RESET#
RESET
NDS355AN_NMOS
1
3
R8
1K
D
RST#
Q1
1
G
5
MR#
2
3V3
VDD
4
5
U2
2
1/10W
1%
3
sw_pb_2P
1
R7
100
GND
SW2
R5
4.75K
1%
0.1uF
2
1
C6
R6
10.0K
1/10W
1%
Note:
1.POR -> Reset to ASIC & SOC (Default)
2.RESET O/P from ASIC -> Reset to EX-PHY (PORT2) & SOC :Only Ethercat sku
3.RESET from SOC (GPIO/RST-O/P) -> Reset to ASIC
4.RESET from Push Botton -> Reset to ASIC & SOC
Br_Red-RA
U3
S
2
4
TPS3125
R9
1
D2
74LVC1G14
A
C
2
B
"Reset"
1
3
SOT23_5
Threshold = 2.64V
Delay = 180ms
2.2K
A
A
TP8
BLACK
TP9
BLACK
Chennai
India
Part Number: LAN9252-SPI+MII-EVB
Page:
Power Supply & RST
Project
Board
Size:
LAN9252-SPI+MII-EVB Name: EVB4-LAN9252-SPI+MII
B
Name:
Date: Monday, October 27, 2014
5
4
3
2
Sheet 3
1
Rev
of
B
11
5
4
3
2
1
Power Supply Filtering
FB3
(*short 1&2)
OSCI
OSCO
3V3
C27
18pF
REG_EN
R10
C22
C18
0.1uF
C21
C17
0.1uF
0.1uF
C16
0.1uF
C20
C15
0.1uF
0.1uF
C14
0.1uF
C19
C13
0.1uF
1uF
C12 DNP
470pF
C11
VDD12TX1
VDD12TX2
1
100K
3
1
2
4
12.1K
1%
RBIAS
7
57
RST#
11
IRQ
44
ATEST/FXLOSEN
8
41
B
I2C2_SCL
I2C2_SDA
43
42
GPIO0
GPIO1
GPIO2
48
46
45
6
24
38
14
20
32
37
47
58
5
51
64
OSCVDD12
OSCI
OSCO
OSCVSS
REG_EN
RBIAS
RST#
IRQ
ATEST/FXLOSEN
TESTMODE
I2CSCL/EESCL/TCK
I2CSDA/EESDA/TMS
VDDCR1
VDDCR2
VDDCR3
VDDIO1
VDDIO2
VDDIO3
VDDIO4
VDDIO5
FXSDENA/FXSDA/FXLOSA
INT PORT0
J14
25.000MHz
25ppm
Y1
INT PORT1
(Only for
Lan9252)
DNP
R167
OTHER
SIGNALS
18pF
VDD33BIAS
VDD33
C26
I2C
GND
OSCI_Combined
5
3
1
OSC
VCC
2
6
4
2
POWER
4
C
HEADER 3X2
VDD33TXRX1
VDD33TXRX2
1
0.1uF
0.1uF
U4A
DNP
25MHz
Y4
OSCILLATOR
3
OE
OUT
D
FB5
2A/0.05DCR
BLM18EG221SN1D
Note:
OSCVSS need to connect to Chip gnd.
100K
DNP
C85
C25
0.1uF
3V3
DNP
R166
C
C24
2
3V3
VDDCR
VDD33TXRX1
VDD33TXRX2
BLM18EG221SN1D
C23
1.0uF
DNP
3V3
2A/0.05DCR
1.0uF
3V3
FB4
C10
3V3
2A/0.05DCR
0.1uF
0.1uF
VDD33TXRX2
C9
C8
0.1uF
DNP
C7
1.0uF
DNP
VDDCR
56
59
D
VDD12TX1
VDD12TX2
2A/0.05DCR
VDD12TX1
VDD12TX2
FB2
3V3
Low ESR
VDD33TXRX1
1.0uF
3V3
TXNA
TXPA
RXNA
RXPA
TXNB
TXPB
RXNB
RXPB
FXSDENB/FXSDB/FXLOSB
9
FXSDA/FXLOSA
52
53
54
55
TXNA
TXPA
RXNA
RXPA
63
62
61
60
TXNB
TXPB
RXNB
RXPB
10
FXSDB/FXLOSB
B
LINKACTLED0/TDO/LEDPOL0/CHIP_MODE0
LINKACTLED1/TDI/LEDPOL1/CHIP_MODE1
RUNLED/LEDPOL2/E2PSIZE
GND
GPIO
65
LAN9252
A
A
Chennai
India
Part Number: LAN9252-SPI+MII-EVB
Page:
LAN9252(Part1)
Project
Board
Size:
LAN9252-SPI+MII-EVB Name: EVB4-LAN9252-SPI+MII
B
Name:
Date: Monday, October 27, 2014
5
4
3
2
Sheet 4
1
Rev
of
B
11
5
4
3
2
1
VDD33TXRX1
PORT0
0E
0E
FX_SFP-RXPA
DNP
R22
R23
0E
0E
COP-RXPA
3
DNP
C29
10pF
50V
5%
DNP
C30
10pF
50V
5%
DNP
C31
10pF
50V
5%
7
9
2
75
75
3
RXCT
7&8
RD-
6
1000 pF
NC
8
50V
10%
4&5
TD-
CHS GND
13
C
14
GND
DNP
C28
10pF
50V
5%
C32
0.022uF
75
RCV
6
COP-RXNA
75
TXCT
RD+
5
FX_SFP-RXNA
A
C
2
Note:
Capacitors C28 through C31 are optional for EMI purposes
and are not populated on the LAN9252 evaluation board.
These capacitors are required for operation in an EMI
constrained environment.
2 kV
YEL
R24
C
A1
DNP
R20
R21
4
COP-TXNA
D
1
12
FX_SFP-TXNA
TD+
C1
0E
0E
RJ45
XMIT
1
11
DNP
R18
R19
GRN
0E
COP-TXPA
MTG1
RXNA
FX_SFP-TXPA
R15
MTG
RXPA
0E
0E
R14
49.9
1/10W
1%
16
TXNA
DNP
R16
R17
R13
49.9
1/10W
1%
15
TXPA
R12
49.9
1/10W
1%
GND1
D
R11
49.9
1/10W
1%
10
T1
Pulse J0011D01BNL
0E
RES1210
VDD33TXRX2
PORT1
FX_SFP-RXPB
DNP
R36
R37
0E
0E
COP-RXPB
3
5
FX_SFP-RXNB
6
COP-RXNB
DNP
C34
10pF
50V
5%
DNP
C35
10pF
50V
5%
DNP
C36
10pF
50V
5%
50V
10%
7
8
TXCT
4&5
TD-
2
RCV
RD+
75
75
3
RXCT
7&8
RD-
6
1000 pF
NC
CHS GND
GND
DNP
C33
10pF
50V
5%
C37
0.022uF
1
13
A
Note:
Capacitors C33 through C36 are optional for EMI purposes
and are not populated on the LAN9252 evaluation board.
These capacitors are required for operation in an EMI
constrained environment.
R38
2 kV
YEL
A1
0E
0E
2
75
A
12
DNP
R34
R35
COP-TXNB
75
C1
FX_SFP-TXNB
B
TD+
11
0E
0E
RJ45
XMIT
MTG1
4
DNP
R32
R33
9
GRN
1
COP-TXPB
A
C
0E
MTG
RXNB
R29
16
RXPB
FX_SFP-TXPB
R28
49.9
1/10W
1%
15
TXNB
0E
0E
R27
49.9
1/10W
1%
GND1
DNP
R30
R31
TXPB
R26
49.9
1/10W
1%
14
B
R25
49.9
1/10W
1%
10
T2
Pulse J0011D01BNL
Chennai
India
0E
RES1210
Part Number: LAN9252-SPI+MII-EVB
Page:
Copper Mode Interface
Project
Board
Size:
LAN9252-SPI+MII-EVB Name: EVB4-LAN9252-SPI+MII
B
Name:
Date: Monday, October 27, 2014
5
4
3
2
Sheet 5
1
Rev
of
B
11
5
4
3V3
R39
82
D
R40
82
R41
49.9
R42
49.9
Note:Place
capacitors,
and resistors
close to FOT
C38
0.1uF
C40
0.1uF
C42
0.1uF
3
2
3V3
Fiber Port 0 :SFP Interface
R43
82
FX_SFP-RXNA
R44
82
R45
49.9
R46
49.9
1
Note:Place
capacitors,
and resistors
close to FOT
C39
0.1uF
C41
0.1uF
C43
0.1uF
Fiber Port 1 :SFP Interface
D
FX_SFP-RXNB
FX_SFP-RXPA
FX_SFP-RXPB
FX_SFP-TXPA
FX_SFP-TXPB
3V3
R47
100
3V3
R48
SFP_VCCT
SFP_VCCT2
100
C44
0.1uF
L2
SFP_VCCR
FX_SFP-TXNA
1uH
C45
0.1uF
C48 +
10uF
16V
0.1uF
R51
130
R52
130
C50 +
10uF
16V
DNP
SFP_RD2+
SFP_RD2-
C47
0.1uF
SFP_TD2SFP_TD2+
R50
130
SFP_RD+
SFP_RD-
SFP_TDSFP_TD+
R49
130
C46 +
10uF
16V
DNP
1uH
SFP_VCCR2
FX_SFP-TXNB
C49
L1
C51
C52 +
10uF
16V
0.1uF
L3
L4
C
B
R53
4.7K
R54
4.7K
C54 +
10uF
16V
C55
0.1uF
Note:Place
resistors
close to
ASIC
J3
FTLF1217P2
R55
4.7K
VeeT
TXFault
TX Disable
MOD-DEF(2)
MOD-DEF (1)
MOD-DEF (0)
Rate Select
LOS
VeeR
VeeR1
31
30
29
28
27
26
25
24
23
22
21
31
30
29
28
27
26
25
24
23
22
21
31
30
29
28
27
26
25
24
23
22
21
C56 +
10uF
16V
C57
0.1uF
1
2
3
4
5
6
7
8
9
10
SFP_VCCT2
1
2
3
4
5
6
7
8
9
10
SFP_VCCT
31
30
29
28
27
26
25
24
23
22
21
VeeT1
TDTD+
VeeT2
VccT
VccR
VeeR2
RD+
RDVeeR3
20
19
18
17
16
15
14
13
12
11
VeeT1
TDTD+
VeeT2
VccT
VccR
VeeR2
RD+
RDVeeR3
J2
FTLF1217P2
VeeT
TXFault
TX Disable
MOD-DEF(2)
MOD-DEF (1)
MOD-DEF (0)
Rate Select
LOS
VeeR
VeeR1
Note:Place
resistors
close to
ASIC
1uH
1uH
20
19
18
17
16
15
14
13
12
11
C
C53
0.1uF
R56
4.7K
R57
4.7K
R58
4.7K
R59
4.7K
B
R60
4.7K
FXSDB/FXLOSB
FXSDA/FXLOSA
A
A
Chennai
India
Part Number: LAN9252-SPI+MII-EVB
Page:
SFP Interface
Project
Board
Size:
LAN9252-SPI+MII-EVB Name: EVB4-LAN9252-SPI+MII
B
Name:
Date: Monday, October 27, 2014
5
4
3
2
Sheet 6
1
Rev
of
B
11
5
4
3
2
1
GPIO [0:2] & LED_POL_Strap
2
2
GPIO0
SW DIP-4/SM
24FC04
LED1_ANODE
LED1_CATHODE
MII_LINKPOL
LINK/ACT
2
D3 1
GRN A
C
D4 1
GRN A
2K
2K
3
1
3
GPIO1
I2C EEPROM Higher size
Above 16K(2K X 8)
LINK/ACT LED2
LED0_CATHODE
I2C2_SCL
I2C EEPROM Lower size
Below 16K(2K X 8)
C
LED0_ANODE
I2C2_SDA
6
TH IC.
Different sizes can be mounted
J16
1
3
1
J8
GPIO2
SCL
5
2
2
2
2
3
J9
1
J7
SDA
WP
R68
R67
7
R140
332
1/10W
1%
R74
1K
A0
A1
A2
4
R73
1K
2
R72
1K
8
R65
R66
1
2
3
I2C2_1
I2C2_2
I2C2_3
I2C2_7
1
2
1
2
3
4
VCC
SW3
8
7
6
5
D
0.1uF
GND
R139
10.0K
LED1_CATHODE
LEDPOL6_CATHODE
2
R64
U5
4.7K
R71
10.0K
LED0_CATHODE
LED2_CATHODE
R63
GPIO2
2
2
R70
10.0K
3
1
GPIO1
LED1_ANODE
LEDPOL6_ANODE
3V3
C58
4.7K
R69
10.0K
1
1
LED0_ANODE
LED2_ANODE
3V3
GPIO0
J15
1
2
J5
2
J6
3V3
MII_LINKPOL
3
1
GPIO1
3
1
3
1
J4
D
I2C EEPROM
3V3
GPIO2
4.7K
3V3
GPIO0
4.7K
3V3
1
3V3
LEDPOL6_ANODE
LEDPOL6_CATHODE
LINK/ACT
2
C
LEDPOL6_ANODE
LED0_CATHODE
D7 1
LED A
C
DNP
D9 1
LED A
C
C
2
2
FX_Los_Strap_1 & 2
FX_Mode_Strap_1 & 2
3V3
RUNLED
LED2_ANODE
LED2_CATHODE
D5 1
GRN A
2
C
Signals Functions
CHIP_MODE[1:0]
Port 0 = PHY A,
Port 1 = PHY B
00[Default]
01
10
>GPIO1 =LINKACTLED1/TDI/LEDPOL1/CHIP_MODE1
11
>GPIO2 = RUNLED/LEDPOL2/E2PSIZE
>LINKACTLED2/MII_LINKPOL/LEDPOL6
RESERVED
RESERVED
Straps
Port 0 = PHY A, 3 PORT
Port 1 = PHY B, DOWNSTREAM MODE
Port 2 = MII
Port 0 = MII,
3 PORT
Port 1 = PHY B, UPSTREAM MODE
Port 2 = PHY A
CHIP_MODE[1:0] Strap Details
Logic
Connector
CHIP_MODE0
0
J4,J7 (2&3)
The LED is set as active high.
1
J4,J7 (1&2)
The LED is set as active low,
0
J5,J8 (2&3)
The LED is set as active high.
1
J5,J8 (1&2)
The LED is set as active low,
0
J6,J9 (2&3)
1
J6,J9 (1&2)
The LED is set as active high.
EEPROM Size=1K bits (128 x 8) through 16K bits (2K x 8)
The LED is set as active low,
EEPROM Size=32K bits (4K x 8) through 512K bits (64K x 8) or 4Mbits (512K x 8) (LAN9252 only)
E2PSIZE
R77
10K
DNP
2 PORT MODE
Signal Name
CHIP_MODE1
3V3
MODE
R77
R79
Poupulate
DNP
0
1
MII_LINKPOL
3V3
Poupulate Poupulate
R79
10K
DNP
Poupulate
(Default) (Default)
Function
Level of 1.5 V selects FX-LOS for port 0 and
FX-SD/copper twisted pair for port 1
further determined by FXSDB
Level of 0V Selects FX-SD / copper twisted pair
0
for ports A and B
(Default) further determined by FXSDA and FXSDB.
FXSDB/FXLOSB
Straps
3V3
TX_SHIFT0
10K
JS102011CQN
3V3
SW10
2
1
3
R76
10K
R78
DNP 10K
R80
10K
3V3
PORT0
R141
DNP 10K
1V5
PORT
SW9
R142
10K
PORT1
MODE Poupulate
Copper
R76
(Default)
Fiber
R75
Copper
(Default)
Fiber
JS102011CQN
DNP
R75
R76
R80
R78
R78
R80
2
3
MII TX Shift Timing
TX_SHIFT0
MII TX Timing Shift
J15,J16 (2&3)
0
0
J15,J16 (1&2)
The LED is set as active low.(LINK/ACT LED2)
0
1
30 ns (Default)
1
0
0 ns
1
1
10 ns
Note:
--To use GPIOs as LED
* Short 2-3 of both jumpers (ex. for GPIO0 short 2-3 of J4 & J7)
A
20 ns
Chennai
India
Part Number: LAN9252-SPI+MII-EVB
Page:
STRAP,GPIO,I2C & FXLOS
Project
Board
Size:
LAN9252-SPI+MII-EVB Name: EVB4-LAN9252-SPI+MII
B
Name:
Date: Monday, October 27, 2014
4
B
1
TX_SHIFT1
The LED is set as active high.(LINK/ACT LED2)
Default-100Mbit/s Full Duplex link is established
5
FXSDA/FXLOSA
R75
Above 2 V selects FX-LOS for ports 0 and 1
LED Polarity Strap
TX_SHIFT1
A
Ref.Voltage
ATEST/FXLOSEN
>GPIO0 = LINKACTLED0/TDO/LEDPOL0/CHIP_MODE0
B
Port Description
3
2
Sheet 7
1
Rev
of
B
11
5
4
3
2
1
P8
D
C
I2C3_1
I2C3_2
I2C3_3
I2C3_7
1
2
3
7
SW DIP-4/SM
24FC512
A0
A1
A2
SDA
SCL
WP
R83
R86
VCC
1
2
3
4
4.7K
8
U6
GND
8
7
6
5
4.7K
SW4
2K
C59
0.1uF
2K
3V3
R82
R85
R84
Host SOC EEPROM
R81
3V3
5
I2C1_SDA
6
I2C1_SCL
I2C EEPROM
Only for Host SOC
4
PME_LATCH1
FIFOSEL_LATCH0
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
4.7K
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
4.7K
D
C
TP10
ORANGE
HEADER 23x2
P9
VDD3V3EXP
VDD_5V
SYS_RESETN
I2C1_SDA
STORM_SIO3
SPI_CE#
SPI_MISO
B
IRQ
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
5V
VDD3V3EXP
1
VDD_5V
2
J10
C60
DNP
0.1uF
5V power to
HOST SOC board
from EVB Board
I2C1_SCL
RST_GPIO
SYS_RESETN
STORM_SIO2
SPI_MOSI
SPI_CLK
I2C1_SDA
I2C1_SCL
PME_LATCH1
FIFOSEL_LATCH0
STORM_SIO3
SPI_CE#
SPI_MISO
STORM_SIO2
SPI_MOSI
SPI_CLK
IRQ
RST_GPIO
HEADER 23x2
2
RST_GPIO
SYS_RESETN 1 D6
2
3
SW11
B
1
RST#
JS102011CQN
DIODE
Short 1 -2 = To Reset ASIC from SoC-GPIO
Short 2-3 = To Reset SoC from ASIC
Board to Board Connectors for SoC
A
A
Chennai
India
Part Number: LAN9252-SPI+MII-EVB
Page:
BRD to BRD Interface
Project
Board
Size:
LAN9252-SPI+MII-EVB Name: EVB4-LAN9252-SPI+MII
B
Name:
Date: Monday, October 27, 2014
5
4
3
2
Sheet 8
1
Rev
of
B
11
5
4
3
2
1
D10
R90
RST_GPIO
STORM_SIO3
STORM_SIO2
C61
0.1uF
C62
10uF
1 A
C
2
GRN
100
99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
80
79
78
77
76
3V3
1K
U7
ID_SELECT_RC1
ID_SELECT_RC2
ID_SELECT_RC3
ID_SELECT_RC4
PIC_MCLR
PIM_MCLR
C
ID_SELECT_RB5
ID_SELECT_RB4
ID_SELECT_RB3
ID_SELECT_RB2
ID_SELECT_RB1
ID_SELECT_RB0
AERXERR
VDD
PMD5
PMD6
PMD7
RC1
RC2
RC3
RC4
PMA5
PMA4
AERXDV
MCLR
AERXCLK/AEREFCLK
VSS
VDD1
TMS/RA0
AERXD0
AERXD1
AN5/C1IN+/VBUSON/CN7/RB5
RB4
RB3
RB2
RB1
RB0
VSS4
SOSCO/T1CK/CN0/RC14
SOSCI/CN1/RC13
INT0
EMDC
PMCS2
SS1/IC2/RD9
EMDIO
AETXEN
AETXCLK
VSS3
OSC2/CLKO/RC15
OSC1/CLKI/RC12
VDD4
PIM CONN
TDO/RA5
PIC32MX795F512L-80I/PT
TDI/RA4
SDA2
SCL2
D+/RG2
D-/RG3
VUSB
VBUS
SCL3/SDO3/U1TX/RF8
SDA3/SDI3/U1RX/RF2
USBID/RF3
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
C63
IRQ
11pF
32Khz
Y2
C64
Aardvark / SPI Storm- Connector
11pF
J11
C65
20pF
I2C2_SCL
I2C2_SDA
8 Mhz
Y3
I2C1_SDA
I2C1_SCL
R168
C66
SPI_MISO
SPI_CLK
SPI_CE#
R62
R122
0
0
1
3
5
7
9
2
4
6
8
10
R61
0 SPI_MOSI
C
20pF
J12
0
STORM_SIO2
STORM_SIO3
3
4
1
2
J73 - SPI AARDVAR HEADER
J73+J74 - SPI STROM HEADER
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
FIFOSEL_LATCH0
PME_LATCH1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
PGEC2/AN6/RB6
PGED2/AN7/RB7
AERXD2
AERXD3
AVDD
AVSS
RB8
RB9
RB10
AETXERR
VSS1
VDD2
TCK/RA1
SCK4
SS4
AECRS
MII2_COL
PMA1/AETXD3/PMALH
PMALL/PMA0/AETXD2
VSS2
VDD3
AETXD0
AETXD1
SDI4
SDO4
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
D
100
99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
80
79
78
77
76
PIM1
PMD4
PMD3
PMD2
RG13
RG12
TRD2/RG14
PMD1
PMD0
RA7
RA6
PMD8
PMD9
PMD10
PMD11
VDD5
VCAP/VDDCORE
PMD15
PMD14
PMRD
PMWR
PMD13
PMD12
OC4/RD3
OC3/RD2
OC2/RD1
D
3V3
ID SELECT
3V3
OE
10K
10K
10K
10K
10K
10K
10K
10K
10K
10K
10K
10K
10K
10K
10K
10K
SW7
1
2
3
4
5
6
7
8
ID_SELECT_RB0
ID_SELECT_RB1
ID_SELECT_RB2
ID_SELECT_RB3
ID_SELECT_RB4
ID_SELECT_RB5
ID_SELECT_RB8
ID_SELECT_RB9
SPI_CLK
SPI_CE#
R87
DNP
SPI_MISO
SPI_MOSI
PGD2
PGC2
ID_SELECT_RB12
ID_SELECT_RB13
MCLR
ID_SELECT_RB8
ID_SELECT_RB9
ID_SELECT_RB10
ID_SELECT_RB11
B
1
2
3
4
5
6
R123
R124
R126
R125
R127
R128
R129
R130
J13
R131
R133
R134
R132
R135
R136
R137
R138
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
DBG ICSP Header
3V3
16
15
14
13
12
11
10
9
SW8
B
1
2
3
4
5
6
7
8
ID_SELECT_RB10
ID_SELECT_RB11
ID_SELECT_RB12
ID_SELECT_RB13
ID_SELECT_RC1
ID_SELECT_RC2
ID_SELECT_RC3
ID_SELECT_RC4
SW DIP-8
16
15
14
13
12
11
10
9
SW DIP-8
3V3
3V3
0.1uF
C69
C70
C71
C72
C73
C74
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
1K
C68
C75
R89
sw_pb_2P
RESET
A
0.1uF
SW6
C67
PIM_MCLR
0.1uF
PIC_MCLR
0.1uF
R88
4.7K
SW5
JS202011CQN
1
4
2
5
3
6
MCLR
SW Position 1-2 & 4-5 = PIM ON
SW Position 2-3 & 5-6 = PIC ON
A
Decap for U3
SYS_RESETN
Chennai
India
Part Number: LAN9252-SPI+MII-EVB
Page:
ON-Board-PIC32MX
Project
Board
Size:
LAN9252-SPI+MII-EVB Name: EVB4-LAN9252-SPI+MII
B
Name:
Date: Monday, October 27, 2014
5
4
3
2
Sheet 9
1
Rev
of
B
11
5
4
3
2
U4B
A4/DIGIO12/GPI12/GPO12/MII_RXD0
A3/DIGIO11/GPI11/GPO11/MII_RXDV
A2/ALEHI/DIGIO10/GPI10/GPO10/LINKACTLED2/MII_LINKPOL/LEDPOL6
A1/ALELO/OE_EXT/MII_CLK25
D
PME_LATCH1
18
FIFOSEL_LATCH0
34
MII_RXD0
MII_RXDV
MII_CLK25
MII_LINKPOL
D
31
30
28
MII_RXD3
MII_RXD2
MII_RXD1
27
26
29
25
1
RD/RD_WR/DIGIO15/GPI15/GPO15/MII_RXD3
WR/ENB/DIGIO14/GPI14/GPO14/MII_RXD2
CS/DIGIO13/GPI13/GPO13/MII_RXD1
A0/D15/AD15/DIGIO9/GPI9/GPO9/MII_RXER
D14/AD14/DIGIO8/GPI8/GPO8/MII_TXD3/TX_SHIFT1
D13/AD13/DIGIO7/GPI7/GPO7/MII_TXD2/TX_SHIFT0
D12/AD12/DIGIO6/GPI6/GPO6/MII_TXD1
D11/AD11/DIGIO5/GPI5/GPO5/MII_TXD0
D10/AD10/DIGIO4/GPI4/GPO4/MII_TXEN
D9/AD9/LATCH_IN/SCK
D8/AD8/DIGIO2/GPI2/GPO2/MII_MDIO
D7/AD7/DIGIO1/GPI1/GPO1/MII_MDC
D6/AD6/DIGIO0/GPI0/GPO0/MII_RXCLK
D5/AD5/OUTVALID/SCS#
D4/AD4/DIGIO3/GPI3/GPO3/MII_LINK
D3/AD3/WD_TRIG/SIO3
D2/AD2/SOF/SIO2
D1/AD1/EOF/SO/SIO1
D0/AD0/WD_STATE/SI/SIO0
SYNC/LATCH1
SYNC/LATCH0
33
15
16
21
22
23
19
40
39
36
50
49
35
12
13
17
MII_RXER
MII_TXD3
MII_TXD2
MII_TXD1
MII_TXD0
MII_TXEN
MII_MDIO
MII_MDC
MII_RXCLK
SPI_CLK
SPI_CE#
MII_LINK
STORM_SIO3
STORM_SIO2
SPI_MISO
SPI_MOSI
LAN9252
C
C
Ethercat Expansion Mode
MII_MDIO
MII_MDC
MII_TXD0
MII_TXD1
MII_TXD2
MII_TXD3
MII_TXEN
MII_CLK25
MII_RXD0
MII_RXD1
MII_RXD2
MII_RXD3
MII_RXDV
MII_RXCLK
MII_RXER
B
TX_SHIFT1
TX_SHIFT0
5V
J19
2
1
Brd2_OSC
OSCI_Combined
MII_TXD3
MII_TXD2
J21 1
RST#
Supply selection for Combined and Separate
Connector NumberCOMBINED MODESEPARATE MODE
5V - J19 (1&2)
Short
Open
RST# - J21 (1&2)
Short
Open
MII_RXD3
MII_RXD2
MII_RXD1
MII_RXD0
MII_RXDV
MII_RXCLK
Brd2_5V
Brd2_RST
2
Brd2_RST
Brd2_5V
MII_CLK25
MII_TXEN
MII_TXD0
MII_TXD1
MII_TXD2
MII_TXD3
J17
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
J18
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
(4 Port Mode)
MII_RXD3
MII_RXD2
MII_RXD1
MII_RXD0
MII_RXDV
MII_RXCLK
Brd2_5V
Brd2_RST
3V3
TP3
TP4
R143
4.7K
J20 = Open for 3 Port mode
J20
MII_MDIO
Brd2_OSC
1
MII_MDC
Brd2_RST
Brd2_5V
MII_CLK25
MII_TXEN
MII_TXD0
MII_TXD1
MII_TXD2
MII_TXD3
2
(*short)
B
10K
R144 DNP
J22
MII_RXER
1
2
(*open)
J23
MII_LINK
1
2
Note:
Ethercat Expansion mode short J23- 1&2
Place to near MII conn,to connect fly wires.
A
A
Chennai
India
Part Number: LAN9252-SPI+MII-EVB
Page:
Expansion Mode Interface
Project
Board
Size:
LAN9252-SPI+MII-EVB Name: EVB4-LAN9252-SPI+MII
B
Name:
Date: Monday, October 27, 2014
5
4
3
2
Sheet 10
1
Rev
of
B
11
4
3V3
3V3
Standard Link Detection
R150
10.0K
R145
1K
VDD RESET
SENSE GND
CT
MR
1
2
3
RST_Delay
5V
0.001uF
6
5
4
C79
0.001uF
180mS=176.17nF
800mS=180.1nF
180mS=176.17nF DNP
800mS=180.1nF
PHY reset release delay with transceiver power Down/Reset
DNP
R155
MII_LINK
J25
3V3
RC2
RC3
RC5
3V3
C83
DNP
External Port 2 Interface
Enhanced Link Detection
R156
100K
200 mS
300 mS
500 mS
1
3
5
7
2
4
6
8
J24
0E
RST#
2
RST_Delay
RC4
VCC_EXT0
0.1uF
D8
1
IN4148
1
2
3
4
5
6
7
8
5V VCC_EXT0
C
RA4
MCLR
RC5
RC4
RC3
sw_pb_2P
VDD
VSS
RA5
RA0/ICSPDAT
RA4
RA1/ICSPCLK
MCLR/VPP/RA3
RA2
RC5
RC0
RC4
RC1
RC3
RC2
14
13
12
11
10
9
8
ICSPDAT
ICSPCLK
RC4
MII_MDC
MII_MDIO
RC2
PIC16F1824-I/ST
1
Note:
Default open.
When used J30 DNP J29
VCC_EXT0
1
2
3
4
5
6
MCLR
U11
3
ICSPDAT
ICSPCLK
R164
0E
1
J30
2
5V_Delay
DBG ICSP Header
1K
1
(1-2*)
DNP
R162
R163
100K
2
3
4
S1
D1
S2
D2
S3
D3
G
D4
8
Open
(Default)
7
5
Short 2&3
MII_MDIO
MII_MDC
MII_TXD0
MII_TXD1
MII_TXD2
MII_TXD3
MII_TXEN
MII_CLK25
MII_RXD0
MII_RXD1
MII_RXD2
MII_RXD3
MII_RXDV
MII_RXCLK
MII_RXER
C84
J27
MII_MDIO
MII_MDC
MII_RXD3
MII_RXD2
MII_RXD1
MII_RXD0
MII_RXDV
MII_RXCLK R160
MII_RXER
TXER
MII_CLK25 R161
MII_TXEN
MII_TXD0
MII_TXD1
MII_TXD2
MII_TXD3
COL
CRS
33E
33E
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
+5V1
MDIO
MDC
RXD3
RXD2
RXD1
RXD0
RX_DV
RX_CLK
RX_ER
TX_ER
TX_CLK
TX_EN
TXD0
TXD1
TXD2
TXD3
COL
CRS
+5V2
+5V4
GND1
GND2
GND3
GND4
GND5
GND6
GND7
GND8
GND9
GND10
GND11
GND12
GND13
GND14
GND15
GND16
GND17
GND18
+5V3
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
B
5173277-2
MII Female for External PHY Board
Note:
Ethercat external board (Port2_TXER,COL,CRS signals not used)
Link Detection selection J30
Short 1&2
Q2
BC547
DNP
R165
10.0K
MCP87130
Enhanced
1
6
Link Detection Selection
Standard
0.1uF
Open
(Default)
42
41
J28
2
B
1K
TP5
TP6
TP7
WHITE WHITE WHITE
5V
3V3
R159
2
1
2
3
4
5
6
7
C82
3
U10
R158
4.7K
SW12
10uF
J26
2
RA4
R157
100K
D
5V_Delay
PHY Power sequencing with transceiver power Down/Reset
RST#
C
1
2
3
VDD RESET
SENSE GND
CT
MR
NCP308SNADJT1G
C80
R153
374E
C81
5V
U9
R151
0E
NCP308SNADJT1G
R154
374E
R147
10.0K
R146
ZERO
U8
6
5
4
R152
0E
C78
0.1uF
3
D
Standard Link Detection
5V
C76
R149
ZERO
1
3V3
0.1uF
R148
1K
RST#
2
1
C77
3
42
41
5
uC detects auto-negotiation restart command and
power down PHY and transceiver / resets PHY and transceiver
A
A
Chennai
India
Part Number: LAN9252-SPI+MII-EVB
Page:
Ethercat Expansion Mode
Project
Board
Size:
LAN9252-SPI+MII-EVB Name: EVB4-LAN9252-SPI+MII
B
Name:
Date: Monday, October 27, 2014
5
4
3
2
Sheet 11
1
Rev
of
B
11