5 4 3 2 1 Reference Schematic for LAN9252-HBI-Indexed Mode D D Configurations HBI Indexed mode EEPROM - 24FC512 (High) 2Port mode Port0 & Port1 = Copper C C Page No. B Schematic Page 1 Title 2 Power Supply 3 LAN9252(Part1) 4 LAN9252(Part2), Strap & EEPROM 5 Copper Mode Interface B A A Chennai India Part Number: Size: Date: 5 4 3 2 B LAN9252-HBI Indexed Mode Project Name: LAN9252 Page: Board Name: TITLE Rev Sheet Friday, May 22, 2015 1 1 of A 5 5 4 3 2 1 D D POWER SUPPLY J1 PJ-002AH Cui Stack U1 EN12_1 FB1 R2 SW1 1101M2S3CQE2 C&K C2 10uF 25V 2 1 VIN ENABLE VOUT TRIM 0E C3 0.1uF 3_Amp C 3 GND OKR-T/3-W12-C R1 4 5 DNP C1 R3 3.30K 1% (Ra) Murata R4 470E 1% (Rb) R4A1 33E 1% C4 C5 10uF 0.1uF 1K 4.7uF 1 2 3 A 1 3V3 3V3 D1 GRN C 5V_EXT 2 3 TP2 ORANGE 3 V REGULATOR, 3A ( 3V3 fixed when Rb=470E) 2 1 TP1 RED 2A/0.05DCR BLM18EG221SN1D Murata 5V_SW "3V3 Present" 5V C B B A A Chennai India Part Number: Size: Date: 5 4 3 2 B LAN9252-HBI Indexed Mode Project Name: LAN9252 Page: Board Name: Power Supply Rev Sheet Friday, May 22, 2015 1 2 of A 5 5 4 FB2 2A/0.05DCR BLM18EG221SN1D Murata 3V3 3 2 1 Power Supply Filtering VDD33TXRX1 3V3 D VDDCR D VDD12TX1 VDD12TX2 C19 0.1uF 0.1uF FB5 2A/0.05DCR BLM18EG221SN1D Murata C15 C16 C17 C18 0.1uF 0.1uF C14 0.1uF 1uF C13 0.1uF 470pF C12 0.1uF Low ESR C11 0.1uF Note:Place close to the IC VDD12TX1 VDD12TX2 Note:Place close to the IC C9 VDDCR VDD33TXRX1 VDD33TXRX2 C20 3V3 C10 3V3 0.1uF FB4 2A/0.05DCR BLM18EG221SN1D Murata 0.1uF 3V3 C8 VDD33TXRX2 0.1uF 0.1uF C7 FB3 2A/0.05DCR BLM18EG221SN1D Murata 0.1uF C6 18pF REG_EN R5 12.1K 1% RBIAS RST# 11 3V3 1 IRQ ATEST/FXLOSEN R6 10.0K 1/10W 1% 44 8 41 RBIAS RST# C23 0.1uF I2C2_SCL I2C2_SDA 43 42 GPIO0 GPIO1 GPIO2 48 46 45 6 24 38 56 59 VDD12TX1 VDD12TX2 TXNA TXPA RXNA RXPA 9 FXSDA/FXLOSA 52 53 54 55 TXNA TXPA RXNA RXPA 63 62 61 60 TXNB TXPB RXNB RXPB 10 FXSDB/FXLOSB IRQ ATEST/FXLOSEN TESTMODE B I2CSCL/EESCL/TCK I2CSDA/EESDA/TMS I2C RST# VDDCR1 VDDCR2 VDDCR3 14 20 32 37 47 VDDIO1 VDDIO2 VDDIO3 VDDIO4 VDDIO5 REG_EN 2 B 7 57 FXSDENA/FXSDA/FXLOSA INT PORT0 C22 OSCVDD12 OSCI OSCO OSCVSS INT PORT1 (Only for Lan9252) 1 3V3 OTHER SIGNALS 3 1 2 4 OSCI OSCO VDD33BIAS VDD33 POWER 25.000MHz 25ppm OSC Y1 Citizen America HCM49-24.000MABJT VDD33TXRX1 VDD33TXRX2 18pF 2 C21 58 5 C U2A Note: PIN 4_OSCVSS need to connect Chip Gnd. 51 64 C TXNB TXPB RXNB RXPB FXSDENB/FXSDB/FXLOSB LINKACTLED0/TDO/LEDPOL0/CHIP_MODE0 LINKACTLED1/TDI/LEDPOL1/CHIP_MODE1 RUNLED/LEDPOL2/E2PSIZE GND GPIO Reset CKT 65 LAN9252 Microchip A A Chennai India Part Number: Size: Date: 5 4 3 2 B LAN9252-HBI Indexed Mode Project Name: LAN9252 Page: Board Name: LAN9252(Part1) Rev Sheet Friday, May 22, 2015 1 3 of A 5 5 4 3 U2B A4/DIGIO12/GPI12/GPO12/MII_RXD0 A3/DIGIO11/GPI11/GPO11/MII_RXDV A2/ALEHI/DIGIO10/GPI10/GPO10/LINKACTLED2/MII_LINKPOL/LEDPOL6 A1/ALELO/OE_EXT/MII_CLK25 RD/RD_WR WR_ENB CS 31 30 28 D SYNC1/LATCH1 18 SYNC0/LATCH0 34 27 26 29 25 2 1 A4 A3 A2 A1 J2 RD/RD_WR/DIGIO15/GPI15/GPO15/MII_RXD3 WR/ENB/DIGIO14/GPI14/GPO14/MII_RXD2 CS/DIGIO13/GPI13/GPO13/MII_RXD1 A0/D15/AD15/DIGIO9/GPI9/GPO9/MII_RXER D14/AD14/DIGIO8/GPI8/GPO8/MII_TXD3/TX_SHIFT1 D13/AD13/DIGIO7/GPI7/GPO7/MII_TXD2/TX_SHIFT0 D12/AD12/DIGIO6/GPI6/GPO6/MII_TXD1 D11/AD11/DIGIO5/GPI5/GPO5/MII_TXD0 D10/AD10/DIGIO4/GPI4/GPO4/MII_TXEN D9/AD9/LATCH_IN/SCK D8/AD8/DIGIO2/GPI2/GPO2/MII_MDIO D7/AD7/DIGIO1/GPI1/GPO1/MII_MDC D6/AD6/DIGIO0/GPI0/GPO0/MII_RXCLK D5/AD5/OUTVALID/SCS# D4/AD4/DIGIO3/GPI3/GPO3/MII_LINK D3/AD3/WD_TRIG/SIO3 D2/AD2/SOF/SIO2 D1/AD1/EOF/SO/SIO1 D0/AD0/WD_STATE/SI/SIO0 SYNC/LATCH1 SYNC/LATCH0 LAN9252 33 15 16 21 22 23 19 40 39 36 50 49 35 12 13 17 D0 D2 D4 D6 D8 D10 D12 D14 A1 A3 RD/RD_WR WR_ENB CS A0/D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 2 4 6 8 10 12 14 16 18 20 22 24 26 D1 D3 D5 D7 D9 D11 D13 A0/D15 A2 A4 SYNC1/LATCH1 SYNC0/LATCH0 D IRQ SoC Interface Header TSW-113-7-G-D Samtec In 8Bit Indexed mode A0/D15 need to connect to 'A0' of SoC In 16Bit Indexed mode A0/D15 need to connect to 'D15' of SoC HBI Indexed Mode Microchip 1 3 5 7 9 11 13 15 17 19 21 23 25 Note: In SoC, If RD & WR is different pins then RD need to connect with pin 31 & WR need to connect with pin 30 C C If RD & WR are same pin, then RD_WR need to Connect with pin 31, and the ENB need to connect with pin30 I2C EEPROM 10K 1 3V3 GPIO1 =LINKACTLED1/TDI/LEDPOL1/CHIP_MODE1 GPIO2 = RUNLED/LEDPOL2/E2PSIZE C24 R8 10K U3 FXSDB/FXLOSB GPIO1 GPIO1 3V3 2 R14 00[Default] 1 10.0K 01 RUNLED D2 1 GRN A 10 2 R15 1K 1 R16 2 10.0K C 11 Port Description Port 0 = PHY A, Port 1 = PHY B MODE 2 PORT MODE RESERVED RESERVED Port 0 = PHY A, Port 1 = PHY B, Port 2 = MII Port 0 = MII, Port 1 = PHY B, Port 2 = PHY A 3 PORT DOWNSTREAM MODE (Port2 = Downstream) 3 PORT UPSTREAM MODE (Port0 = Upstream) FX_Los_Strap_1 & 2 ATEST/FXLOSEN R12 7 SCL WP 10K 24FC512 Signal ATEST/ FXLOSEN Ref.Voltage 0 SDA Function B 5 I2C2_SDA 6 I2C2_SCL GND CHIP_MODE[1:0] Strap Details CHIP_MODE[1:0] GPIO[1:0] 1 10.0K A0 A1 A2 R11 GPIO0 2 R13 4.7K GPIO0 1 2 3 0.1uF 4 B VCC PORT1 = Copper GPIO [0:2] & LED_POL_Strap 3V3 PORT0 = Copper 2K The LED is set as active low, EEPROM Size P/N = 24FC512 32K bits (4K x 8) through 512K bits (64K x 8) or 4Mbits (512K x 8) (LAN9252 only) [Default] R9 (GPIO2) (RUNLED) R10 R7 FXSDA/FXLOSA E2PSIZE 8 Signals Functions GPIO0 = LINKACTLED0/TDO/LEDPOL0/CHIP_MODE0 FX_Mode_Strap_1 & 2 The LED is set as active high. Low EEPROM Size P/N = 24C04 1K bits (128 x 8) through 16K bits (2K x 8); 0 2K Strap Details Higher size EEPROM - 24FC512 used as Default Strap-E2PSIZE(GPIO2) is HIGH Microchip To use Lower size EEPROM - 24C04, Strap-E2PSIZE(GPIO2) to be changed to LOW Level of 0V Selects FX-SD / copper twisted pair for ports 0 and 1 further determined by FXSDA and FXSDB. GPIO2 A A Chennai India Part Number: Size: Date: 5 4 3 2 B LAN9252-HBI Indexed Mode Project Name: LAN9252 Page: Board Name: LAN9252(Part2), Strap & EEPROM Rev Sheet Friday, May 22, 2015 1 4 of A 5 5 4 3 2 VDD33TXRX1 R17 330E 1 GPIO0 T1 R19 49.9 1/10W 1% R20 49.9 1/10W 1% R21 49.9 1/10W 1% R22 0E A C R18 49.9 1/10W 1% D Green = Link/ACT 10 Pulse J0011D01BNL 9 Port 0 GRN 1 TXPA 4 TXNA 2 RXPA 3 RJ45 D XMIT TD+ 75 1 75 TXCT 4&5 TD- 2 RCV 1000 pF CHS GND 14 13 Note: Capacitors C25 through C28 are optional for EMI purposes and are not populated on the LAN9252 evaluation board. These capacitors are required for operation in an EMI constrained environment. YEL R23 C A1 C 12 NC 2 kV C1 8 50V 10% 6 RD- 11 7 MTG1 DNP C28 10pF 50V 5% MTG DNP C27 10pF 50V 5% 16 DNP C26 10pF 50V 5% GND DNP C25 10pF 50V 5% C29 0.022uF 3 75 7&8 15 6 RXNA 75 RXCT GND1 5 RD+ Yellow = Speed NA for EtherCAT 0E RES1210 VDD33TXRX2 R24 330E T2 R26 49.9 1/10W 1% R27 49.9 1/10W 1% R28 49.9 1/10W 1% R29 0E GRN B 1 TXPB 4 TXNB 2 RXPB 3 A C R25 49.9 1/10W 1% GPIO1 Green = Link/ACT 10 Pulse J0011D01BNL 9 Port 1 RJ45 XMIT B TD+ 75 75 1 TXCT 4&5 TD- 2 RCV 1000 pF CHS GND 13 Note: Capacitors C30 through C33 are optional for EMI purposes and are not populated on the LAN9252 evaluation board. These capacitors are required for operation in an EMI constrained environment. R30 A1 A YEL 12 NC 2 kV C1 8 3 6 RD- 11 50V 10% 7 MTG1 C34 0.022uF MTG DNP C33 10pF 50V 5% 16 DNP C32 10pF 50V 5% 75 7&8 15 DNP C31 10pF 50V 5% GND DNP C30 10pF 50V 5% 75 RXCT GND1 6 RXNB RD+ 14 5 A Yellow = Speed NA for EtherCAT Chennai India 0E RES1210 Part Number: Size: Date: 5 4 3 2 B LAN9252-HBI Indexed Mode Project Name: LAN9252 Page: Board Name: Copper Mode Interface Rev Sheet Friday, May 22, 2015 1 5 of A 5