INTERSIL HA-2505

HA-2505
Data Sheet
12MHz, High Input Impedance,
Operational Amplifier
May 1999
• Slew Rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30V/µs
This dielectrically isolated amplifier is ideally suited for
applications such as data acquisition, RF, video, and pulse
conditioning circuits. Slew rates of ±30V/µs and 330ns
(0.1%) settling time make this device an excellent
component in fast, accurate data acquisition and pulse
amplification designs. 12MHz small signal bandwidth and
500kHz power bandwidth make this device well suited to RF
and video applications. With 2mV typical offset voltage plus
offset trim capability and 10nA offset current, HA-2505 is
particularly useful in signal conditioning designs.
The gain and offset voltage figures of the HA-2505 are
optimized by internal component value changes while the
similar design of the HA-2515 is maximized for slew rate.
• Fast Settling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 330ns
• Full Power Bandwidth . . . . . . . . . . . . . . . . . . . . . . 500kHz
• Gain Bandwidth . . . . . . . . . . . . . . . . . . . . . . . . . . . 12MHz
• High Input Impedance . . . . . . . . . . . . . . . . . . . . . . 50MΩ
• Low Offset Current . . . . . . . . . . . . . . . . . . . . . . . . . . 10nA
• Internally Compensated For Unity Gain Stability
Applications
• Data Acquisition Systems
• RF Amplifiers
• Video Amplifiers
• Signal Generators
Pinout
HA-2505 (PDIP)
TOP VIEW
MIL-STD-883 product and data sheets are available upon
request.
Ordering Information
HA3-2505-5
TEMP RANGE
(oC)
0 to 75
PACKAGE
8 Ld PDIP
1
2890.5
Features
HA-2505 is an operational amplifier whose design is
optimized to deliver excellent slew rate, bandwidth, and
settling time specifications. The outstanding dynamic
features of this internally compensated device are
complemented with low offset voltage and offset current.
PART
NUMBER
File Number
PKG. NO.
E8.3
BAL
1
-IN
2
+IN
3
V-
4
+
8
COMP
7
V+
6
OUT
5
BAL
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
HA-2505
Schematic
BAL
BAL
V+
R6
R9
200 200
R5
200
Q1
R7 R10
1.8K 1.8K
R1
4K
Q2
Q6
Q5
R3
960
Q7
R11
2K
Q8
R2
2K
Q3
R8
200
Q9
Q10
R13
30
Q12 Q15
R4
11.13K
Q37
Q35
R25
Q29
Q30
Q34
Q32
Q36
Q39
800
R19
6.3K
R26
Q28
R23
3.3K
Q27
R22
1.12K
R20
3.3K
R14
30
Q18
Q19
Q13
Q25
Q26
Q31
Q33
Q17
Q40
Q38
800
+ INPUT
OUTPUT
Q14
Q4
COMP
Q16
Q11
C1
10pF
C2
10.6pF
R12
1.1K
Q23
Q22
Q24
R18
1.48K
R17
1.48K
R16
1.48K
Q20
Q21
R15
740
V-
- INPUT
2
HA-2505
Absolute Maximum Ratings
Thermal Information
Supply Voltage Between V+ and V- Terminals. . . . . . . . . . . . . . 40V
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15V
Peak Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50mA
Thermal Resistance (Typical, Note 1)
θJA (oC/W)
PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
96
Maximum Junction Temperature (Plastic Package) . . . . . . . . 150oC
Maximum Storage Temperature Range . . . . . . . . . -65oC to 150oC
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300oC
Operating Conditions
Temperature Range
HA-2505-5 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0oC to 75oC
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. θJA is measured with the component mounted on an evaluation PC board in free air.
VS = ±15V
Electrical Specifications
HA-2505-5
TEMP
(oC)
MIN
TYP
MAX
UNITS
Offset Voltage
25
-
4
8
mV
Full
-
-
10
mV
Offset Voltage Average Drift
Full
-
20
-
µV/oC
25
-
125
250
nA
Full
-
-
500
nA
25
-
20
50
nA
Full
-
-
100
nA
PARAMETER
INPUT CHARACTERISTICS
Bias Current
Offset Current
Input Resistance (Note 2)
25
20
50
-
MΩ
Common Mode Range
Full
±10
-
-
V
Large Signal Voltage Gain (Notes 3, 6)
25
15
25
-
kV/V
Full
10
-
-
kV/V
Common Mode Rejection Ratio (Note 4)
Full
74
90
-
dB
Gain Bandwidth Product (Note 5)
25
-
12
-
MHz
Output Voltage Swing (Note 3)
Full
±10
±12
-
V
Output Current (Note 6)
25
±10
±20
-
mA
Full Power Bandwidth (Notes 6, 11)
25
300
500
-
kHz
Rise Time (Notes 3, 7, 8, 9)
25
-
25
50
ns
Overshoot (Notes 3, 7, 8, 9)
25
-
25
50
%
Slew Rate (Notes 3, 7, 9, 12)
25
±20
±30
-
V/µs
Settling Time to 0.1% (Notes 3, 7, 9, 12)
25
-
0.33
-
µs
Supply Current
25
-
4
6
mA
PSRR (Note 10)
Full
74
90
-
dB
TRANSFER CHARACTERISTICS
OUTPUT CHARACTERISTICS
TRANSIENT RESPONSE
POWER SUPPLY CHARACTERISTICS
NOTES:
2. This parameter value is based on design calculations.
3. RL = 2kΩ.
8. VO = ±200mV.
9. See Transient Response Test Circuits and Waveforms.
4. VCM = ±10V.
10. ∆V = ±5V.
5. AV > 10.
11. Full Power Bandwidth guaranteed based on slew rate measurement
using: FPBW = Slew Rate/2πVPEAK.
6. VO = ±10V.
12. VOUT = ±5V.
7. CL = 50pF.
3
HA-2505
Test Circuits and Waveforms
+200mV
+5V
INPUT
INPUT
0mV
-5V
+5V
OVERSHOOT
75%
OUTPUT
-5V
+200mV
90%
∆V
25%
ERROR BAND
±10mV FROM
FINAL VALUE
SLEW
RATE
= ∆V/∆t
∆t
OUTPUT
10%
0mV
RISE TIME
SETTLING
TIME
NOTE: Measured on both positive and negative transitions from
0V to +200mV and 0V to -200mV at the output.
FIGURE 1. SLEW RATE AND SETTLING TIME
FIGURE 2. TRANSIENT RESPONSE
+
IN
OUT
2kΩ
50pF
RL = 2kΩ, CL = 50pF
Upper Trace: Input
Lower Trace: Output
FIGURE 3. SLEW RATE AND TRANSIENT RESPONSE
Vertical = 5V/Div.
Horizontal = 200ns/Div.
TA = 25oC, VS = ±15V
FIGURE 4. VOLTAGE FOLLOWER PULSE RESPONSE
1µF
V+
V+
INPUT
2
3
2kΩ
+
7 0.01µF
6
4
OUTPUT
1µF
20kΩ
RT
50pF
5kΩ
VD
G
2N4416
0.01µF
2kΩ
5kΩ
S
IN
OUT
BAL
COMP
V-
CC
SETTLING TIME
TEST POINT
CR1
2kΩ
CR2
13. AV = -1.
14. Feedback and Summing Resistor Ratios should be 0.1%
matched.
NOTE: Tested offset adjustment range is |VOS + 1mV| minimum
referred to output. Typical ranges are ±6mV with RT = 20kΩ.
15. Clipping Diodes CR1 and CR2 are optional. HP5082-2810
recommended.
FIGURE 5. SETTLING TIME TEST CIRCUIT
4
FIGURE 6. SUGGESTED VOS ADJUSTMENT AND
COMPENSATION HOOK UP
HA-2505
Typical Performance Curves VS = ±15V, TA = 25oC, Unless Otherwise Specified
100
EQUIVALENT INPUT NOISE (µVRMS)
100
80
BIAS CURRENT
40
20
OFFSET CURRENT
0
-20
-40
-50
-25
0
25
50
TEMPERATURE (oC)
75
100
OPEN LOOP VOLTAGE GAIN (dB)
NORMALIZED PARAMETERS REFERRED
TO VALUES AT 25oC
1kHz
10kHz
100kHz
1MHz
FIGURE 8. EQUIVALENT INPUT NOISE vs BANDWIDTH
(WITH 10Hz HIGH PASS FILTER)
1.0
BANDWIDTH
SLEW RATE
0.9
75
100
125
FIGURE 9. NORMALIZED AC PARAMETERS vs TEMPERATURE
120
0
100
30
80
GAIN
60
PHASE
60
90
40
120
20
150
0
180
-20
10
0.8
0
25
50
TEMPERATURE (oC)
THERMAL NOISE
OF 10K RESISTOR
FREQUENCY (Hz)
1.1
-25
1.0
0.1
100Hz
125
FIGURE 7. INPUT BIAS AND OFFSET CURRENT vs
TEMPERATURE
-50
10K SOURCE RESISTANCE
0 SOURCE RESISTANCE
10
100
1K
10K
100K
FREQUENCY (Hz)
1M
10M
PHASE (DEGREES)
CURRENT (nA)
60
100M
FIGURE 10. OPEN LOOP FREQUENCY AND PHASE
RESPONSE
OPEN LOOP VOLTAGE GAIN (dB)
BANDWIDTH
TO VALUES AT ±15V
NORMALIZED PARAMETERS REFERRED
120
1.1
1.0
SLEW RATE
0.9
0.8
10
100
60
40
20
20
300pF
1000pF
0
-20
10
15
SUPPLY VOLTAGE (±V)
0pF
30pF
100pF
80
100
1K
10K
100K
FREQUENCY (Hz)
1M
10M
100M
NOTE: External compensation components are not required for
stability, but may be added to reduce bandwidth if desired.
FIGURE 11. NORMALIZED AC PARAMETERS vs SUPPLY
VOLTAGE
5
FIGURE 12. OPEN LOOP FREQUENCY RESPONSE FOR
VARIOUS VALUES OF CAPACITORS FROM
COMPENSATION PIN TO GROUND
HA-2505
Typical Performance Curves VS = ±15V, TA = 25oC, Unless Otherwise Specified
(Continued)
35
OUTPUT VOLTAGE SWING (VP-P)
VSUPPLY = ±20V
VSUPPLY = ±15V
VSUPPLY = ±10V
GAIN (dB)
90
80
-50
-25
0
25
50
75
100
125
VSUPPLY = ±20V
30
25
VSUPPLY = ±15V
20
15
VSUPPLY = ±10V
10
5
0
10K
100K
1MEG
10MEG
FREQUENCY (Hz)
TEMPERATURE (oC)
FIGURE 13. OPEN LOOP VOLTAGE GAIN vs TEMPERATURE
FIGURE 14. OUTPUT VOLTAGE SWING vs FREQUENCY
SUPPLY CURRENT (mA)
5
VSUPPLY = ±20V
VSUPPLY = ±15V
VSUPPLY = ±10V
4
3
-50
-25
0
25
50
TEMPERATURE (oC)
75
100
125
FIGURE 15. POWER SUPPLY CURRENT vs TEMPERATURE
6
HA-2505
Die Characteristics
SUBSTRATE POTENTIAL (POWERED UP):
DIE DIMENSIONS:
Unbiased
57 mils x 65 mils x 19 mils
1450µm x 1650µm x 483µm
TRANSISTOR COUNT:
METALLIZATION:
40
Type: Al, 1% Cu
Thickness: 16kÅ ± 2kÅ
PROCESS:
Bipolar Dielectric Isolation
PASSIVATION:
Type: Nitride (Si3N4) over Silox (SiO2, 5% Phos.)
Silox Thickness: 12kÅ ± 2kÅ
Nitride Thickness: 3.5kÅ ± 1.5kÅ
Metallization Mask Layout
HA-2505
+IN
-IN
BAL
COMP
V-
V+
BAL
7
OUT
HA-2505
Dual-In-Line Plastic Packages (PDIP)
E8.3 (JEDEC MS-001-BA ISSUE D)
N
8 LEAD DUAL-IN-LINE PLASTIC PACKAGE
E1
INDEX
AREA
1 2 3
INCHES
N/2
-B-
-AD
E
BASE
PLANE
-C-
A2
SEATING
PLANE
A
L
D1
e
B1
A1
D1
eC
B
0.010 (0.25) M
C A B S
MILLIMETERS
SYMBOL
MIN
MAX
MIN
MAX
NOTES
A
-
0.210
-
5.33
4
A1
0.015
-
0.39
-
4
A2
0.115
0.195
2.93
4.95
-
B
0.014
0.022
0.356
0.558
-
C
L
B1
0.045
0.070
1.15
1.77
8, 10
eA
C
0.008
0.014
0.204
C
D
0.355
0.400
9.01
D1
0.005
-
0.13
-
5
E
0.300
0.325
7.62
8.25
6
E1
0.240
0.280
6.10
7.11
5
eB
NOTES:
1. Controlling Dimensions: INCH. In case of conflict between
English and Metric dimensions, the inch dimensions control.
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Symbols are defined in the “MO Series Symbol List” in Section
2.2 of Publication No. 95.
4. Dimensions A, A1 and L are measured with the package seated
in JEDEC seating plane gauge GS-3.
5. D, D1, and E1 dimensions do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.010 inch
(0.25mm).
6. E and eA are measured with the leads constrained to be perpendicular to datum -C- .
7. eB and eC are measured at the lead tips with the leads unconstrained. eC must be zero or greater.
8. B1 maximum dimensions do not include dambar protrusions.
Dambar protrusions shall not exceed 0.010 inch (0.25mm).
9. N is the maximum number of terminal positions.
10. Corner leads (1, N, N/2 and N/2 + 1) for E8.3, E16.3, E18.3,
E28.3, E42.6 will have a B1 dimension of 0.030 - 0.045 inch
(0.76 - 1.14mm).
e
0.100 BSC
eA
0.300 BSC
eB
-
L
0.115
N
8
0.355
10.16
5
2.54 BSC
-
7.62 BSC
6
0.430
-
0.150
2.93
10.92
7
3.81
4
8
9
Rev. 0 12/93
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Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
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