TJA1059 Dual high-speed CAN transceiver with Standby mode Rev. 2 — 15 January 2015 Product data sheet 1. General description The TJA1059 is a dual high-speed CAN transceiver that provides an interface between a Controller Area Network (CAN) protocol controller and the physical two-wire CAN-bus. The transceiver is designed for high-speed CAN applications in the automotive and truck industries. It provides differential transmit and receive capabilities to (a microcontroller with) a CAN protocol controller. The TJA1059 belongs to the third generation of high-speed CAN transceivers from NXP Semiconductors, offering significant improvements over first- and second-generation devices such as the TJA1040. It offers improved Electro Magnetic Compatibility (EMC) and ElectroStatic Discharge (ESD) performance, and also features: • • • • Ideal passive behavior to the CAN-bus when the supply voltage is off A very low-current Standby mode with bus wake-up capability on both channels Can be interfaced directly to microcontrollers with supply voltages from 3 V to 5 V Complies with global OEM requirements, allowing a one-fits-all approach The TJA1059 implements the CAN physical layer as defined in the current ISO11898 standard (ISO11898-2:2003, ISO11898-5:2007). Pending the release of the updated version of ISO11898-2 including CAN FD, additional timing parameters defining loop delay symmetry are specified. This implementation enables reliable communication in the CAN FD fast phase at data rates up to 2 Mbit/s. These features make the TJA1059 an excellent choice for all types of HS-CAN networks containing more than one HS-CAN interface requiring a low-power mode with wake-up capability via the CAN-bus, especially for Body Control and Gateway units. 2. Features and benefits 2.1 General Two TJA1049 HS-CAN transceivers combined monolithically in a single package Fully ISO 11898-2:2003 and ISO 11898-5:2007 compliant Loop delay symmetry timing enables reliable communication at data rates up to 2 Mbit/s in the CAN FD fast phase Suitable for 12 V and 24 V systems Low ElectroMagnetic Emission (EME) and high ElectroMagnetic Immunity (EMI) Excellent ElectroMagnetic Compatibility (EMC) performance, satisfying 'Hardware Requirements for LIN, CAN and FlexRay Interfaces in Automotive Applications’, Version 1.3, May 2012. VIO input allows for direct interfacing with 3 V to 5 V microcontrollers TJA1059 NXP Semiconductors Dual high-speed CAN transceiver with Standby mode Leadless HVSON14 package (3.0 mm 4.5 mm) with improved Automated Optical Inspection (AOI) capability Dark green product (halogen free and Restriction of Hazardous Substances (RoHS) compliant) AEC-Q100 qualified 2.2 Predictable and fail-safe behavior Functional behavior predictable under all supply conditions Transceiver disengages from bus when not powered (zero load) Transmit Data (TXD) and bus dominant time-out functions Undervoltage detection on pins VCC and VIO Internal biasing of TXD1/TXD2 and STB1/STB2 input pins 2.3 Low-power management Very low-current Standby mode with host and bus wake-up capability Wake-up receiver powered by VIO; allows shut down of VCC 2.4 Protection High ESD handling capability on the bus pins Bus pins protected against transients in automotive environments Thermally protected High-voltage robustness on the bus pins 3. Quick reference data Table 1. Quick reference data Symbol Parameter Min Typ Max Unit VCC supply voltage Conditions 4.75 - 5.25 V VIO supply voltage on pin VIO 2.85 - 5.25 V Vuvd(VCC) undervoltage detection voltage on pin VCC 3.5 - 4.5 V Vuvd(VIO) undervoltage detection voltage on pin VIO 1.3 2.0 2.7 V ICC supply current - 0.5 5 A both channels recessive - - 20 mA one channel dominant - - 80 mA both channels dominant - 90 140 mA Standby mode; VTXD = VIO - 16.5 27 A both channels recessive - - 55 A one channel dominant - - 400 A Standby mode Normal mode IIO supply current on pin VIO Normal mode both channels dominant VESD electrostatic discharge voltage TJA1059 Product data sheet IEC 61000-4-2 at pins CANHx and CANLx All information provided in this document is subject to legal disclaimers. Rev. 2 — 15 January 2015 - - 600 A 6 - +6 kV © NXP Semiconductors N.V. 2015. All rights reserved. 2 of 22 TJA1059 NXP Semiconductors Dual high-speed CAN transceiver with Standby mode Table 1. Quick reference data …continued Symbol Parameter Conditions Min Typ Max Unit VCANH voltage on pin CANH pins CANH1 and CANH2 58 - +58 V VCANL voltage on pin CANL pins CANL1 and CANL2 58 - +58 V Tvj virtual junction temperature 40 - +150 C 4. Ordering information Table 2. Ordering information Type number TJA1059TK TJA1059 Product data sheet Package Name Description Version HVSON14 plastic, thermal enhanced very thin small outline package; no leads; 14 terminals; body 3 4.5 0.85 mm SOT1086-2 All information provided in this document is subject to legal disclaimers. Rev. 2 — 15 January 2015 © NXP Semiconductors N.V. 2015. All rights reserved. 3 of 22 TJA1059 NXP Semiconductors Dual high-speed CAN transceiver with Standby mode 5. Block diagram 9,2 9&& 7(03(5$785( 3527(&7,21 9&&9,2 81'(592/7$*( '(7(&7,21 6/23(&21752/ $1''5,9(5 7;' 02'( &21752/ 7,0(287 &$1+ &$1/ 9&& 9,2 67% 1250$/ 5(&(,9(5 9,2 :$.(83 ),/7(5 /2:32:(5 5(&(,9(5 9&& 5;' 08;DQG '5,9(5 9,2 7;' 6/23(&21752/ $1''5,9(5 &$1+ &$1/ 7,0(287 9,2 9&& 67% 1250$/ 5(&(,9(5 9,2 :$.(83 ),/7(5 5;' *1'$ /2:32:(5 5(&(,9(5 08;DQG '5,9(5 *1'% DDD Fig 1. Block diagram TJA1059 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 15 January 2015 © NXP Semiconductors N.V. 2015. All rights reserved. 4 of 22 TJA1059 NXP Semiconductors Dual high-speed CAN transceiver with Standby mode 6. Pinning information 6.1 Pinning 7-$7. WHUPLQDO LQGH[DUHD 7;' 67% *1'$ &$1+ 9&& &$1/ 5;' 9,2 *1'% &$1+ 7;' &$1/ 5;' 67% DDD Fig 2. Pin configuration diagram 6.2 Pin description Table 3. Symbol Pin Description TXD1 1 transmit data input 1 GNDA 2[1] ground VCC 3 transceiver supply voltage RXD1 4 receive data output 1; reads out data from bus line1 GNDB 5[1] ground TXD2 6 transmit data input 2 RXD2 7 receive data output 2; reads out data from bus line 2 STB2 8 standby control input 2 (HIGH = Standby mode, LOW = Normal mode) CANL2 9 LOW-level CAN-bus line 2 CANH2 10 HIGH-level CAN-bus line 2 VIO 11 supply voltage for I/O level adapter CANL1 12 LOW-level CAN-bus line 1 CANH1 13 HIGH-level CAN-bus line 1 STB1 14 standby control input 1 (HIGH = Standby mode, LOW = Normal mode) [1] TJA1059 Product data sheet Pin description Pins 2 and 5 must be connected together externally in the application. For enhanced thermal and electrical performance, the exposed center pad at the bottom of the package should be soldered to board ground. All information provided in this document is subject to legal disclaimers. Rev. 2 — 15 January 2015 © NXP Semiconductors N.V. 2015. All rights reserved. 5 of 22 TJA1059 NXP Semiconductors Dual high-speed CAN transceiver with Standby mode 7. Functional description The TJA1059 is a dual HS-CAN stand-alone transceiver with Standby mode and robust ESD handling capability. It combines the functionality of two TJA1040/TJA1049 transceivers with improved EMC and quiescent current performance. Improved slope control and high DC handling capability on the bus pins provide additional application flexibility. 7.1 Operating modes The TJA1059 supports two operating modes per transceiver, Normal and Standby. The operating mode can be selected independently for each transceiver via pins STB1 and STB2 (see Table 4). Table 4. Mode Operating modes Pin STB1/STB2 Pin RXD1/RXD2 LOW HIGH Normal LOW bus dominant bus recessive Standby HIGH wake-up request detected no wake-up request detected 7.1.1 Normal mode A LOW level on pin STB1/STB2 selects Normal mode. In this mode, the transceiver can transmit and receive data via the bus lines CANH1/CANL1 and CANH2/CANL2 (see Figure 1 for the block diagram). The differential receiver converts the analog data on the bus lines into digital data which is output on pin RXD1/RXD2. The slopes of the output signals on the bus lines are controlled internally and are optimized in a way that guarantees the lowest possible EME. 7.1.2 Standby mode A HIGH level on pin STB1/STB2 selects Standby mode. In Standby mode, the transceiver is not able to transmit or correctly receive data via the bus lines. The transmitter and Normal-mode receiver blocks are switched off to reduce supply current, and only a low-power differential receiver monitors the bus lines for activity. In Standby mode, the bus lines are biased to ground to minimize the system supply current. The low-power receiver is supplied by VIO and can detect CAN-bus activity even if VIO is the only supply voltage available. When pin RXD1/RXD2 goes LOW to signal a wake-up request, a transition to Normal mode is not triggered until STB1/STB2 is forced LOW. A dedicated wake-up sequence (specified in ISO11898-5) must be received before the TJA1059 outputs the bus signals on RXD1/RXD2. This filtering is necessary to avoid spurious wake-up events due to a dominant clamped CAN-bus or dominant phases caused by noise or spikes on the bus. A valid wake-up pattern consists of: A dominant phase of at least twake(busdom) followed by A recessive phase of at least twake(busrec) followed by A dominant phase of at least twake(busdom) TJA1059 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 15 January 2015 © NXP Semiconductors N.V. 2015. All rights reserved. 6 of 22 TJA1059 NXP Semiconductors Dual high-speed CAN transceiver with Standby mode The complete dominant-recessive-dominant pattern must be received within tto(wake)bus to be recognized as a valid wake-up pattern (see Figure 3). Pin RXD1/RXD2 remains recessive until the wake-up event has been triggered. After a wake-up sequence has been detected, the TJA1059 remains in Standby mode with the bus signals reflected on RXD1/RXD2. Note that dominant or recessive phases lasting less than tfltr(wake)bus are not detected by the low-power differential receiver and will not be reflected on RXD1/RXD2 in Standby mode. A wake-up event is not registered if any of the following events occur while a wake-up sequence is being transmitted: • the TJA1059 switches to Normal mode • the complete wake-up pattern was not received within tto(wake)bus • a VIO undervoltage is detected (VIO < Vuvd(VIO); see Section 7.2.3) If any of these events occur while a wake-up sequence is being received, the internal wake-up logic is reset. The complete wake-up sequence will need to be retransmitted to trigger a wake-up event. twake(busrec) CANHx VO(diff)bus CANLx twake(busdom) twake(busdom) RXDx tfltr(wake)bus tfltr(wake)bus tto(wake)bus 015aaa147 Fig 3. Wake-up timing 7.2 Fail-safe features 7.2.1 TXD dominant time-out function A 'TXD dominant time-out' timer is started when pin TXD1/TXD2 is set LOW. If the LOW state on this pin persists for longer than tto(dom)TXD, the transmitter is disabled, releasing the bus lines to recessive state. This function prevents a hardware and/or software application failure from driving the bus lines to a permanent dominant state (blocking all network communications). The TXD dominant time-out timer is reset when pin TXD1/TXD2 is set HIGH. The TXD dominant time-out time also defines the minimum possible bit rate of 40 kbit/s. The TJA1059 has two TXD dominant time-out timers that operate independently of each other. TJA1059 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 15 January 2015 © NXP Semiconductors N.V. 2015. All rights reserved. 7 of 22 TJA1059 NXP Semiconductors Dual high-speed CAN transceiver with Standby mode 7.2.2 Internal biasing of TXD1, TXD2, STB1 and STB2 input pins Pins TXD1, TXD2, STB1 and STB2 have internal pull-ups to VIO. The pull-ups ensure a safe, defined state if any of these pins are left floating. Pins GNDA and GNDB must be connected together in the application. Pull-up currents flow in these pins in all states. Pins TXD1, TXD2, STB1 and STB2 should be held HIGH in Standby mode to minimize the supply current. 7.2.3 Undervoltage detection on pins VCC and VIO Should VCC drop below the VCC undervoltage detection level, Vuvd(VCC), both transceivers will switch to Standby mode. The logic state of pins STB1 and STB2 is ignored until VCC has recovered. Should VIO drop below the VIO undervoltage detection level, Vuvd(VIO), the transceivers will switch off and disengage from the bus (zero load) until VIO has recovered. 7.2.4 Overtemperature protection The output drivers are protected against overtemperature conditions. If the virtual junction temperature exceeds the shutdown junction temperature, Tj(sd), both output drivers are disabled. When the virtual junction temperature drops below Tj(sd) again, the output drivers will recover independently once TXD1/TXD2 have been reset to HIGH. Including the TXD1/TXD2 condition prevents output driver oscillation due to small variations in temperature. 7.3 VIO supply pin Pin VIO should be connected to the microcontroller supply voltage (see Figure 6). This adjusts the signal levels of pins TXD1, TXD2, RXD1, RXD2, STB1 and STB2 to the I/O levels of the microcontroller. Pin VIO also provides the internal supply voltage for the low-power differential receiver of the transceiver. It allows applications running in low-power mode to monitor the bus lines for activity, even if there is no supply voltage on pin VCC. TJA1059 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 15 January 2015 © NXP Semiconductors N.V. 2015. All rights reserved. 8 of 22 TJA1059 NXP Semiconductors Dual high-speed CAN transceiver with Standby mode 8. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). All voltages are referenced to GND. Symbol Parameter Conditions Min Max Unit on pins CANH1, CANL1, CANH2 and CANL2 58 +58 V Vx voltage on pin x Vtrt transient voltage on pins CANH1, CANL1, CANH2 and CANL2 [1] VESD electrostatic discharge voltage IEC 61000-4-2 (150 pF, 330 ) [2] on any other pin on pins CANH1, CANL1, CANH2 and CANL2 on pins CANH1, CANL1, CANH2 and CANL2 at any other pin Machine Model (MM); 200 pF, 0.75 H, 10 at any pin at any pin storage temperature 6 +6 kV 6 +6 kV 4 +4 kV 300 +300 V 750 +750 V [5] at corner pins Tstg V V [4] Charged Device Model (CDM); field Induced charge; 4 pF virtual junction temperature +7 +100 [3] Human Body Model (HBM); 100 pF, 1.5 k Tvj 0.3 150 [6] 500 +500 V 40 +150 C 55 +150 C [1] Verified by an external test house to ensure pins CANH1, CANL1, CANH2 and CANL2 can withstand ISO7637 part 1 and 2 automotive transient test pulses. [2] According to IEC TS 62228 (2007), Section 4.3; DIN EN 61000-4-2. [3] According to AEC-Q100-002. [4] According to AEC-Q100-003. [5] According to AEC-Q100-011 Rev-C1. The classification level is C4B. [6] In accordance with IEC 60747-1. An alternative definition of virtual junction temperature is: Tvj = Tamb + P Rth(vj-a), where Rth(vj-a) is a fixed value to be used for the calculation of Tvj. The rating for Tvj limits the allowable combinations of power dissipation (P) and ambient temperature (Tamb). 9. Thermal characteristics Table 6. Symbol Rth(j-a) Thermal characteristics Parameter Conditions thermal resistance from junction to ambient Typ Unit HVSON14; single-layer board [1] 73 K/W HVSON14; four-layer board [2] 42 K/W [1] According to JEDEC JESD51-2 and JESD51-3 at natural convection on 1s board. [2] According to JEDEC JESD51-2, JESD51-5 and JESD51-7 at natural convection on 2s2p board. Board with two inner copper layers (thickness: 35 m) and thermal via array under the exposed pad connected to the first inner copper layer. TJA1059 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 15 January 2015 © NXP Semiconductors N.V. 2015. All rights reserved. 9 of 22 TJA1059 NXP Semiconductors Dual high-speed CAN transceiver with Standby mode 10. Static characteristics Table 7. Static characteristics Tvj = 40 C to +150 C, VCC = 4.75 V to 5.25 V, VIO = 2.85 V to 5.25 V and RL = 60 unless specified otherwise. All voltages are defined with respect to ground. Positive currents flow into the device[1]. Symbol Parameter Conditions Min Typ Max Unit Supply; pin VCC VCC supply voltage 4.75 - 5.25 V Vuvd(VCC) undervoltage detection voltage on pin VCC 3.5 - 4.5 V ICC supply current - 0.5 5 A both channels recessive - - 20 mA one channel dominant - - 80 mA both channels dominant - 90 140 mA Standby mode; VTXD = VIO Normal mode I/O level adapter supply; pin VIO VIO supply voltage on pin VIO 2.85 - 5.25 V Vuvd(VIO) undervoltage detection voltage on pin VIO 1.3 2.0 2.7 V IIO supply current on pin VIO - 16.5 27 A - - 55 A Standby mode; VTXD = VIO Normal mode both channels recessive one channel dominant - - 400 A both channels dominant - - 600 A 0.7VIO - VIO + 0.3 V Standby mode control input; pins STB1 and STB2 VIH HIGH-level input voltage VIL LOW-level input voltage 0.3 - 0.3VIO V IIH HIGH-level input current VSTB[2] = VIO 5 - +5 A IIL LOW-level input current VSTB = 0 V 15 - 1 A CAN transmit data input; pins TXD1 and TXD2 VIH HIGH-level input voltage 0.7VIO - VIO + 0.3 V VIL LOW-level input voltage 0.3 - 0.3VIO V IIH HIGH-level input current VTXD[3] = VIO 5 - +5 A IIL LOW-level input current VTXD = 0 V 260 150 30 A - 5 10 pF Ci [4] input capacitance CAN receive data output; pins RXD1 and RXD2 IOH HIGH-level output current VRXD[5] = VIO 0.4 V; VIO = VCC 8 3 1 mA IOL LOW-level output current 1 - 12 mA pin CANH1/CANH2 2.75 3.5 4.5 V pin CANL1/CANL2 0.5 1.5 2.25 V VRXD = 0.4 V; bus dominant Bus lines; pins CANH1, CANL1, CANH2 and CANL2 VO(dom) dominant output voltage TJA1059 Product data sheet VTXD = 0 V; t < tto(dom)TXD All information provided in this document is subject to legal disclaimers. Rev. 2 — 15 January 2015 © NXP Semiconductors N.V. 2015. All rights reserved. 10 of 22 TJA1059 NXP Semiconductors Dual high-speed CAN transceiver with Standby mode Table 7. Static characteristics …continued Tvj = 40 C to +150 C, VCC = 4.75 V to 5.25 V, VIO = 2.85 V to 5.25 V and RL = 60 unless specified otherwise. All voltages are defined with respect to ground. Positive currents flow into the device[1]. Symbol Parameter Vdom(TX)sym transmitter dominant voltage symmetry VO(dif)bus VO(rec) Vth(RX)dif bus differential output voltage recessive output voltage differential receiver threshold voltage Conditions Min Typ Max Unit 400 - +400 mV VTXD = 0 V; t < tto(dom)TXD VCC = 4.75 V to 5.25 V; RL = 45 to 65 1.5 - 3 V VTXD = VIO; recessive; no load 50 - +50 mV Vdom(TX)sym = VCC VCANH [6] VCANL [7] Normal mode; VTXD = VIO; no load 2 0.5VCC 3 V Standby mode; no load 0.1 - +0.1 V Normal mode; Vcm(CAN) = 12 V to +12 V [8] 0.5 0.7 0.9 V Standby mode Vcm(CAN) = 12 V to +12 V [8] 0.4 0.7 1.15 V [8] 100 - 300 mV Vhys(RX)dif differential receiver hysteresis voltage Normal mode; Vcm(CAN) = 12 V to +12 V IO(sc)dom dominant short-circuit output current VTXD = 0 V; t < tto(dom)TXD; VCC = 5 V pin CANH1/CANH2; VCANH = 0 V 100 70 40 mA pin CANL1/CANL2; VCANL = 5 V/40 V 40 70 100 mA IO(sc)rec recessive short-circuit output current Normal mode; VTXD = VIO VCANH = VCANL = 40 V to +40 V 5 - +5 mA IL leakage current VCC = VIO = 0 V or VCC = VIO = shorted to ground via 47 k; VCANH = VCANL = 5 V 5 - +5 A Ri input resistance 9 15 28 k Ri input resistance deviation between pin CANH1/CANH2 and pin CANL1/CANL2 3 - +3 % Ri(dif) differential input resistance 19 30 52 k Ci(cm) common-mode input capacitance [4] - - 20 pF Ci(dif) differential input capacitance [4] - - 10 pF [4] - 190 - C Temperature detection Tj(sd) shutdown junction temperature [1] All parameters are guaranteed over the virtual junction temperature range by design. Factory testing uses correlated test conditions to cover the specified temperature and power supply voltage range. [2] STB refers to the input signal on pin STB1 or pin STB2. [3] TXD refers to the input signal on pin TXD1 or pin TXD2. [4] Not tested in production; guaranteed by design. [5] RXD refers to the output signal on pin RXD1 or pin RXD2. [6] CANH refers to the input/output signal on pin CANH1 or pin CANH2. [7] CANL refers to the input/output signal on pin CANL1 or pin CANL2. [8] Vcm(CAN) is the common mode voltage of CANH1/CANL1 and CANH2/CANL2. TJA1059 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 15 January 2015 © NXP Semiconductors N.V. 2015. All rights reserved. 11 of 22 TJA1059 NXP Semiconductors Dual high-speed CAN transceiver with Standby mode 11. Dynamic characteristics Table 8. Dynamic characteristics Tvj = 40 C to +150 C, VCC = 4.75 V to 5.25 V, VIO = 2.85 V to 5.25 V and RL = 60 unless specified otherwise. All voltages are defined with respect to ground;. Positive currents flow into the device[1]. Symbol Parameter Conditions Min Typ Max Unit Transceiver timing; pins CANH1, CANH2, CANL1, CANL2, TXD1, TXD2, RXD1 and RXD2; see Figure 4 and Figure 7 td(TXD-busdom) delay time from TXD to bus dominant Normal mode - 65 140 ns td(TXD-busrec) delay time from TXD to bus recessive Normal mode - 90 140 ns td(busdom-RXD) delay time from bus dominant to RXD Normal mode - 60 140 ns td(busrec-RXD) delay time from bus recessive to RXD Normal mode - 65 140 ns tPD(TXD-RXD) propagation delay from TXD to RXD Normal mode 60 - 250 ns 400 - 550 ns 2 5 ms [2] tbit(RXD) bit time on pin RXD tbit(TXD) = 500 ns tto(dom)TXD TXD dominant time-out time VTXD = 0 V; Normal mode 0.5 td(stb-norm) standby to normal mode delay time 7 25 47 s twake(busdom) bus dominant wake-up time Standby mode 0.5 - 5 s twake(busrec) bus recessive wake-up time Standby mode 0.5 - 5 s tto(wake)bus bus wake-up time-out time 0.5 2 5 ms tfltr(wake)bus bus wake-up filter time 0.5 1.5 5 s Standby mode [1] All parameters are guaranteed over the virtual junction temperature range by design. Factory testing uses correlated test conditions to cover the specified temperature and power supply voltage range. [2] See Figure 5. TJA1059 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 15 January 2015 © NXP Semiconductors N.V. 2015. All rights reserved. 12 of 22 TJA1059 NXP Semiconductors Dual high-speed CAN transceiver with Standby mode HIGH TXDx LOW CANHx CANLx dominant 0.9 V VO(dif)(bus) 0.5 V recessive HIGH 0.7VIO RXDx 0.3VIO LOW td(TXD-busrec) td(TXD-busdom) td(busrec-RXD) td(busdom-RXD) tPD(TXD-RXD) Fig 4. tPD(TXD-RXD) 015aaa211 CAN transceiver timing diagram 7;' [WELW7;' WELW7;' 5;' WELW5;' DDD Fig 5. TJA1059 Product data sheet Loop delay symmetry timing diagram All information provided in this document is subject to legal disclaimers. Rev. 2 — 15 January 2015 © NXP Semiconductors N.V. 2015. All rights reserved. 13 of 22 TJA1059 NXP Semiconductors Dual high-speed CAN transceiver with Standby mode 12. Application information 12.1 Application diagram 9 %$7 9 9&& &$1+ HJ Q) 9,2 57 57 &$1/ &$1+ HJ Q) 7-$ 57 67% 67% 7;' 5;' 7;' 5;' 3[[ 9'' 3\\ 7; 5; 0,&52 &21752//(5 7; 5; *1' *1'$ *1'% 57 &$1/ DDD (1) For bus line end nodes, RT = 60 in order to support the ‘split termination concept’. For sub-nodes, an optional ‘weak’ termination of e.g. RT = 1.3 k can be used, if required by the OEM. Fig 6. Typical application with 3 V microcontroller 12.2 Application hints Further information on the application of the TJA1059 can be found in NXP application hints AH1401 Application Hints - Dual high speed CAN transceiver TJA1059. TJA1059 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 15 January 2015 © NXP Semiconductors N.V. 2015. All rights reserved. 14 of 22 TJA1059 NXP Semiconductors Dual high-speed CAN transceiver with Standby mode 13. Test information 9 ) Q) 9,2 9&& 67% 67% &$1+ 7;' 5/ S) 5/ S) &$1/ 7;' 7-$ &$1+ 5;' S) 5;' S) *1'$ &$1/ *1'% DDD Fig 7. Timing test circuit for CAN transceiver 13.1 Quality information This product has been qualified in accordance with the Automotive Electronics Council (AEC) standard Q100 Rev-G - Failure mechanism based stress test qualification for integrated circuits, and is suitable for use in automotive applications. TJA1059 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 15 January 2015 © NXP Semiconductors N.V. 2015. All rights reserved. 15 of 22 TJA1059 NXP Semiconductors Dual high-speed CAN transceiver with Standby mode 14. Package outline +9621SODVWLFWKHUPDOHQKDQFHGYHU\WKLQVPDOORXWOLQHSDFNDJHQROHDGV WHUPLQDOVERG\[[PP 627 ; % ' $ $ ( $ F WHUPLQDO LQGH[DUHD GHWDLO; H WHUPLQDO LQGH[DUHD H Y Z E & & $ % & \ & \ / N (K 'K 'LPHQVLRQV 8QLW PP PP VFDOH $ $ E F PD[ QRP PLQ ' 'K ( (K H H N / Y Z \ \ VRW Fig 8. 5HIHUHQFHV 2XWOLQH YHUVLRQ ,(& -('(& -(,7$ 627 02 (XURSHDQ SURMHFWLRQ ,VVXHGDWH Package outline SOT1086 (HVSON14) TJA1059 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 15 January 2015 © NXP Semiconductors N.V. 2015. All rights reserved. 16 of 22 TJA1059 NXP Semiconductors Dual high-speed CAN transceiver with Standby mode 15. Handling information All input and output pins are protected against ElectroStatic Discharge (ESD) under normal handling. When handling ensure that the appropriate precautions are taken as described in JESD625-A or equivalent standards. 16. Soldering of SMD packages This text provides a very brief insight into a complex technology. A more in-depth account of soldering ICs can be found in Application Note AN10365 “Surface mount reflow soldering description”. 16.1 Introduction to soldering Soldering is one of the most common methods through which packages are attached to Printed Circuit Boards (PCBs), to form electrical circuits. The soldered joint provides both the mechanical and the electrical connection. There is no single soldering method that is ideal for all IC packages. Wave soldering is often preferred when through-hole and Surface Mount Devices (SMDs) are mixed on one printed wiring board; however, it is not suitable for fine pitch SMDs. Reflow soldering is ideal for the small pitches and high densities that come with increased miniaturization. 16.2 Wave and reflow soldering Wave soldering is a joining technology in which the joints are made by solder coming from a standing wave of liquid solder. The wave soldering process is suitable for the following: • Through-hole components • Leaded or leadless SMDs, which are glued to the surface of the printed circuit board Not all SMDs can be wave soldered. Packages with solder balls, and some leadless packages which have solder lands underneath the body, cannot be wave soldered. Also, leaded SMDs with leads having a pitch smaller than ~0.6 mm cannot be wave soldered, due to an increased probability of bridging. The reflow soldering process involves applying solder paste to a board, followed by component placement and exposure to a temperature profile. Leaded packages, packages with solder balls, and leadless packages are all reflow solderable. Key characteristics in both wave and reflow soldering are: • • • • • • Board specifications, including the board finish, solder masks and vias Package footprints, including solder thieves and orientation The moisture sensitivity level of the packages Package placement Inspection and repair Lead-free soldering versus SnPb soldering 16.3 Wave soldering Key characteristics in wave soldering are: TJA1059 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 15 January 2015 © NXP Semiconductors N.V. 2015. All rights reserved. 17 of 22 TJA1059 NXP Semiconductors Dual high-speed CAN transceiver with Standby mode • Process issues, such as application of adhesive and flux, clinching of leads, board transport, the solder wave parameters, and the time during which components are exposed to the wave • Solder bath specifications, including temperature and impurities 16.4 Reflow soldering Key characteristics in reflow soldering are: • Lead-free versus SnPb soldering; note that a lead-free reflow process usually leads to higher minimum peak temperatures (see Figure 9) than a SnPb process, thus reducing the process window • Solder paste printing issues including smearing, release, and adjusting the process window for a mix of large and small components on one board • Reflow temperature profile; this profile includes preheat, reflow (in which the board is heated to the peak temperature) and cooling down. It is imperative that the peak temperature is high enough for the solder to make reliable solder joints (a solder paste characteristic). In addition, the peak temperature must be low enough that the packages and/or boards are not damaged. The peak temperature of the package depends on package thickness and volume and is classified in accordance with Table 9 and 10 Table 9. SnPb eutectic process (from J-STD-020D) Package thickness (mm) Package reflow temperature (C) Volume (mm3) < 350 350 < 2.5 235 220 2.5 220 220 Table 10. Lead-free process (from J-STD-020D) Package thickness (mm) Package reflow temperature (C) Volume (mm3) < 350 350 to 2000 > 2000 < 1.6 260 260 260 1.6 to 2.5 260 250 245 > 2.5 250 245 245 Moisture sensitivity precautions, as indicated on the packing, must be respected at all times. Studies have shown that small packages reach higher temperatures during reflow soldering, see Figure 9. TJA1059 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 15 January 2015 © NXP Semiconductors N.V. 2015. All rights reserved. 18 of 22 TJA1059 NXP Semiconductors Dual high-speed CAN transceiver with Standby mode maximum peak temperature = MSL limit, damage level temperature minimum peak temperature = minimum soldering temperature peak temperature time 001aac844 MSL: Moisture Sensitivity Level Fig 9. Temperature profiles for large and small components For further information on temperature profiles, refer to Application Note AN10365 “Surface mount reflow soldering description”. 17. Soldering of HVSON packages Section 16 contains a brief introduction to the techniques most commonly used to solder Surface Mounted Devices (SMD). A more detailed discussion on soldering HVSON leadless package ICs can found in the following application notes: • AN10365 ‘Surface mount reflow soldering description” • AN10366 “HVQFN application information” 18. Revision history Table 11. Revision history Document ID Release date Data sheet status Change notice Supersedes TJA1059 v.2 20150115 Product data sheet - TJA1059 v.1 Modifications TJA1059 v.1 TJA1059 Product data sheet • • • • • • • • • Section 1: text revised (1st paragraph); paragraph added Section 2: minor amendments to text; Section 2.1 features added Table 1: measurements conditions changed: VCANH, VCANL Table 3: Table note 1: text revised Section 7.1.1. Section 7.2.2: minor changes to text Table 5: measurements conditions changed for parameter Vx, VESD; table note section revised Table 7: parameters renamed: IO(sc)dom and IO(sc)rec; Table note 1 added; Table note 4 revised Table 8: parameter tbit(RXD) added; Table note 1, Table note 2 and Figure 5 added Section 12.2 “Application hints”: added 20140124 Product data sheet - All information provided in this document is subject to legal disclaimers. Rev. 2 — 15 January 2015 - © NXP Semiconductors N.V. 2015. All rights reserved. 19 of 22 TJA1059 NXP Semiconductors Dual high-speed CAN transceiver with Standby mode 19. Legal information 19.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] Please consult the most recently issued document before initiating or completing a design. [2] The term ‘short data sheet’ is explained in section “Definitions”. [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 19.2 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. Product specification — The information and data provided in a Product data sheet shall define the specification of the product as agreed between NXP Semiconductors and its customer, unless NXP Semiconductors and customer have explicitly agreed otherwise in writing. In no event however, shall an agreement be valid in which the NXP Semiconductors product is deemed to offer functions and qualities beyond those described in the Product data sheet. 19.3 Disclaimers Limited warranty and liability — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. NXP Semiconductors takes no responsibility for the content in this document if provided by an information source outside of NXP Semiconductors. In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of NXP Semiconductors. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. TJA1059 Product data sheet Suitability for use in automotive applications — This NXP Semiconductors product has been qualified for use in automotive applications. Unless otherwise agreed in writing, the product is not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors and its suppliers accept no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer's own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products, and NXP Semiconductors accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). NXP does not accept any liability in this respect. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of NXP Semiconductors products by customer. All information provided in this document is subject to legal disclaimers. Rev. 2 — 15 January 2015 © NXP Semiconductors N.V. 2015. All rights reserved. 20 of 22 TJA1059 NXP Semiconductors Dual high-speed CAN transceiver with Standby mode No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Translations — A non-English (translated) version of a document is for reference only. The English version shall prevail in case of any discrepancy between the translated and English versions. Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. 19.4 Trademarks Quick reference data — The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding. Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 20. Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] TJA1059 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 15 January 2015 © NXP Semiconductors N.V. 2015. All rights reserved. 21 of 22 TJA1059 NXP Semiconductors Dual high-speed CAN transceiver with Standby mode 21. Contents 1 2 2.1 2.2 2.3 2.4 3 4 5 6 6.1 6.2 7 7.1 7.1.1 7.1.2 7.2 7.2.1 7.2.2 7.2.3 7.2.4 7.3 8 9 10 11 12 12.1 12.2 13 13.1 14 15 16 16.1 16.2 16.3 16.4 17 18 19 19.1 19.2 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 General . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Predictable and fail-safe behavior . . . . . . . . . . 2 Low-power management . . . . . . . . . . . . . . . . . 2 Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Quick reference data . . . . . . . . . . . . . . . . . . . . . 2 Ordering information . . . . . . . . . . . . . . . . . . . . . 3 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Pinning information . . . . . . . . . . . . . . . . . . . . . . 5 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 5 Functional description . . . . . . . . . . . . . . . . . . . 6 Operating modes . . . . . . . . . . . . . . . . . . . . . . . 6 Normal mode . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Standby mode. . . . . . . . . . . . . . . . . . . . . . . . . . 6 Fail-safe features . . . . . . . . . . . . . . . . . . . . . . . 7 TXD dominant time-out function . . . . . . . . . . . . 7 Internal biasing of TXD1, TXD2, STB1 and STB2 input pins . . . . . . . . . . . . . . . . . . . . . 8 Undervoltage detection on pins VCC and VIO . . 8 Overtemperature protection . . . . . . . . . . . . . . . 8 VIO supply pin . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 9 Thermal characteristics . . . . . . . . . . . . . . . . . . 9 Static characteristics. . . . . . . . . . . . . . . . . . . . 10 Dynamic characteristics . . . . . . . . . . . . . . . . . 12 Application information. . . . . . . . . . . . . . . . . . 14 Application diagram . . . . . . . . . . . . . . . . . . . . 14 Application hints . . . . . . . . . . . . . . . . . . . . . . . 14 Test information . . . . . . . . . . . . . . . . . . . . . . . . 15 Quality information . . . . . . . . . . . . . . . . . . . . . 15 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 16 Handling information. . . . . . . . . . . . . . . . . . . . 17 Soldering of SMD packages . . . . . . . . . . . . . . 17 Introduction to soldering . . . . . . . . . . . . . . . . . 17 Wave and reflow soldering . . . . . . . . . . . . . . . 17 Wave soldering . . . . . . . . . . . . . . . . . . . . . . . . 17 Reflow soldering . . . . . . . . . . . . . . . . . . . . . . . 18 Soldering of HVSON packages. . . . . . . . . . . . 19 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 19 Legal information. . . . . . . . . . . . . . . . . . . . . . . 20 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 20 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 19.3 19.4 20 21 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . Contact information . . . . . . . . . . . . . . . . . . . . Contents. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 21 21 22 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP Semiconductors N.V. 2015. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] Date of release: 15 January 2015 Document identifier: TJA1059