MICRF230-433 Evaluation Board User Guide

MICRF230
400MHz to 450MHz ASK/OOK Receiver
with RSSI and Squelch
General Description
Features
The MICRF230 is a 400MHz to 450MHz superheterodyne, image-reject, RF receiver with automatic gain
control, ASK/OOK demodulator, analog RSSI output, and
integrated squelch features. It only requires a crystal and a
minimum number of external components to implement.
The MICRF230 is ideal for low-cost, low-power, RKE,
TPMS, and remote actuation applications.
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The MICRF230 achieves −112dBm sensitivity at a bit rate
of 1kbps with 1% BER. Four demodulator filter bandwidths
are selectable using SEL0 and SEL1 from 1625Hz to
13kHz at 433.92MHz, allowing the device to support bit
rates up to 20kbps. The device operates from a supply
voltage of 3.5V to 5.5V and typically consumes 6.0mA at
433.92MHz. The MICRF230 has a shutdown mode that
reduces current to 0.5µA. The squelch feature decreases
the activity on the data output pin until valid bits are
detected while maintaining overall receiver sensitivity.
Datasheets and support documentation are available on
Micrel’s web site at: www.micrel.com.
−112dBm sensitivity at 1kbps with 1% BER
Supports bit rates up to 20kbps at 433.92MHz
25dB image-reject mixer
No IF filter required
60dB analog RSSI output range
3.5V to 5.5V supply voltage range
6.0mA supply current at 434MHz
0.5μA supply current in shutdown mode
16-pin 4.9mm × 6.0mm QSOP package
−40°C to +105°C temperature range
2kV HBM ESD rating
Applications
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Automotive remote keyless entry (RKE)
Long range RFID
Remote fan and light control
Garage door and gate openers
Remote metering
Low data rate unidirectional wireless data links
Typical Application
MICRF230 Typical Application Circuit for 433.92MHz
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (408) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com
April 15, 2015
Revision 2.0
Micrel, Inc.
MICRF230
Ordering Information
Part Number
MICRF230YQS
Top Marking
Junction
Temperature Range
MICRF230YQS
–40°C to +105°C
Package
16-Pin 4.9mm × 6.0mm QSOP
Pin Configuration
16-Pin 4.9mm × 6.0mm QSOP (QS)
(Top View)
Pin Description
Pin
Number
Pin
Name
Type
Pin Function
1
RO1
Input
Reference resonator connection (to the Pierce oscillator). Can also be driven by external
reference signal of 200mVP-P to 1.5VP-P amplitude maximum. Internal capacitance of 7pF to
GND during normal operation.
2
RFGND
Supply
3
ANT
Input
4
RFGND
Supply
Ground connection for ANT RF input. Connect to PCB ground plane.
5
CDEC
Supply
Internal supply decoupling access. Bypass to PCB ground plane with a 0.1µF ceramic
capacitor located as close to pin as possible. Maximum operating voltage is 3.6V.
6
SQ
Input
7
VDD
Supply
Positive supply connection (for all chip functions). Bypass with 1µF capacitor located as close
to the VDD pin as possible.
Enable control logic-level input. A logic-level HIGH enable the device. A logic-level LOW put
the device to shutdown mode. An internal pull-down (3µA typical) pulls the logic input LOW.
The device is designed to start up in shutdown state. The EN pin should be kept at logic low
(shutdown state) until after the supply voltage on VDD is stabilized. If the application is
designed to have the EN pin always pulled high, it is recommended to add a shunt capacitor of
0.47µF from the EN pin to ground.
8
EN
Input
9
GND
Supply
April 15, 2015
Ground connection for ANT RF input. Connect to PCB ground plane.
Antenna input. RF signal input from antenna. Internally AC coupled. It is recommended to use
a matching network with an inductor to RF ground to improve ESD protection.
Squelch control logic-level input. An internal pull-up (3μA typical) pulls the logic-input HIGH
when the device is enabled. A logic LOW on SQ squelches, or reduces, the random activity
on DO pin when there is no RF input signal.
Ground connection for all chip functions except for RF input. Connect to PCB ground plane.
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MICRF230
Pin Description (Continued)
Pin
Number
Pin
Name
Type
10
DO
Output
11
SEL1
Input
Logic control input with active internal pull-up (3µA typical). It can be used to select the lowpass filter bandwidth in the absence register control (Table 1).
12
SEL0
Input
Logic control input with active internal pull-up (3µA typical). It can be used to select the lowpass filter bandwidth in the absence register control (Table 1).
Pin Function
Demodulation data output. A current limited CMOS output in normal operation. An internal
pull-down of 25kΩ is present when device is in shutdown.
13
CTH
Input/Output
Demodulation threshold voltage integration capacitor. Capacitor to GND sets the settling time
for the demodulation data slice level. Values above 1nF are recommended and should be
optimized for data rate and data profile. Connect a 0.1µF capacitor from CTH pin to GND to
provide a stable slicing threshold.
14
AGC
Input/Output
AGC filter capacitor connection. Connect a capacitor from this pin to GND. Refer to the “AGC
Loop” in the Receiver Operation section for information on the capacitor value.
15
RSSI
Output
Received Signal Strength Indicator output. The voltage on this pin is an inversed amplified
version of the voltage on AGC. Output is from a buffer with typically 200Ω output impedance.
16
RO2
Output
Pierce Oscillator Output for Crystal Output: Internal capacitance of 7pF to GND during
normal operation.
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MICRF230
Absolute Maximum Ratings(1)
Operating Ratings(2)
Supply Voltage (VDD) ................................................... +6.0V
Voltage on all pins except Antenna ...... −0.3V to VDD + 0.3V
Antenna Input ............................................... −0.3V to +0.3V
Junction Temperature .............................................. +150°C
Lead Temperature (soldering, 10s) .......................... +300°C
Storage Temperature (TS) ......................... −65°C to +150°C
Maximum Receiver Input Power ............................. +10dBm
ESD Rating(3) ......................................................... 2kV HBM
Supply Voltage (VDD) .................................... +3.5V to +5.5V
Antenna Input ................................................ -0.3V to +0.3V
All Pins (except antenna input) ............. −0.3V to VDD + 0.3V
Ambient Temperature (TA) ........................ –40°C to +105°C
Maximum Input RF Power........................................... 0dBm
Receive Modulation Duty Cycle ........................ 20% to 80%
Frequency Range................................. 400MHz to 450MHz
Electrical Characteristics
VDD = 5.0V, VEN = 5V, SQ = Open, CAGC = 4.7µF, CCTH = 0.1µF, unless otherwise noted. Bold values indicate –40°C ≤ TA ≤ +105°C.
Symbol
Parameter
Condition
Min.
Typ.
Max.
Units
ICC
Operating Supply Current
Continuous Operation, fRF = 433.92MHz
4.5
6.0
8.0
mA
ISD
Shutdown Current
VEN = 0V
0.5
1
µA
Conducted Receiver
Sensitivity @ 1kbps(4)
433.92MHz, SEL0:SEL1 = 00, BER = 1%
−112.5
433.92MHz, SEL0:SEL1= 00, BER = 0.1%
−110.0
Image Rejection
fIMAGE = fRF – 2fIF
25
dB
fIF
IF Center Frequency
fRF = 433.92MHz
1.2
MHz
BWIF
-3dB IF Bandwidth
fRF = 433.92MHz
330
KHz
VAGC
AGC Voltage Range
−40dBm RF input level
1.15
−100dBm RF input level
1.55
Receiver
dBm
V
Notes:
1. Exceeding the absolute maximum rating may damage the device.
2. The device is not guaranteed to function outside of its operating rating.
3. Device is ESD sensitive. Use appropriate ESD precautions. Human body model, 1.5kΩ in series with 100pF.
4. In an ON/OFF keyed (OOK) signal, the signal level goes between a “mark” level (when the RF signal is ON) and a “space” level (when the RF signal
is OFF). Sensitivity is defined as the input signal level when “ON” necessary to achieve a specified BER (bit error rate). BER measured with the
built-in BERT function in Agilent E4432B using PN9 sequence. Sensitivity measurement values are obtained using an input matching network to
433.92MHz.
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MICRF230
Electrical Characteristics (Continued)
VDD = 5.0V, VEN = 5V, SQ = Open, CAGC = 4.7µF, CCTH = 0.1µF, unless otherwise noted. Bold values indicate –40°C ≤ TA ≤ +105°C.
Symbol
Parameter
Condition
Min.
Typ.
Max.
Units
Reference Oscillator
fRF
Reference Oscillator Frequency
fRF = 433.92MHz
13.52313
MHz
Reference Buffer Input Impedance
RO1 when driven externally
1.6
kΩ
Reference Oscillator Bias Voltage
RO2
1.15
V
Reference Oscillator Input Range
External input, AC couple to RO1
Reference Oscillator Source Current
VRO1 = 0V
300
µA
CTH Source Impedance(5)
fREF = 13.52313MHz
120
KΩ
CTH Leakage Current In CTH
Hold Mode
TA = +25ºC
TA = +105ºC
1
10
nA
As output source at 0.8VDD
As output sink at 0.2VDD
300
680
µA
600
Output Fall Time
15pF load on DO pin, transition
time between 0.1VDD and 0.9VDD
Input High Voltage
EN, SQ
Input Low Voltage
EN, SQ
Output Voltage High
DO
Output Voltage Low
DO
0.2
1.5
VP-P
Demodulator
Digital / Control Functions
DO Pin Output Current
Output Rise Time
RSSI
VRSSI
ns
200
0.8VDD
V
0.2VDD
0.8VDD
V
V
0.2VDD
V
(6)
RSSI DC Output Voltage Range
RSSI Output Current
−110dBm RF input level
0.4
−50dBm RF input level
2.06
5kΩ load to GND,
−50dBm RF input level
400
µA
200
Ω
9
ms
-106
dBm
RSSI Output Impedance
RSSI Response Time
SEL0:SEL1 = 00, RF input power
stepped from no input to −50dBm
V
RF Leakage
LO Leakage for 433.92MHz
432.68064MHz
(fXAL = 13.52127MHz)
Notes:
5.
CTH source impedance is inversely proportional to the reference frequency. In production test, the typical source impedance value is verified with
12MHz reference frequency.
6.
RSSI exhibit variation through manufacturing process, it is recommended that the reading is calibrated by software in system MCU when it is being
used.
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Micrel, Inc.
MICRF230
Electrical Characteristics (Continued)
VDD = 5.0V, VEN = 5V, SQ = Open, CAGC = 4.7µF, CCTH = 0.1µF, unless otherwise noted. Bold values indicate –40°C ≤ TA ≤ +105°C.
Symbol
Parameter
Condition
Min.
Typ.
Max.
Units
(7)
Startup Time
From EN To Data Output Time
433.92MHz at −100dBm,
AGC capacitor = 4.7µF
48
433.92MHz at −100dBm,
AGC capacitor = 2.2µF
26
433.92MHz at −100dBm,
AGC capacitor = 1µF(8)
12
433.92MHz at −100dBm,
( )
AGC capacitor = 0.47 µF 8
5
ms
Notes:
7. The startup time is measured from EN pin low to high until steady data output at DO.
8. AGC cap values of 0.47uF and 1µF are not recommended for Auto-poll, it is applicable only for normal reception mode.
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MICRF230
Typical Characteristics
VDD = 5.0 V, TA =+25°C, BER measured with PN9 sequence, unless otherwise noted.
Ground Current vs.
Supply Voltage (fRF =433.92MHz)
Current Vs. Receiver Frequency
6.4
CAGC Volatge vs. Input Power
1.9
7.5
1.8
6.2
6.1
6
5.9
5.8
5.7
7
1.7
CAGC VOLTAGE (V)
GROUND CURRENT (mA)
SUPPLY CURRENT (mA)
6.3
+125°C
6.5
+25°C
6
-40°C
5.5
5.5
1.4
+25°C
-40°C
1.3
1.2
1
-125
5
400
410
420
430
440
450
3.5
4
4.5
5
5.5
SUPPLY VOLTAGE (V)
RECEIVER FREQUENCY (MHz)
+25°C
-40°C
1.5
1
+125°C
0.5
0
-125
Sel0:Sel1[1:1],10kbps
-108
-109
Sel0:Sel1[1:0], 5kbps
-110
-111
Sel0:Sel1[0:1], 2kbps
-112
-113
Sel0:Sel1[0:0], 1kbps
-85
-65
-45
-25
3.5
4
INPUT POWER LEVEL (dBm)
-106
-25
-5
Sel0:Sel1[1:1],10KBPs
-107
Sel0:Sel1[1:0],5KBPs
-108
-109
-110
-111
4.5
5
Sel0:Sel1[0:0],1KBPs
3.5
5.5
4
4.5
5
5.5
VIN (V)
VIN (V)
Sensitivity in 433.92MHz vs. VIN
at different BW IN (-40°C)
-45
-112
-114
-105
-65
-105
SENSITIVITY IN dBm VS. 1%BER
SENSITIVITY IN dBm VS. 1%BER
2
-85
Sensitivity in 433.92MHz vs.
VIN at different BW in (+105°C)
-107
2.5
-105
RF INPUT POWER (dBm)
Sensitivity in 433.92MHz vs. VIN at
different BW in (+25°C)
433.92 MHz RSSI Voltage
vs. Input Power
RSSI VOLTAGE (V)
1.5
1.1
5.6
434MHz Selectivity at 1.625KHz
Bandwidth
Bandpass Filter Attenuation
fxal=13.52127MHz
-108
SENSITIVITY IN dBm VS. 1%BER
-65
Sel0:Sel1[1:1],10KBPs
-109
ATTENUATION (dB)
SENSITIVITY IN dBm VS. 1%BER
+125°C
1.6
-110
Sel0:Sel1[1:0],5KBPs
-111
-112
Sel0:Sel1[0:1],2KBPs
-113
-114
-3
-8
-13
-18
Sel0:Sel1[0:0],1KBPs
-115
-116
3.5
4
4.5
VIN (V)
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5.5
-23
433.54
433.74
433.94
434.14
INPUT FREQUENCY (MHz)
7
-70
-75
-80
-85
-90
-95
-100
-105
-110
-115
430.92 431.92 432.92 433.92 434.92 435.92 436.92
INPUT RF FREQUENCY (MHz)
Revision 2.0
Micrel, Inc.
MICRF230
Typical Characteristics (Continued)
433.92MHz Spurious Response
data signal -107dBm with 1%BER
-40
JAMMING SIGNAL
INPUT POWER LEVEL (dBm)
-50
-60
-70
-80
-90
-100
-110
-120
-130
403.92 413.92 423.92 433.92 443.92 453.92 463.92
JAMMING FREQUENCY (MHz)
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MICRF230
Functional Diagram
Figure 1. MICRF230 Simplified Functional Block Diagram
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MICRF230
Therefore, the reference frequency fREF needed for a
given desired RF frequency (fRF) is approximated in
Equation 3:
Functional Description
The simplified block diagram (Figure 1) illustrates the
basic structure of the MICRF230 receiver. It is made up
of four sub-blocks:
• UHF down-converter
• ASK/OOK demodulator
• Reference and control logic
fREF = fRF / (32 +
87
)
1000
Eq. 3
Outside the device, the MICRF230 receiver requires just
a few components to operate: a capacitor from AGC to
GND, a capacitor from CTH to GND, a reference crystal
resonator with associated loading capacitors, LNA input
matching components, and a power-supply decoupling
capacitor.
Receiver Operation
UHF Downconverter
The UHF down-converter has six sub-blocks: LNA,
mixers, synthesizer, image reject filter, band pass filter
and IF amplifier.
Figure 2. Low-Side Injection Local Oscillator
Image-Reject Filter and Band-Pass Filter
The IF ports of the mixer produce quadrature-down
converted IF signals. These IF signals are low-pass
filtered to remove higher frequency products prior to the
image reject filter where they are combined to reject the
image frequency. The IF signal then passes through a
third order band pass filter. The IF bandwidth is 330kHz
@ 433.92MHz, and will scale with RF operating
frequency according to Equation 4:
LNA
The RF input signal is AC-coupled into the gate of the
LNA input device. The LNA configuration is a cascaded
common-source NMOS amplifier. The amplified RF
signal is then fed to the RF ports of two double balanced
mixers.
Mixers and Synthesizer
The LO ports of the mixers are driven by quadrature local
oscillator outputs from the synthesizer block. The local
oscillator signal from the synthesizer is placed on the low
side of the desired RF signal (Figure 2). The product of
the incoming RF signal and local oscillator signal will
yield the IF frequency, which will be demodulated by the
detector of the device. The image reject mixer
suppresses the image frequency which is below the
wanted signal by 2x the IF frequency. The local oscillator
frequency (fLO) is set to 32x the crystal reference
frequency (fREF) via a phase-locked loop synthesizer with
a fully-integrated loop filter (Equation 1):
fLO = 32 × fREF
BWIF = [email protected] MHz ×  Operating Frequency (MHz) 

433.92

Eq. 4
These filters are fully integrated inside the MICRF230.
After filtering, four active gain controlled amplifier stages
enhance the IF signal to its proper level for demodulation.
Eq. 1
MICRF230 uses an IF frequency scheme that scales the
IF frequency (fIF) with fREF according to Equation 2:
fIF = fREF ×
April 15, 2015
87
1000
Eq. 2
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Micrel, Inc.
MICRF230
ASK/OOK Demodulator
The demodulator section is comprised of detector,
programmable low pass filter, slicer, and AGC
comparator.
Slicer and CTH
The signal before the slicer, labeled “Audio Signal” in
Figure 1, is still a baseband analog signal. The data slicer
converts the analog signal into ones and zeros based on
50% of the slicing threshold voltage built up in the CTH
capacitor. After the slicer, the signal is demodulated OOK
digital data. When there is only thermal noise at ANT pin,
the voltage level on CTH pin is about 650mV. This
voltage starts to drop when there is RF signal present.
When the RF signal level is greater than −100dBm, the
voltage is about 400mV.
Detector and Programmable Low-Pass Filter
The demodulation starts with the detector removing the
carrier from the IF signal. Post detection, the signal
becomes baseband information. The low-pass filter
further enhances the baseband signal.
There are four selectable low-pass filter BW settings:
1625Hz, 3250Hz, 6500Hz and 13000Hz for 433.92MHz
operation. The low-pass filter BW is directly proportional
to the crystal reference frequency, and RF Operating
Frequency. Filter BW values can be easily calculated by
direct scaling. Equation 5 illustrates filter Demod BW
calculation:
BWOperating Freq = [email protected] ×
The capacitor value from the CTH pin to GND is not
critical to the sensitivity of MICRF230. However, it should
be large enough to provide a stable slicing level for the
comparator. The0.1μF value used in the evaluation board
is good for all bit rates from 500bps to 20kbps.
CTH Hold Mode
If the internal demodulated signal (DO in Figure 1) is at
logic LOW for more than approximately 4ms, the chip
automatically enters CTH hold mode, which holds the
voltage on CTH pin constant even without a RF input
signal. This is useful in a transmission gap, or “dead
time”, used in many encoding schemes. When the signal
reappears, CTH voltage does not need to resettle. This
improves the time to output with no pulse width distortion,
or time to good data (TTGD).
 Operating Freqruency (MHz) 


433.92


Eq. 5
It is very important to select a suitable low-pass filter BW
setting for the required data rate to minimize bit error
rate. Use the sensitivity curves that show BER vs. bit
rates for different SEL0:SEL1 settings as a guide.
This low-pass filter with −3dB corner frequency
bandwidth can be configured by setting the registers as in
Table 1 for 433.92MHz.
AGC Loop
The AGC comparator monitors the signal amplitude from
the output of the programmable low-pass filter. The AGC
loop in the chip regulates the signal from the output point
to be at a constant level when the input RF signal is
within the AGC loop dynamic range (about −115dBm to
−40dBm).
Table 1. Low-Pass Filter Bandwidth Selection @ 434MHz RF
Input
Maximum
SEL1
SEL0
Low-Pass
Filter BW
Encoded Bit Rate
0
0
1625Hz
2.5KBps
0
1
3250Hz
5KBps
1
0
6500Hz
10KBps
1
1
13000Hz
20KBps
When the chip first turns on, the fast charge feature
charges the AGC node up with 120µA typical current.
When the voltage on AGC increases, the gains of the
mixer and IF amplifier go up, increasing the amplitude of
the audio signal (as labeled in Figure 1), even with only
thermal noise at the LNA input. The fast-charge current is
disabled when the audio signal crosses the slicing
threshold, causing DO’ to go high, for the first time.
Bit rate refers to the encoded bit rate. Encoded bit rate is
1/(shortest pulse duration) that appears at DO:
When an RF signal is applied, a fast-attack period
ensues when 600µA current discharges the AGC node to
reduce the gain to a proper level. Once the loop reaches
equilibrium, the fast attack current is disabled, leaving
only 15µA to discharge AGC or 1.5µA to charge AGC.
The fast attack current is enabled only when the RF
signal increases faster than the ability of the AGC loop to
track it.
Figure 3. Transmitted Bit Rate through the air
April 15, 2015
The ability of the chip to track to a signal that decreased
in strength becomes much slower, since only 1.5μA is
available to charge the AGC to increase the gain. When
designing a transmitter that communicates with the
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MICRF230
MICRF230, ensure that the power level remains constant
throughout the transmit burst.
to be slow. As a result, TTGD is about 9.1ms. It is
recommended that Tantalum caps or high voltage
ceramic caps are used for AGC to minimize capacitor
leakage current which may affect the performance of the
AGC.
The value of AGC impacts the period between the TTGD,
which is defined as the time when signal is first applied,
to the pulse width at DO, within 10% of the steady state
value. The optimal value of AGC depends on the setting
of the D4 and D3 bits.
A smaller AGC value does not always result in a shorter
TTGD. This is due to the loop dynamics, the fast
discharge current being 600µA, and the charge current
being only 1.5µA. For example, if SEL0 = SEL1 = 0, the
low pass filter bandwidth is set to a minimum and the
AGC capacitance is too small. The TTGD will be longer
than if AGC capacitance is properly chosen. This is
because when the RF signal first appears, the fast
discharge period will reduce VAGC very fast, lowering the
gain of the mixer and IF amplifier. Since the low pass
filter bandwidth is low, it takes too long for the AGC
comparator to see a reduced level of the audio signal,
and cannot stop the discharge current. This causes an
undershoot in AGC voltage and a corresponding
overshoot in RSSI voltage. Once the AGC undershoots, it
takes a long time for it to charge back up because the
current available is only 1.5µA.
Figure 4. RSSI Overshoot and Slow TTGD (9.1ms)
Table 2 lists the recommended minimum AGC values for
different SEL0 and SEL1 settings to insure that the
voltage on AGC does not undershoot.
Figure 5 shows the behavior with a larger capacitor on
AGC pin (2.2μF), SEL0:SEL1 = 10. In this case, VAGC
does not undershoot (RSSI does not overshoot), and
TTGD is relatively short at 1ms.
Table 2. Minimum Suggested AGC Values
SEL0
SEL1
AGC value
0
0
4.7μF
0
1
2.2μF
1
0
1μF
1
1
1μF
Figure 4 illustrates what occurs if AGC is too small for a
given bandwidth setting. In this instance, SEL0 = 1, SEL1
= 0, AGC = 0.47μF, and the RF input level is stepped
from no signal to −100dBm. RSSI voltage is shown in
place of AGC voltage because RSSI is a buffered version
of AGC with an inversion and amplification. Probing AGC
directly can affect the loop dynamics through resistive
loading from a scope probe, especially in the state where
only 1.5μA is available, whereas probing RSSI does not.
When the RF signal is first applied, RSSI voltage
overshoots due to the fast discharge current on AGC,
and the loop is too slow to stop this fast discharge current
in time. Since the voltage on AGC is too low, the audio
signal level is lower than the slicing threshold (voltage on
CTH), and DO pin is low. Once the fast discharge current
stops, only the small 1.5µA charge current is available in
settling the AGC loop to the correct level, causing the
recovery from AGC undershoot/RSSI overshoot condition
April 15, 2015
Figure 5. Proper TTGD (1ms) with Sufficient AGC
Reference Oscillator
The reference oscillator in the MICRF230, shown in
Figure 6, uses a basic Pierce crystal oscillator
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MICRF230
configuration with MOS transconductor. Though the
MICRF230 has built-in load capacitors for the crystal
oscillator, the external load capacitors are still required
for tuning it to the right frequency. RO1 and RO2 are
external pins of the MICRF230 to connect the crystal to
the reference oscillator.
Figure 6. Reference Oscillator Circuit
Table 3. Reference Frequency Examples
RF Input Frequency (MHz)
Reference Frequency (MHz)
418.0
13.02708
433.92
13.52313(9)
Note:
9. Empirically derived, slightly different from Equation 3.
Squelch Operation
Squelch operation can be used to limit the amount of
activity on the DO pin during normal operation, which is
particularly useful when interrupt generated on DO can
interfere with correct operation.
Table 4. Squelch Control
SQ Pin
Squelch Enable
0
Squelch Circuit Enabled
1
Squelch Circuit Disabled (default)
The external pin defaults high via an internal pull-up.
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values. Note that the net impedance at the pin is easily
affected by component pads parasitic due to the high input
impedance of the device. The numbers in Table 5 does
NOT include trace and component pad parasitic
capacitance, which total about 0.75pF on the evaluation
board.
Application Information
Length of Preamble
When the MICRF230 returns to operation from shut down
stage, the preamble of the corresponding transmitter
should be long enough to guarantee that the MICRF230
becomes fully awake during the preamble portion of the
burst. This way the entire data portion will be received.
The matching components to the PCB antenna (L2 and
C2) were empirically derived for best over-the-air reception
range.
Figure 7 shows an example of insufficient length preamble.
MICRF230 starts demodulating output bits during the data
portion of the burst, so by the time it becomes fully awake
and releases DO, part of the data portion is lost. In Figure
8, the preamble length is sufficient. The chip has enough
preambles to be demodulated with a steady data portion.
Table 5. Input Impedance for the Most Used Frequencies
Frequency (MHz)
Z Device (Ω)
418
8.98 − j152
433.92
13.5 − j150
Crystal Selection
The crystal resonator provides a reference clock for all the
device internal circuits. Crystal tolerance needs to be
chosen such that the down-converted signal is always
inside the IF bandwidth of MICRF230.
From this
consideration, the tolerance should be ±50ppm on both the
transmitter and the MICRF230 side. The ESR should be
less than 300Ω, and the temperature range of the crystal
should match the range required by the application. With
the Abracon crystal listed in the Bill of Materials, a typical
MICRF230 crystal oscillator still starts up at 105°C with
additional 400Ω series resistance.
Figure 7. Preamble Length − Too Short
The oscillator of the MICRF230 is a pierce-type oscillator.
Good care must be taken when laying out the printed
circuit board. Avoid long traces and place the ground plane
on the top layer close to the REFOSC pins RO1 and RO2.
When care is not taken in the layout, and the crystals used
are not verified, the oscillator may not start or takes longer
to start. Time-to-good-data will be longer as well.
Figure 8. Preamble Length − Sufficient
Antenna and RF Port Connections
The evaluation board offers two options of injecting the RF
input signal: through a PCB antenna or through a 50Ω
SMA connector. The SMA connection allows for
conductive testing, or an external antenna.
Low-Noise Amplifier Input Matching
Capacitor C3 and inductor L2 form the “L” shape input
matching network to the SMA connector. The capacitor
cancels out the inductive portion of the net impedance
after the shunt inductor, and provides additional
attenuation for low-frequency outside band noise. The
inductor is chosen to over resonate the net capacitance at
the pin, leaving a net-positive reactance and increasing the
real part of the impedance. It also provides additional ESD
protection for the antenna pin. The input impedance of the
device is listed in Table 5 to aid calculation of matching
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PCB Considerations and Layout
The MICRF230 evaluation board is a good starting point
for prototyping of most applications. The Gerber files are
downloadable from the Micrel website and contain the
remaining layers needed to fabricate this board. When
copying or making one’s own boards, make the traces as
short as possible. Long traces alter the may become
invalid. Suggested matching values may vary due to PCB
variations. A PCB trace 100 mils (2.5mm) long has about
1.1nH inductance. Optimization should always be done
with range tests. Make sure the individual ground
connection has a dedicated via rather than sharing a few
of ground points by a single via. Sharing ground via will
increase the ground path inductance. Ground plane should
be solid and with no sudden interruptions. Avoid using the
ground plane on the top layer next to the matching
elements. It normally adds additional stray capacitance
which changes the matching. Do not use Phenolic
materials as they are conductive above 200MHz. FR4 or
better materials are recommended. The RF path should be
as straight as possible to avoid loops and unnecessary
turns. Separate ground and VDD lines from other digital or
switching power circuits (such as microcontrollers, etc.).
Known sources of noise should be laid out as far as
possible from the RF circuits. Avoid unnecessary wide
traces which would add more distribution capacitance
(between top trace to bottom GND plane) and alter the RF
parameters.
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PCB Recommended Layout Considerations
MICRF230 Evaluation Board Assembly
MICRF230 Evaluation Board Top Layer
MICRF230 Evaluation Board Bottom Layer
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Evaluation Board Schematic
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Bill of Materials − MICRF230 Evaluation Board (433.92MHz)
Item
C1
Part Number
GRM1555C1H1R2CA01
Manufacturer
(10)
Murata
Description
Qty.
1.2pF ±0.25pF, 0402 Capacitor
1
C6
TAJA475M016RNJ
AVX
4.7μF ±20%, Size A, Tantalum Capacitor
1
C9
GRM188R71E104K
Murata
0.1μF ±10%, 0603 Capacitor
1
C10
GRM188R71E105K
Murata
1μF ±10%, 0603 Capacitor
1
C5
GRM188R71E104K
Murata
0.1μF ±10%, 0603 Capacitor
0
C3, C4
GRM1555C1H100JA01
Murata
10pF ±5%, 0402 Capacitor
2
C2
GRM1555C1H2R7CA01
Murata
2.7pF ±0.25pF, 0402 Capacitor
1
NP, SMA, Edge Conn.
0
(11)
SMA
J4
571-41031480
Mouser(12)
AMPMODU Breakaway Headers 40 P(6pos) R/A Header
Gold
1
L1
0603CS-36NXJL
Coilcraft(13)
36nH ±5%, 0603 Wire Wound Chip Inductor
1
L2
0603CS-27NXJL
Coilcraft
27nH ±5%, 0603 Wire Wound Chip Inductor
1
100kΩ ±5%, 0402 Resistor
1
R2
NP
3
C7, C8
NP
2
0 OHM +/-5%, 0402 Resistor
2
13.52313MHz, HC49/US
1
NP, (13.52313MHz, −40°C to +105°C), DSX321GK
0
400MHz to 450MHz ASK/OOK Receiver with RSSI, and
Squelch
1
R1
R3, R4
Y1
CRCW0402100KFKEA
CRCW0402000KFKEA
ABLS-13.52313MHz-10J4Y
Y2
DSX321GK-13.52313MHz
U1
MICRF230YQS
(14)
Vishay
Vishay
(15)
Abracon
(16)
KDS
Micrel, Inc(17)
Notes:
10. Murata: www.murata.com.
11. AVX: www.avx.com.
12. Mouser: www.mouser.com.
13. Coilcraft: www.coilcraft.com.
14. Vishay: www.website.com.
15. Abracon: www.abracon.com.
16. KDS: www.kds.info/index_en.htm.
17. Micrel, Inc.: www.micrel.com.
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Package Information(18) and Recommended Landing Pattern
QSOP16 Package (QS)
Note:
18. Package information is correct as of the publication date. For updates and most current information, go to www.micrel.com.
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MICREL, INC. 2180 FORTUNE DRIVE SAN JOSE, CA 95131 USA
TEL +1 (408) 944-0800 FAX +1 (408) 474-1000 WEB http://www.micrel.com
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markets. The Company’s products include advanced mixed-signal, analog & power semiconductors; high-performance communication, clock
management, MEMs-based clock oscillators & crystal-less clock generators, Ethernet switches, and physical layer transceiver ICs. Company
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Micrel makes no representations or warranties with respect to the accuracy or completeness of the information furnished in this datasheet. This
information is not intended as a warranty and Micrel does not assume responsibility for its use. Micrel reserves the right to change circuitry,
specifications and descriptions at any time without notice. No license, whether express, implied, arising by estoppel or otherwise, to any intellectual
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